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authorAndy Polyakov <appro@openssl.org>2016-09-01 10:39:15 +0200
committerAndy Polyakov <appro@openssl.org>2016-09-02 13:33:17 +0200
commit947716c1872d210828122212d076d503ae68b928 (patch)
treecf5de69328e737756a20349f2930f1cd8af5edd1 /crypto/aes/asm/aes-mips.pl
parenta43249122baabb9ebaee0822d683f1fdb60f72a7 (diff)
MIPS assembly pack: adapt it for MIPS[32|64]R6.
MIPS[32|64]R6 is binary and source incompatible with previous MIPS ISA specifications. Fortunately it's still possible to resolve differences in source code with standard pre-processor and switching to trap-free version of addition and subtraction instructions. Reviewed-by: Richard Levitte <levitte@openssl.org>
Diffstat (limited to 'crypto/aes/asm/aes-mips.pl')
-rw-r--r--crypto/aes/asm/aes-mips.pl87
1 files changed, 65 insertions, 22 deletions
diff --git a/crypto/aes/asm/aes-mips.pl b/crypto/aes/asm/aes-mips.pl
index 439578d9c2..0eb1474a3a 100644
--- a/crypto/aes/asm/aes-mips.pl
+++ b/crypto/aes/asm/aes-mips.pl
@@ -65,8 +65,8 @@ $flavour = shift || "o32"; # supported flavours are o32,n32,64,nubi32,nubi64
if ($flavour =~ /64|n32/i) {
$PTR_LA="dla";
- $PTR_ADD="dadd"; # incidentally works even on n32
- $PTR_SUB="dsub"; # incidentally works even on n32
+ $PTR_ADD="daddu"; # incidentally works even on n32
+ $PTR_SUB="dsubu"; # incidentally works even on n32
$PTR_INS="dins";
$REG_S="sd";
$REG_L="ld";
@@ -74,8 +74,8 @@ if ($flavour =~ /64|n32/i) {
$SZREG=8;
} else {
$PTR_LA="la";
- $PTR_ADD="add";
- $PTR_SUB="sub";
+ $PTR_ADD="addu";
+ $PTR_SUB="subu";
$PTR_INS="ins";
$REG_S="sw";
$REG_L="lw";
@@ -102,15 +102,13 @@ open STDOUT,">$output";
my ($MSB,$LSB)=(0,3); # automatically converted to little-endian
$code.=<<___;
+#include "mips_arch.h"
+
.text
#ifdef OPENSSL_FIPSCANISTER
# include <openssl/fipssyms.h>
#endif
-#if defined(__mips_smartmips) && !defined(_MIPS_ARCH_MIPS32R2)
-#define _MIPS_ARCH_MIPS32R2
-#endif
-
#if !defined(__mips_eabi) && (!defined(__vxworks) || defined(__pic__))
.option pic2
#endif
@@ -146,7 +144,7 @@ _mips_AES_encrypt:
xor $s2,$t2
xor $s3,$t3
- sub $cnt,1
+ subu $cnt,1
#if defined(__mips_smartmips)
ext $i0,$s1,16,8
.Loop_enc:
@@ -218,7 +216,7 @@ _mips_AES_encrypt:
xor $t2,$t6
xor $t3,$t7
- sub $cnt,1
+ subu $cnt,1
$PTR_ADD $key0,16
xor $s0,$t0
xor $s1,$t1
@@ -409,7 +407,7 @@ _mips_AES_encrypt:
xor $t2,$t6
xor $t3,$t7
- sub $cnt,1
+ subu $cnt,1
$PTR_ADD $key0,16
xor $s0,$t0
xor $s1,$t1
@@ -657,6 +655,12 @@ $code.=<<___;
.set reorder
$PTR_LA $Tbl,AES_Te # PIC-ified 'load address'
+#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
+ lw $s0,0($inp)
+ lw $s1,4($inp)
+ lw $s2,8($inp)
+ lw $s3,12($inp)
+#else
lwl $s0,0+$MSB($inp)
lwl $s1,4+$MSB($inp)
lwl $s2,8+$MSB($inp)
@@ -665,9 +669,16 @@ $code.=<<___;
lwr $s1,4+$LSB($inp)
lwr $s2,8+$LSB($inp)
lwr $s3,12+$LSB($inp)
+#endif
bal _mips_AES_encrypt
+#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
+ sw $s0,0($out)
+ sw $s1,4($out)
+ sw $s2,8($out)
+ sw $s3,12($out)
+#else
swr $s0,0+$LSB($out)
swr $s1,4+$LSB($out)
swr $s2,8+$LSB($out)
@@ -676,6 +687,7 @@ $code.=<<___;
swl $s1,4+$MSB($out)
swl $s2,8+$MSB($out)
swl $s3,12+$MSB($out)
+#endif
.set noreorder
$REG_L $ra,$FRAMESIZE-1*$SZREG($sp)
@@ -720,7 +732,7 @@ _mips_AES_decrypt:
xor $s2,$t2
xor $s3,$t3
- sub $cnt,1
+ subu $cnt,1
#if defined(__mips_smartmips)
ext $i0,$s3,16,8
.Loop_dec:
@@ -792,7 +804,7 @@ _mips_AES_decrypt:
xor $t2,$t6
xor $t3,$t7
- sub $cnt,1
+ subu $cnt,1
$PTR_ADD $key0,16
xor $s0,$t0
xor $s1,$t1
@@ -985,7 +997,7 @@ _mips_AES_decrypt:
xor $t2,$t6
xor $t3,$t7
- sub $cnt,1
+ subu $cnt,1
$PTR_ADD $key0,16
xor $s0,$t0
xor $s1,$t1
@@ -1228,6 +1240,12 @@ $code.=<<___;
.set reorder
$PTR_LA $Tbl,AES_Td # PIC-ified 'load address'
+#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
+ lw $s0,0($inp)
+ lw $s1,4($inp)
+ lw $s2,8($inp)
+ lw $s3,12($inp)
+#else
lwl $s0,0+$MSB($inp)
lwl $s1,4+$MSB($inp)
lwl $s2,8+$MSB($inp)
@@ -1236,9 +1254,16 @@ $code.=<<___;
lwr $s1,4+$LSB($inp)
lwr $s2,8+$LSB($inp)
lwr $s3,12+$LSB($inp)
+#endif
bal _mips_AES_decrypt
+#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
+ sw $s0,0($out)
+ sw $s1,4($out)
+ sw $s2,8($out)
+ sw $s3,12($out)
+#else
swr $s0,0+$LSB($out)
swr $s1,4+$LSB($out)
swr $s2,8+$LSB($out)
@@ -1247,6 +1272,7 @@ $code.=<<___;
swl $s1,4+$MSB($out)
swl $s2,8+$MSB($out)
swl $s3,12+$MSB($out)
+#endif
.set noreorder
$REG_L $ra,$FRAMESIZE-1*$SZREG($sp)
@@ -1295,35 +1321,52 @@ _mips_AES_set_encrypt_key:
$PTR_ADD $rcon,$Tbl,256
.set reorder
+#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
+ lw $rk0,0($inp) # load 128 bits
+ lw $rk1,4($inp)
+ lw $rk2,8($inp)
+ lw $rk3,12($inp)
+#else
lwl $rk0,0+$MSB($inp) # load 128 bits
lwl $rk1,4+$MSB($inp)
lwl $rk2,8+$MSB($inp)
lwl $rk3,12+$MSB($inp)
- li $at,128
lwr $rk0,0+$LSB($inp)
lwr $rk1,4+$LSB($inp)
lwr $rk2,8+$LSB($inp)
lwr $rk3,12+$LSB($inp)
+#endif
+ li $at,128
.set noreorder
beq $bits,$at,.L128bits
li $cnt,10
.set reorder
+#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
+ lw $rk4,16($inp) # load 192 bits
+ lw $rk5,20($inp)
+#else
lwl $rk4,16+$MSB($inp) # load 192 bits
lwl $rk5,20+$MSB($inp)
- li $at,192
lwr $rk4,16+$LSB($inp)
lwr $rk5,20+$LSB($inp)
+#endif
+ li $at,192
.set noreorder
beq $bits,$at,.L192bits
li $cnt,8
.set reorder
+#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
+ lw $rk6,24($inp) # load 256 bits
+ lw $rk7,28($inp)
+#else
lwl $rk6,24+$MSB($inp) # load 256 bits
lwl $rk7,28+$MSB($inp)
- li $at,256
lwr $rk6,24+$LSB($inp)
lwr $rk7,28+$LSB($inp)
+#endif
+ li $at,256
.set noreorder
beq $bits,$at,.L256bits
li $cnt,7
@@ -1353,7 +1396,7 @@ _mips_AES_set_encrypt_key:
sw $rk1,4($key)
sw $rk2,8($key)
sw $rk3,12($key)
- sub $cnt,1
+ subu $cnt,1
$PTR_ADD $key,16
_bias $i0,24
@@ -1410,7 +1453,7 @@ _mips_AES_set_encrypt_key:
sw $rk3,12($key)
sw $rk4,16($key)
sw $rk5,20($key)
- sub $cnt,1
+ subu $cnt,1
$PTR_ADD $key,24
_bias $i0,24
@@ -1471,7 +1514,7 @@ _mips_AES_set_encrypt_key:
sw $rk5,20($key)
sw $rk6,24($key)
sw $rk7,28($key)
- sub $cnt,1
+ subu $cnt,1
_bias $i0,24
_bias $i1,16
@@ -1653,7 +1696,7 @@ $code.=<<___;
lw $tp1,16($key) # modulo-scheduled
lui $x80808080,0x8080
- sub $cnt,1
+ subu $cnt,1
or $x80808080,0x8080
sll $cnt,2
$PTR_ADD $key,16
@@ -1716,7 +1759,7 @@ $code.=<<___;
lw $tp1,4($key) # modulo-scheduled
xor $tpe,$tp2
#endif
- sub $cnt,1
+ subu $cnt,1
sw $tpe,0($key)
$PTR_ADD $key,4
bnez $cnt,.Lmix