diff options
| author | Tom Cosgrove <tom.cosgrove@arm.com> | 2024-03-26 13:18:00 +0000 |
|---|---|---|
| committer | Tomas Mraz <tomas@openssl.org> | 2024-04-10 09:21:02 +0200 |
| commit | 596eb267cdcab10806584e4d36513208713e6771 (patch) | |
| tree | a5671e767163619a614c88b5b32b7b230130bf6a | |
| parent | bde5d6f37bac3fb52156a7b2ac6104841bcc8cc0 (diff) | |
aarch64: fix BTI in bsaes assembly code
Change-Id: I63f0fb2af5eb9cea515dec96485325f8efd50511
Reviewed-by: Shane Lontis <shane.lontis@oracle.com>
Reviewed-by: Kurt Roeckx <kurt@roeckx.be>
(Merged from https://github.com/openssl/openssl/pull/23982)
(cherry picked from commit 88c74fe05bb4ea21aaba648a5cabd6665e40e3a5)
| -rw-r--r-- | crypto/aes/asm/bsaes-armv8.pl | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/crypto/aes/asm/bsaes-armv8.pl b/crypto/aes/asm/bsaes-armv8.pl index 3c2e8bdc95..32877d02b5 100644 --- a/crypto/aes/asm/bsaes-armv8.pl +++ b/crypto/aes/asm/bsaes-armv8.pl @@ -1018,6 +1018,7 @@ _bsaes_key_convert: // Initialisation vector overwritten with last quadword of ciphertext // No output registers, usual AAPCS64 register preservation ossl_bsaes_cbc_encrypt: + AARCH64_VALID_CALL_TARGET cmp x2, #128 bhs .Lcbc_do_bsaes b AES_cbc_encrypt @@ -1270,7 +1271,7 @@ ossl_bsaes_cbc_encrypt: // Output text filled in // No output registers, usual AAPCS64 register preservation ossl_bsaes_ctr32_encrypt_blocks: - + AARCH64_VALID_CALL_TARGET cmp x2, #8 // use plain AES for blo .Lctr_enc_short // small sizes @@ -1476,6 +1477,7 @@ ossl_bsaes_ctr32_encrypt_blocks: // Output ciphertext filled in // No output registers, usual AAPCS64 register preservation ossl_bsaes_xts_encrypt: + AARCH64_VALID_CALL_TARGET // Stack layout: // sp -> // nrounds*128-96 bytes: key schedule @@ -1921,6 +1923,7 @@ ossl_bsaes_xts_encrypt: // Output plaintext filled in // No output registers, usual AAPCS64 register preservation ossl_bsaes_xts_decrypt: + AARCH64_VALID_CALL_TARGET // Stack layout: // sp -> // nrounds*128-96 bytes: key schedule |