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/*
* Renesas R-Car Gen1 SRU/SSI support
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "rsnd.h"
struct rsnd_gen {
void __iomem *base[RSND_BASE_MAX];
struct rsnd_gen_ops *ops;
struct regmap *regmap;
struct regmap_field *regs[RSND_REG_MAX];
};
#define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen)
#define RSND_REG_SET(gen, id, reg_id, offset, _id_offset, _id_size) \
[id] = { \
.reg = (unsigned int)gen->base[reg_id] + offset, \
.lsb = 0, \
.msb = 31, \
.id_size = _id_size, \
.id_offset = _id_offset, \
}
/*
* basic function
*/
static int rsnd_regmap_write32(void *context, const void *_data, size_t count)
{
struct rsnd_priv *priv = context;
struct device *dev = rsnd_priv_to_dev(priv);
u32 *data = (u32 *)_data;
u32 val = data[1];
void __iomem *reg = (void *)data[0];
iowrite32(val, reg);
dev_dbg(dev, "w %p : %08x\n", reg, val);
return 0;
}
static int rsnd_regmap_read32(void *context,
const void *_data, size_t reg_size,
void *_val, size_t val_size)
{
struct rsnd_priv *priv = context;
struct device *dev = rsnd_priv_to_dev(priv);
u32 *data = (u32 *)_data;
u32 *val = (u32 *)_val;
void __iomem *reg = (void *)data[0];
*val = ioread32(reg);
dev_dbg(dev, "r %p : %08x\n", reg, *val);
return 0;
}
static struct regmap_bus rsnd_regmap_bus = {
.write = rsnd_regmap_write32,
.read = rsnd_regmap_read32,
.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
};
static int rsnd_is_accessible_reg(struct rsnd_priv *priv,
struct rsnd_gen *gen, enum rsnd_reg reg)
{
if (!gen->regs[reg]) {
struct device *dev = rsnd_priv_to_dev(priv);
dev_err(dev, "unsupported register access %x\n", reg);
return 0;
}
return 1;
}
u32 rsnd_read(struct rsnd_priv *priv,
struct rsnd_mod *mod, enum rsnd_reg reg)
{
struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
u32 val;
if (!rsnd_is_accessible_reg(priv, gen, reg))
return 0;
regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val);
return val;
}
void rsnd_write(struct rsnd_priv *priv,
struct rsnd_mod *mod,
enum rsnd_reg reg, u32 data)
{
struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
if (!rsnd_is_accessible_reg(priv, gen, reg))
return;
regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data);
}
void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,
enum rsnd_reg reg, u32 mask, u32 data)
{
struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
if (!rsnd_is_accessible_reg(priv, gen, reg))
return;
regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod),
mask, data);
}
static int rsnd_gen_regmap_init(struct rsnd_priv *priv,
struct rsnd_gen *gen,
struct reg_field *regf)
{
int i;
struct device *dev = rsnd_priv_to_dev(priv);
struct regmap_config regc;
memset(®c, 0, sizeof(regc));
regc.reg_bits = 32;
regc.val_bits = 32;
gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, ®c);
if (IS_ERR(gen->regmap)) {
dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap));
return PTR_ERR(gen->regmap);
}
for (i = 0; i < RSND_REG_MAX; i++) {
gen->regs[i] = NULL;
if (!regf[i].reg)
continue;
gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]);
if (IS_ERR(gen->regs[i]))
return PTR_ERR(gen->regs[i]);
}
return 0;
}
/*
* DMA read/write register offset
*
* RSND_xxx_I_N for Audio DMAC input
* RSND_xxx_O_N for Audio DMAC output
* RSND_xxx_I_P for Audio DMAC peri peri input
* RSND_xxx_O_P for Audio DMAC peri peri output
*
* ex) R-Car H2 case
* mod / DMAC in / DMAC out / DMAC PP in / DMAC pp out
* SSI : 0xec541000 / 0xec241008 / 0xec24100c / 0xec400000 / 0xec400000
* SCU : 0xec500000 / 0xec000000 / 0xec004000 / 0xec300000 / 0xec304000
* CMD : 0xec500000 / 0xec008000 0xec308000
*/
#define RDMA_SSI_I_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0x8)
#define RDMA_SSI_O_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0xc)
#define RDMA_SSI_I_P(addr, i) (addr ##_reg - 0x00141000 + (0x1000 * i))
#define RDMA_SSI_O_P(addr, i) (addr ##_reg - 0x00141000 + (0x1000 * i))
#define RDMA_SRC_I_N(addr, i) (addr ##_reg - 0x00500000 + (0x400 * i))
#define RDMA_SRC_O_N(addr, i) (addr ##_reg - 0x004fc000 + (0x400 * i))
#define RDMA_SRC_I_P(addr, i) (addr ##_reg - 0x00200000 + (0x400 * i))
#define RDMA_SRC_O_P(addr, i) (addr ##_reg - 0x001fc000 + (0x400 * i))
#define RDMA_CMD_O_N(addr, i) (addr ##_reg - 0x004f8000 + (0x400 * i))
#define RDMA_CMD_O_P(addr, i) (addr ##_reg - 0x001f8000 + (0x400 * i))
static void rsnd_gen2_dma_addr(struct rsnd_priv *priv,
struct rsnd_dma *dma,
struct dma_slave_config *cfg,
int is_play, int slave_id)
{
struct platform_device *pdev = rsnd_priv_to_pdev(priv);
struct device *dev = rsnd_priv_to_dev(priv);
struct rsnd_mod *mod = rsnd_dma_to_mod(dma);
struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
dma_addr_t ssi_reg = platform_get_resource(pdev,
IORESOURCE_MEM, RSND_GEN2_SSI)->start;
dma_addr_t src_reg = platform_get_resource(pdev,
IORESOURCE_MEM, RSND_GEN2_SCU)->start;
int is_ssi = !!(rsnd_io_to_mod_ssi(io) == mod);
int use_src = !!rsnd_io_to_mod_src(io);
int use_dvc = !!rsnd_io_to_mod_dvc(io);
int id = rsnd_mod_id(mod);
struct dma_addr {
dma_addr_t src_addr;
dma_addr_t dst_addr;
} dma_addrs[2][2][3] = {
{ /* SRC */
/* Capture */
{{ 0, 0 },
{ RDMA_SRC_O_N(src, id), 0 },
{ RDMA_CMD_O_N(src, id), 0 }},
/* Playback */
{{ 0, 0, },
{ 0, RDMA_SRC_I_N(src, id) },
{ 0, RDMA_SRC_I_N(src, id) }}
}, { /* SSI */
/* Capture */
{{ RDMA_SSI_O_N(ssi, id), 0 },
{ RDMA_SSI_O_P(ssi, id), RDMA_SRC_I_P(src, id) },
{ RDMA_SSI_O_P(ssi, id), RDMA_SRC_I_P(src, id) }},
/* Playback */
{{ 0, RDMA_SSI_I_N(ssi, id) },
{ RDMA_SRC_O_P(src, id), RDMA_SSI_I_P(ssi, id) },
{ RDMA_CMD_O_P(src, id), RDMA_SSI_I_P(ssi, id) }}
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