/* * Copyright 2017 Broadcom. All Rights Reserved. * The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License version 2 * as published by the Free Software Foundation. The full GNU General * Public License is included in this distribution in the file called COPYING. * * Contact Information: * linux-drivers@broadcom.com * */#ifndef BEISCSI_CMDS_H#define BEISCSI_CMDS_H/** * The driver sends configuration and managements command requests to the * firmware in the BE. These requests are communicated to the processor * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one * WRB inside a MAILBOX. * The commands are serviced by the ARM processor in the OneConnect's MPU. */structbe_sge{__le32pa_lo;__le32pa_hi;__le32len;};structbe_mcc_wrb{u32emb_sgecnt_special;/* dword 0 *//* bits 0 - embedded *//* bits 1 - 2 reserved *//* bits 3 - 7 sge count *//* bits 8 - 23 reserved *//* bits 24 - 31 special */#define MCC_WRB_EMBEDDED_MASK 1#define MCC_WRB_SGE_CNT_SHIFT 3#define MCC_WRB_SGE_CNT_MASK 0x1Fu32payload_length;/* dword 1 */u32tag0;/* dword 2 */u32tag1;/* dword 3 */u32rsvd;/* dword 4 */union{#define EMBED_MBX_MAX_PAYLOAD_SIZE 220u8embedded_payload[236];/* used by embedded cmds */structbe_sgesgl[19];/* used by non-embedded cmds */}payload;};#define CQE_FLAGS_VALID_MASK (1 << 31)#define CQE_FLAGS_ASYNC_MASK (1 << 30)#define CQE_FLAGS_COMPLETED_MASK (1 << 28)#define CQE_FLAGS_CONSUMED_MASK (1 << 27)/* Completion Status */#define MCC_STATUS_SUCCESS 0x0#define MCC_STATUS_FAILED 0x1#define MCC_STATUS_ILLEGAL_REQUEST 0x2#define MCC_STATUS_ILLEGAL_FIELD 0x3#define MCC_STATUS_INSUFFICIENT_BUFFER 0x4#define MCC_STATUS_INVALID_LENGTH 0x74#define CQE_STATUS_COMPL_MASK 0xFFFF#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */#define CQE_STATUS_EXTD_MASK 0xFFFF#define CQE_STATUS_EXTD_SHIFT 16 /* bits 31 - 16 */#define CQE_STATUS_ADDL_MASK 0xFF00#define CQE_STATUS_ADDL_SHIFT 8#define CQE_STATUS_MASK 0xFF#define CQE_STATUS_WRB_MASK 0xFF0000#define CQE_STATUS_WRB_SHIFT 16#d