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|
// SPDX-License-Identifier: GPL-2.0
/*
* phy-uniphier-usb3hs.c - HS-PHY driver for Socionext UniPhier USB3 controller
* Copyright 2015-2018 Socionext Inc.
* Author:
* Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
* Contributors:
* Motoya Tanigawa <tanigawa.motoya@socionext.com>
* Masami Hiramatsu <masami.hiramatsu@linaro.org>
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/nvmem-consumer.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/reset.h>
#include <linux/slab.h>
#define HSPHY_CFG0 0x0
#define HSPHY_CFG0_HS_I_MASK GENMASK(31, 28)
#define HSPHY_CFG0_HSDISC_MASK GENMASK(27, 26)
#define HSPHY_CFG0_SWING_MASK GENMASK(17, 16)
#define HSPHY_CFG0_SEL_T_MASK GENMASK(15, 12)
#define HSPHY_CFG0_RTERM_MASK GENMASK(7, 6)
#define HSPHY_CFG0_TRIMMASK (HSPHY_CFG0_HS_I_MASK \
| HSPHY_CFG0_SEL_T_MASK \
| HSPHY_CFG0_RTERM_MASK)
#define HSPHY_CFG1 0x4
#define HSPHY_CFG1_DAT_EN BIT(29)
#define HSPHY_CFG1_ADR_EN BIT(28)
#define HSPHY_CFG1_ADR_MASK GENMASK(27, 16)
#define HSPHY_CFG1_DAT_MASK GENMASK(23, 16)
#define PHY_F(regno, msb, lsb) { (regno), (msb), (lsb) }
#define LS_SLEW PHY_F(10, 6, 6) /* LS mode slew rate */
#define FS_LS_DRV PHY_F(10, 5, 5) /* FS/LS slew rate */
#define MAX_PHY_PARAMS 2
struct uniphier_u3hsphy_param {
struct {
int reg_no;
int msb;
int lsb;
} field;
u8 value;
};
struct uniphier_u3hsphy_trim_param {
unsigned int rterm;
unsigned int sel_t;
unsigned int hs_i;
};
#define trim_param_is_valid(p) ((p)->rterm || (p)->sel_t || (p)->hs_i)
struct uniphier_u3hsphy_priv {
struct device *dev;
void __iomem *base;
struct clk *clk, *clk_parent, *clk_ext;
struct reset_control *rst, *rst_parent;
struct regulator *vbus;
const struct uniphier_u3hsphy_soc_data *data;
};
struct uniphier_u3hsphy_soc_data {
int nparams;
const struct uniphier_u3hsphy_param param[MAX_PHY_PARAMS];
u32 config0;
u32 config1;
void (*trim_func)(struct uniphier_u3hsphy_priv *priv, u32 *pconfig,
struct uniphier_u3hsphy_trim_param *pt);
};
static void uniphier_u3hsphy_trim_ld20(struct uniphier_u3hsphy_priv *priv,
u32 *pconfig,
struct uniphier_u3hsphy_trim_param *pt)
{
*pconfig &= ~HSPHY_CFG0_RTERM_MASK;
*pconfig |= FIELD_PREP(HSPHY_CFG0_RTERM_MASK, pt->rterm);
*pconfig &= ~HSPHY_CFG0_SEL_T_MASK;
*pconfig |= FIELD_PREP(HSPHY_CFG0_SEL_T_MASK, pt->sel_t);
*pconfig &= ~HSPHY_CFG0_HS_I_MASK;
*pconfig |= FIELD_PREP(HSPHY_CFG0_HS_I_MASK, pt->hs_i);
}
static int uniphier_u3hsphy_get_nvparam(struct uniphier_u3hsphy_priv *priv,
const char *name, unsigned int *val)
{
struct nvmem_cell *cell;
u8 *buf;
cell = devm_nvmem_cell_get(priv->dev, name);
if (IS_ERR(cell))
return PTR_ERR(cell);
buf = nvmem_cell_read(cell, NULL);
if (IS_ERR(buf))
return PTR_ERR(buf);
*val = *buf;
kfree(buf);
return 0;
}
static int uniphier_u3hsphy_get_nvparams(struct uniphier_u3hsphy_priv *priv,
struct uniphier_u3hsphy_trim_param *pt)
{
int ret;
ret = uniphier_u3hsphy_get_nvparam(priv, "rterm", &pt->rterm);
if (ret)
return ret;
ret = uniphier_u3hsphy_get_nvparam(priv, "sel_t", &pt->sel_t);
if (ret)
return ret;
ret = uniphier_u3hsphy_get_nvparam(priv, "hs_i", &pt->hs_i);
if (ret)
return ret;
return 0;
}
static int uniphier_u3hsphy_update_config(struct uniphier_u3hsphy_priv *priv,
u32 *pconfig)
{
struct uniphier_u3hsphy_trim_param trim;
int ret, trimmed = 0;
if (priv->data->trim_func) {
ret = uniphier_u3hsphy_get_nvparams(priv, &trim);
if (ret == -EPROBE_DEFER)
return ret;
/*
* call trim_func only when trimming parameters that aren't
* all-zero can be acquired. All-zero parameters mean nothing
* has been written to nvmem.
*/
if (!ret && trim_param_is_valid(&trim)) {
priv->data->trim_func(priv, pconfig, &trim);
trimmed = 1;
} else {
dev_dbg(priv->dev, "can't get parameter from nvmem\n");
}
}
/* use default parameters without trimming values */
if (!trimmed) {
*pconfig &= ~HSPHY_CFG0_HSDISC_MASK;
*pconfig |= FIELD_PREP(HSPHY_CFG0_HSDISC_MASK, 3);
}
return 0;
}
static void uniphier_u3hsphy_set_param(struct uniphier_u3hsphy_priv *priv,
const struct uniphier_u3hsphy_param *p)
{
u32 val;
u32 field_mask = GENMASK(p->field.msb, p->field.lsb);
u8 data;
val = readl(priv->base + HSPHY_CFG1);
val &= ~HSPHY_CFG1_ADR_MASK;
val |= FIELD_PREP(HSPHY_CFG1_ADR_MASK, p->field.reg_no)
| HSPHY_CFG1_ADR_EN;
writel(val, priv->base + HSPHY_CFG1);
val = readl(priv->base + HSPHY_CFG1);
val &= ~HSPHY_CFG1_ADR_EN;
writel(val, priv->base + HSPHY_CFG1);
val = readl(priv->base + HSPHY_CFG1);
val &= ~FIELD_PREP(HSPHY_CFG1_DAT_MASK, field_mask);
data = field_mask & (p->value << p->field.lsb);
val |= FIELD_PREP(HSPHY_CFG1_DAT_MASK, data) | HSPHY_CFG1_DAT_EN;
writel(val, priv->base + HSPHY_CFG1);
val = readl(priv->base + HSPHY_CFG1);
val &= ~HSPHY_CFG1_DAT_EN;
writel(val, priv->base + HSPHY_CFG1);
}
static int uniphier_u3hsphy_power_on(struct phy *phy)
{
struct uniphier_u3hsphy_priv *priv = phy_get_drvdata(phy);
int ret;
ret = clk_prepare_enable(priv->clk_ext);
if (ret)
return ret;
ret = clk_prepare_enable(priv->clk);
if (ret)
goto out_clk_ext_disable;
ret = reset_control_deassert(priv->rst);
if (ret)
goto out_clk_disable;
if (priv->vbus) {
ret = regulator_enable(priv->vbus);
if (ret)
goto out_rst_assert;
}
return 0;
out_rst_assert:
reset_control_assert(priv->rst);
out_clk_disable:
clk_disable_unprepare(priv->clk);
out_clk_ext_disable:
clk_disable_unprepare(priv->clk_ext);
return ret;
}
static int uniphier_u3hsphy_power_off(struct phy *phy)
{
struct uniphier_u3hsphy_priv *priv = phy_get_drvdata(phy);
if (priv->vbus)
regulator_disable(priv->vbus);
reset_control_assert(priv->rst);
clk_disable_unprepare(priv->clk);
clk_disable_unprepare(priv->clk_ext);
return 0;
}
static int uniphier_u3hsphy_init(struct phy *phy)
{
struct uniphier_u3hsphy_priv *priv = phy_get_drvdata(phy);
u32 config0, config1;
int i, ret;
ret = clk_prepare_enable(priv->clk_parent);
if (ret)
return ret;
ret = reset_control_deassert(priv->rst_parent);
if (ret)
goto out_clk_disable;
if (!priv->data->config0 && !priv->data->config1)
return 0;
config0 = priv->data->config0;
config1 = priv->data->config1;
ret = uniphier_u3hsphy_update_config(priv, &config0);
if (ret)
goto out_rst_assert;
writel(config0, priv->base + HSPHY_CFG0);
writel(config1, priv->base + HSPHY_CFG1);
for (i = 0; i < priv->data->nparams; i++)
uniphier_u3hsphy_set_param(priv
|