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/*
* Copyright (C) ST-Ericsson SA 2010
*
* License Terms: GNU General Public License v2
* Author: Arun R Murthy <arun.murthy@stericsson.com>
* Author: Daniel Willerud <daniel.willerud@stericsson.com>
* Author: Johan Palsson <johan.palsson@stericsson.com>
* Author: M'boumba Cedric Madianga
*/
#include <linux/init.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/pm_runtime.h>
#include <linux/platform_device.h>
#include <linux/completion.h>
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/mfd/abx500.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/mfd/abx500/ab8500-gpadc.h>
/*
* GPADC register offsets
* Bank : 0x0A
*/
#define AB8500_GPADC_CTRL1_REG 0x00
#define AB8500_GPADC_CTRL2_REG 0x01
#define AB8500_GPADC_CTRL3_REG 0x02
#define AB8500_GPADC_AUTO_TIMER_REG 0x03
#define AB8500_GPADC_STAT_REG 0x04
#define AB8500_GPADC_MANDATAL_REG 0x05
#define AB8500_GPADC_MANDATAH_REG 0x06
#define AB8500_GPADC_AUTODATAL_REG 0x07
#define AB8500_GPADC_AUTODATAH_REG 0x08
#define AB8500_GPADC_MUX_CTRL_REG 0x09
#define AB8540_GPADC_MANDATA2L_REG 0x09
#define AB8540_GPADC_MANDATA2H_REG 0x0A
#define AB8540_GPADC_APEAAX_REG 0x10
#define AB8540_GPADC_APEAAT_REG 0x11
#define AB8540_GPADC_APEAAM_REG 0x12
#define AB8540_GPADC_APEAAH_REG 0x13
#define AB8540_GPADC_APEAAL_REG 0x14
/*
* OTP register offsets
* Bank : 0x15
*/
#define AB8500_GPADC_CAL_1 0x0F
#define AB8500_GPADC_CAL_2 0x10
#define AB8500_GPADC_CAL_3 0x11
#define AB8500_GPADC_CAL_4 0x12
#define AB8500_GPADC_CAL_5 0x13
#define AB8500_GPADC_CAL_6 0x14
#define AB8500_GPADC_CAL_7 0x15
/* New calibration for 8540 */
#define AB8540_GPADC_OTP4_REG_7 0x38
#define AB8540_GPADC_OTP4_REG_6 0x39
#define AB8540_GPADC_OTP4_REG_5 0x3A
/* gpadc constants */
#define EN_VINTCORE12 0x04
#define EN_VTVOUT 0x02
#define EN_GPADC 0x01
#define DIS_GPADC 0x00
#define AVG_1 0x00
#define AVG_4 0x20
#define AVG_8 0x40
#define AVG_16 0x60
#define ADC_SW_CONV 0x04
#define EN_ICHAR 0x80
#define BTEMP_PULL_UP 0x08
#define EN_BUF 0x40
#define DIS_ZERO 0x00
#define GPADC_BUSY 0x01
#define EN_FALLING 0x10
#define EN_TRIG_EDGE 0x02
#define EN_VBIAS_XTAL_TEMP 0x02
/* GPADC constants from AB8500 spec, UM0836 */
#define ADC_RESOLUTION 1024
#define ADC_CH_BTEMP_MIN 0
#define ADC_CH_BTEMP_MAX 1350
#define ADC_CH_DIETEMP_MIN 0
#define ADC_CH_DIETEMP_MAX 1350
#define ADC_CH_CHG_V_MIN 0
#define ADC_CH_CHG_V_MAX 20030
#define ADC_CH_ACCDET2_MIN 0
#define ADC_CH_ACCDET2_MAX 2500
#define ADC_CH_VBAT_MIN 2300
#define ADC_CH_VBAT_MAX 4800
#define ADC_CH_CHG_I_MIN 0
#define ADC_CH_CHG_I_MAX 1500
#define ADC_CH_BKBAT_MIN 0
#define ADC_CH_BKBAT_MAX 3200
/* GPADC constants from AB8540 spec */
#define ADC_CH_IBAT_MIN (-6000) /* mA range measured by ADC for ibat */
#define ADC_CH_IBAT_MAX 6000
#define ADC_CH_IBAT_MIN_V (-60) /* mV range measured by ADC for ibat */
#define ADC_CH_IBAT_MAX_V 60
#define IBAT_VDROP_L (-56) /* mV */
#define IBAT_VDROP_H 56
/* This is used to not lose precision when dividing to get gain and offset */
#define CALIB_SCALE 1000
/*
* Number of bits shift used to not lose precision
* when dividing to get ibat gain.
*/
#define CALIB_SHIFT_IBAT 20
/* Time in ms before disabling regulator */
#define GPADC_AUDOSUSPEND_DELAY 1
#define CONVERSION_TIME 500 /* ms */
enum cal_channels {
ADC_INPUT_VMAIN = 0,
ADC_INPUT_BTEMP,
ADC_INPUT_VBAT,
ADC_INPUT_IBAT,
NBR_CAL_INPUTS,
};
/**
* struct adc_cal_data - Table for storing gain and offset for the calibrated
* ADC channels
* @gain: Gain of the ADC channel
* @offset: Offset of the ADC channel
*/
struct adc_cal_data {
s64 gain;
s64 offset;
u16 otp_calib_hi;
u16 otp_calib_lo;
};
/**
* struct ab8500_gpadc - AB8500 GPADC device information
* @dev: pointer to the struct device
* @node: a list of AB8500 GPADCs, hence prepared for
reentrance
* @parent: pointer to the struct ab8500
* @ab8500_gpadc_complete: pointer to the struct completion, to indicate
* the completion of gpadc conversion
* @ab8500_gpadc_lock: structure of type mutex
* @regu: pointer to the struct regulator
* @irq_sw: interrupt number that is used by gpadc for Sw
* conversion
* @irq_hw: interrupt number that is used by gpadc for Hw
* conversion
* @cal_data array of ADC calibration data structs
*/
struct ab8500_gpadc {
struct device *dev;
struct list_head node;
struct ab8500 *parent;
struct completion ab8500_gpadc_complete;
struct mutex ab8500_gpadc_lock;
struct regulator *regu;
int irq_sw;
int irq_hw;
struct adc_cal_data cal_data[NBR_CAL_INPUTS];
};
static LIST_HEAD(ab8500_gpadc_list);
/**
* ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
* (i.e. the first GPADC in the instance list)
*/
struct ab8500_gpadc *ab8500_gpadc_get(char *name)
{
struct ab8500_gpadc *gpadc;
list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
if (!strcmp(name, dev_name(gpadc->dev)))
return gpadc;
}
return ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(ab8500_gpadc_get);
/**
* ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
*/
int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
int ad_value)
{
int res;
switch (channel) {
case MAIN_CHARGER_V:
/* For some reason we don't have calibrated data */
if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
ADC_CH_CHG_V_MIN) * ad_value /
ADC_RESOLUTION;
break;
}
/* Here we can use the calibrated data */
res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
break;
case XTAL_TEMP:
case BAT_CTRL:
case BTEMP_BALL:
case ACC_DETECT1:
case ADC_AUX1:
case ADC_AUX2:
/* For some reason we don't have calibrated data */
if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
ADC_CH_BTEMP_MIN) * ad_value /
ADC_RESOLUTION;
break;
}
/* Here we can use the calibrated data */
res =
|