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/*
* Support for LGDT3302 and LGDT3303 - VSB/QAM
*
* Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
/*
* NOTES ABOUT THIS DRIVER
*
* This Linux driver supports:
* DViCO FusionHDTV 3 Gold-Q
* DViCO FusionHDTV 3 Gold-T
* DViCO FusionHDTV 5 Gold
* DViCO FusionHDTV 5 Lite
* DViCO FusionHDTV 5 USB Gold
* Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
* pcHDTV HD5500
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <asm/byteorder.h>
#include "dvb_frontend.h"
#include "dvb_math.h"
#include "lgdt330x_priv.h"
#include "lgdt330x.h"
/* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */
/* #define USE_EQMSE */
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
#define dprintk(args...) \
do { \
if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
} while (0)
struct lgdt330x_state
{
struct i2c_adapter* i2c;
/* Configuration settings */
const struct lgdt330x_config* config;
struct dvb_frontend frontend;
/* Demodulator private data */
fe_modulation_t current_modulation;
u32 snr; /* Result of last SNR calculation */
/* Tuner private data */
u32 current_frequency;
};
static int i2c_write_demod_bytes (struct lgdt330x_state* state,
u8 *buf, /* data bytes to send */
int len /* number of bytes to send */ )
{
struct i2c_msg msg =
{ .addr = state->config->demod_address,
.flags = 0,
.buf = buf,
.len = 2 };
int i;
int err;
for (i=0; i<len-1; i+=2){
if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __func__, msg.buf[0], msg.buf[1], err);
if (err < 0)
return err;
else
return -EREMOTEIO;
}
msg.buf += 2;
}
return 0;
}
/*
* This routine writes the register (reg) to the demod bus
* then reads the data returned for (len) bytes.
*/
static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
enum I2C_REG reg, u8* buf, int len)
{
u8 wr [] = { reg };
struct i2c_msg msg [] = {
{ .addr = state->config->demod_address,
.flags = 0, .buf = wr, .len = 1 },
{ .addr = state->config->demod_address,
.flags = I2C_M_RD, .buf = buf, .len = len },
};
int ret;
ret = i2c_transfer(state->i2c, msg, 2);
if (ret != 2) {
printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __func__, state->config->demod_address, reg, ret);
} else {
ret = 0;
}
return ret;
}
/* Software reset */
static int lgdt3302_SwReset(struct lgdt330x_state* state)
{
u8 ret;
u8 reset[] = {
IRQ_MASK,
0x00 /* bit 6 is active low software reset
* bits 5-0 are 1 to mask interrupts */
};
ret = i2c_write_demod_bytes(state,
reset, sizeof(reset));
if (ret == 0) {
/* force reset high (inactive) and unmask interrupts */
reset[1] = 0x7f;
ret = i2c_write_demod_bytes(state,
reset, sizeof(reset));
}
return ret;
}
static int lgdt3303_SwReset(struct lgdt330x_state* state)
{
u8 ret;
u8 reset[] = {
0x02,
0x00 /* bit 0 is active low software reset */
};
ret = i2c_write_demod_bytes(state,
reset, sizeof(reset));
if (ret == 0) {
/* force reset high (inactive) */
reset[1] = 0x01;
ret = i2c_write_demod_bytes(state,
reset, sizeof(reset));
}
return ret;
}
static int lgdt330x_SwReset(struct lgdt330x_state* state)
{
switch (state->config->demod_chip) {
case LGDT3302:
return lgdt3302_SwReset(state);
case LGDT3303:
return lgdt3303_SwReset(state);
default:
return -ENODEV;
}
}
static int lgdt330x_init(struct dvb_frontend* fe)
{
/* Hardware reset is done using gpio[0] of cx23880x chip.
* I'd like to do it here, but don't know how to find chip address.
* cx88-cards.c arranges for the reset bit to be inactive (high).
* Maybe there needs to be a callable function in cx88-core or
* the caller of this function needs to do it. */
/*
* Array of byte pairs <address, value>
* to initialize each different chip
*/
static u8 lgdt3302_init_data[] = {
/* Use 50MHz parameter values from spec sheet since xtal is 50 */
/* Change the value of NCOCTFV[25:0] of carrier
recovery center frequency register */
VSB_CARRIER_FREQ0, 0x00,
VSB_CARRIER_FREQ1, 0x87,
VSB_CARRIER_FREQ2, 0x8e,
VSB_CARRIER_FREQ3, 0x01,
/* Change the TPCLK pin polarity
data is valid on falling clock */
DEMUX_CONTROL, 0xfb,
/* Change the value of IFBW[11:0] of
AGC IF/RF loop filter bandwidth register */
AGC_RF_BANDWIDTH0, 0x40,
AGC_RF_BANDWIDTH1, 0x93,
AGC_RF_BANDWIDTH2, 0x00,
/* Change the value of bit 6, 'nINAGCBY' and
'NSSEL[1:0] of ACG function control register 2 */
AGC_FUNC_CTRL2, 0xc6,
/* Change the value of bit 6 'RFFIX'
of AGC function control register 3 */
AGC_FUNC_CTRL3, 0x40,
/* Set the value of 'INLVTHD' register 0x2a/0x2c
to 0x7fe */
AGC_DELAY0, 0x07,
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