path: root/drivers/isdn/hardware/mISDN/hfc_multi.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * see notice in hfc_multi.c
 */

#define DEBUG_HFCMULTI_FIFO	0x00010000
#define	DEBUG_HFCMULTI_CRC	0x00020000
#define	DEBUG_HFCMULTI_INIT	0x00040000
#define	DEBUG_HFCMULTI_PLXSD	0x00080000
#define	DEBUG_HFCMULTI_MODE	0x00100000
#define	DEBUG_HFCMULTI_MSG	0x00200000
#define	DEBUG_HFCMULTI_STATE	0x00400000
#define	DEBUG_HFCMULTI_FILL	0x00800000
#define	DEBUG_HFCMULTI_SYNC	0x01000000
#define	DEBUG_HFCMULTI_DTMF	0x02000000
#define	DEBUG_HFCMULTI_LOCK	0x80000000

#define	PCI_ENA_REGIO	0x01
#define	PCI_ENA_MEMIO	0x02

#define XHFC_IRQ	4		/* SIU_IRQ2 */
#define XHFC_MEMBASE	0xFE000000
#define XHFC_MEMSIZE    0x00001000
#define XHFC_OFFSET	0x00001000
#define PA_XHFC_A0	0x0020		/* PA10 */
#define PB_XHFC_IRQ1	0x00000100	/* PB23 */
#define PB_XHFC_IRQ2	0x00000200	/* PB22 */
#define PB_XHFC_IRQ3	0x00000400	/* PB21 */
#define PB_XHFC_IRQ4	0x00000800	/* PB20 */

/*
 * NOTE: some registers are assigned multiple times due to different modes
 *       also registers are assigned differen for HFC-4s/8s and HFC-E1
 */

/*
  #define MAX_FRAME_SIZE	2048
*/

struct hfc_chan {
	struct dchannel	*dch;	/* link if channel is a D-channel */
	struct bchannel	*bch;	/* link if channel is a B-channel */
	int		port;	/* the interface port this */
				/* channel is associated with */
	int		nt_timer; /* -1 if off, 0 if elapsed, >0 if running */
	int		los, ais, slip_tx, slip_rx, rdi; /* current alarms */
	int		jitter;
	u_long		cfg;	/* port configuration */
	int		sync;	/* sync state (used by E1) */
	u_int		protocol; /* current protocol */
	int		slot_tx; /* current pcm slot */
	int		bank_tx; /* current pcm bank */
	int		slot_rx;
	int		bank_rx;
	int		conf;	/* conference setting of TX slot */
	int		txpending;	/* if there is currently data in */
					/* the FIFO 0=no, 1=yes, 2=splloop */
	int		Zfill;	/* rx-fifo level on last hfcmulti_tx */
	int		rx_off; /* set to turn fifo receive off */
	int		coeff_count; /* curren coeff block */
	s32		*coeff; /* memory pointer to 8 coeff blocks */
};


struct hfcm_hw {
	u_char	r_ctrl;
	u_char	r_irq_ctrl;
	u_char	r_cirm;
	u_char	r_ram_sz;
	u_char	r_pcm_md0;
	u_char	r_irqmsk_misc;
	u_char	r_dtmf;
	u_char	r_st_sync;
	u_char	r_sci_msk;
	u_char	r_tx0, r_tx1;
	u_char	a_st_ctrl0[8];
	u_char	r_bert_wd_md;
	timer_t	timer;
};


/* for each stack these flags are used (cfg) */
#define	HFC_CFG_NONCAP_TX	1 /* S/T TX interface has less capacity */
#define	HFC_CFG_DIS_ECHANNEL	2 /* disable E-channel processing */
#define	HFC_CFG_REG_ECHANNEL	3 /* register E-channel */
#define	HFC_CFG_OPTICAL		4 /* the E1 interface is optical */
#define	HFC_CFG_REPORT_LOS	5 /* the card should report loss of signal */
#define	HFC_CFG_REPORT_AIS	6 /* the card should report alarm ind. sign. */
#define	HFC_CFG_REPORT_SLIP	7 /* the card should report bit slips */
#define	HFC_CFG_REPORT_RDI	8 /* the card should report remote alarm */
#define	HFC_CFG_DTMF		9 /* enable DTMF-detection */
#define	HFC_CFG_CRC4		10 /* disable CRC-4 Multiframe mode, */
/* use double frame instead. */

#define HFC_TYPE_E1		1 /* controller is HFC-E1 */
#define HFC_TYPE_4S		4 /* controller is HFC-4S */
#define HFC_TYPE_8S		8 /* controller is HFC-8S */
#define HFC_TYPE_XHFC		5 /* controller is XHFC */

#define	HFC_CHIP_EXRAM_128	0 /* external ram 128k */
#define	HFC_CHIP_EXRAM_512	1 /* external ram 256k */
#define	HFC_CHIP_REVISION0	2 /* old fifo handling */
#define	HFC_CHIP_PCM_SLAVE	3 /* PCM is slave */
#define	HFC_CHIP_PCM_MASTER	4 /* PCM is master */
#define	HFC_CHIP_RX_SYNC	5 /* disable pll sync for pcm */
#define	HFC_CHIP_DTMF		6 /* DTMF decoding is enabled */
#define	HFC_CHIP_CONF		7 /* conference handling is enabled */
#define	HFC_CHIP_ULAW		8 /* ULAW mode */
#define	HFC_CHIP_CLOCK2		9 /* double clock mode */
#define	HFC_CHIP_E1CLOCK_GET	10 /* always get clock from E1 interface */
#define	HFC_CHIP_E1CLOCK_PUT	11 /* always put clock from E1 interface */
#define	HFC_CHIP_WATCHDOG	12 /* whether we should send signals */
/* to the watchdog */
#define	HFC_CHIP_B410P		13 /* whether we have a b410p with echocan in */
/* hw */
#define	HFC_CHIP_PLXSD		14 /* whether we have a Speech-Design PLX */
#define	HFC_CHIP_EMBSD          15 /* whether we have a SD Embedded board */

#define HFC_IO_MODE_PCIMEM	0x00 /* normal memory mapped IO */
#define HFC_IO_MODE_REGIO	0x01 /* PCI io access */
#define HFC_IO_MODE_PLXSD	0x02 /* access HFC via PLX9030 */
#define HFC_IO_MODE_EMBSD	0x03 /* direct access */

/* table entry in the PCI devices list */
struct hm_map {
	char *vendor_name;
	char *card_name;
	int type;
	int ports;
	int clock2;
	int leds;
	int