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|
// SPDX-License-Identifier: GPL-2.0
/*
* IMG PowerDown Controller (PDC)
*
* Copyright 2010-2013 Imagination Technologies Ltd.
*
* Exposes the syswake and PDC peripheral wake interrupts to the system.
*
*/
#include <linux/bitops.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
/* PDC interrupt register numbers */
#define PDC_IRQ_STATUS 0x310
#define PDC_IRQ_ENABLE 0x314
#define PDC_IRQ_CLEAR 0x318
#define PDC_IRQ_ROUTE 0x31c
#define PDC_SYS_WAKE_BASE 0x330
#define PDC_SYS_WAKE_STRIDE 0x8
#define PDC_SYS_WAKE_CONFIG_BASE 0x334
#define PDC_SYS_WAKE_CONFIG_STRIDE 0x8
/* PDC interrupt register field masks */
#define PDC_IRQ_SYS3 0x08
#define PDC_IRQ_SYS2 0x04
#define PDC_IRQ_SYS1 0x02
#define PDC_IRQ_SYS0 0x01
#define PDC_IRQ_ROUTE_WU_EN_SYS3 0x08000000
#define PDC_IRQ_ROUTE_WU_EN_SYS2 0x04000000
#define PDC_IRQ_ROUTE_WU_EN_SYS1 0x02000000
#define PDC_IRQ_ROUTE_WU_EN_SYS0 0x01000000
#define PDC_IRQ_ROUTE_WU_EN_WD 0x00040000
#define PDC_IRQ_ROUTE_WU_EN_IR 0x00020000
#define PDC_IRQ_ROUTE_WU_EN_RTC 0x00010000
#define PDC_IRQ_ROUTE_EXT_EN_SYS3 0x00000800
#define PDC_IRQ_ROUTE_EXT_EN_SYS2 0x00000400
#define PDC_IRQ_ROUTE_EXT_EN_SYS1 0x00000200
#define PDC_IRQ_ROUTE_EXT_EN_SYS0 0x00000100
#define PDC_IRQ_ROUTE_EXT_EN_WD 0x00000004
#define PDC_IRQ_ROUTE_EXT_EN_IR 0x00000002
#define PDC_IRQ_ROUTE_EXT_EN_RTC 0x00000001
#define PDC_SYS_WAKE_RESET 0x00000010
#define PDC_SYS_WAKE_INT_MODE 0x0000000e
#define PDC_SYS_WAKE_INT_MODE_SHIFT 1
#define PDC_SYS_WAKE_PIN_VAL 0x00000001
/* PDC interrupt constants */
#define PDC_SYS_WAKE_INT_LOW 0x0
#define PDC_SYS_WAKE_INT_HIGH 0x1
#define PDC_SYS_WAKE_INT_DOWN 0x2
#define PDC_SYS_WAKE_INT_UP 0x3
#define PDC_SYS_WAKE_INT_CHANGE 0x6
#define PDC_SYS_WAKE_INT_NONE 0x4
/**
* struct pdc_intc_priv - private pdc interrupt data.
* @nr_perips: Number of peripheral interrupt signals.
* @nr_syswakes: Number of syswake signals.
* @perip_irqs: List of peripheral IRQ numbers handled.
* @syswake_irq: Shared PDC syswake IRQ number.
* @domain: IRQ domain for PDC peripheral and syswake IRQs.
* @pdc_base: Base of PDC registers.
* @irq_route: Cached version of PDC_IRQ_ROUTE register.
* @lock: Lock to protect the PDC syswake registers and the cached
* values of those registers in this struct.
*/
struct pdc_intc_priv {
unsigned int nr_perips;
unsigned int nr_syswakes;
unsigned int *perip_irqs;
unsigned int syswake_irq;
struct irq_domain *domain;
void __iomem *pdc_base;
u32 irq_route;
raw_spinlock_t lock;
};
static void pdc_write(struct pdc_intc_priv *priv, unsigned int reg_offs,
unsigned int data)
{
iowrite32(data, priv->pdc_base + reg_offs);
}
static unsigned int pdc_read(struct pdc_intc_priv *priv,
unsigned int reg_offs)
{
return ioread32(priv->pdc_base + reg_offs);
}
/* Generic IRQ callbacks */
#define SYS0_HWIRQ 8
static unsigned int hwirq_is_syswake(irq_hw_number_t hw)
{
return hw >= SYS0_HWIRQ;
}
static unsigned int hwirq_to_syswake(irq_hw_number_t hw)
{
return hw - SYS0_HWIRQ;
}
static irq_hw_number_t syswake_to_hwirq(unsigned int syswake)
{
return SYS0_HWIRQ + syswake;
}
static struct pdc_intc_priv *irqd_to_priv(struct irq_data *data)
{
return (struct pdc_intc_priv *)data->domain->host_data;
}
/*
* perip_irq_mask() and perip_irq_unmask() use IRQ_ROUTE which also contains
* wake bits, therefore we cannot use the generic irqchip mask callbacks as they
* cache the mask.
*/
static void perip_irq_mask(struct irq_data *data)
{
struct pdc_intc_priv *priv = irqd_to_priv(data);
raw_spin_lock(&priv->lock);
priv->irq_route &= ~data->mask;
pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route);
raw_spin_unlock(&priv->lock);
}
static void perip_irq_unmask(struct irq_data *data)
{
struct pdc_intc_priv *priv = irqd_to_priv(data);
raw_spin_lock(&priv->lock);
priv->irq_route |= data->mask;
pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route);
raw_spin_unlock(&priv->lock);
}
static int syswake_irq_set_type(struct irq_data *data, unsigned int flow_type)
{
struct pdc_intc_priv *priv = irqd_to_priv(data);
unsigned int syswake = hwirq_to_syswake(data->hwirq);
unsigned int irq_mode;
unsigned int soc_sys_wake_regoff, soc_sys_wake;
/* translate to syswake IRQ mode */
switch (flow_type) {
case IRQ_TYPE_EDGE_BOTH:
irq_mode = PDC_SYS_WAKE_INT_CHANGE;
break;
case IRQ_TYPE_EDGE_RISING:
irq_mode = PDC_SYS_WAKE_INT_UP;
break;
case IRQ_TYPE_EDGE_FALLING:
irq_mode = PDC_SYS_WAKE_INT_DOWN;
break;
case IRQ_TYPE_LEVEL_HIGH:
irq_mode = PDC_SYS_WAKE_INT_HIGH;
break;
case IRQ_TYPE_LEVEL_LOW:
irq_mode = PDC_SYS_WAKE_INT_LOW;
break;
default:
return -EINVAL;
}
raw_spin_lock(&priv->lock);
/* set the IRQ mode */
soc_sys_wake_regoff = PDC_SYS_WAKE_BASE + syswake*PDC_SYS_WAKE_STRIDE;
soc_sys_wake = pdc_read(priv, soc_sys_wake_regoff);
soc_sys_wake &= ~PDC_SYS_WAKE_INT_MODE;
soc_sys_wake |= irq_mode << PDC_SYS_WAKE_INT_MODE_SHIFT;
pdc_write(priv, soc_sys_wake_regoff, soc_sys_wake);
/* and update the handler */
irq_setup_alt_chip(data, flow_type);
raw_spin_unlock(&priv->lock);
return 0;
}
/* applies to both peripheral and syswake interrupts */
static int pdc_irq_set_wake(struct irq_data *data, unsigned int on)
{
struct pdc_intc_priv *priv = irqd_to_priv(data);
irq_hw_number_t hw = data->hwirq;
unsigned int mask = (1 << 16) << hw;
unsigned int dst_irq;
raw_spin_lock(&priv->lock);
if (on)
priv->irq_route |= mask;
else
priv->irq_route &= ~mask;
pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route);
raw_spin_unlock(&priv->lock);
/* control the destination IRQ wakeup too for standby mode */
if (hwirq_is_syswake(hw))
dst_irq = priv->syswake_irq;
else
dst_irq = priv->perip_irqs[hw];
irq_set_irq_wake(dst_irq, on);
return 0;
}
static void pdc_intc_perip_isr(struct irq_desc *desc)
{
unsigned int irq = irq_desc_get_irq(desc);
struct pdc_intc_priv *priv;
unsigned int i, irq_no;
priv = (struct pdc_intc_priv *)irq_desc_get_handler_data(desc);
/* find the peripheral number */
for (i = 0; i < priv->nr_perips; ++i)
if (irq == priv->perip_irqs[i])
goto found;
/* should never get here */
return;
found:
/* pass on the interrupt */
irq_no = irq_linear_revmap(priv->domain, i);
generic_handle_irq(irq_no);
}
static void pdc_intc_syswake_isr(struct irq_desc *desc)
{
struct pdc_intc_priv *priv;
unsigned int syswake, irq_no;
unsigned int status;
priv = (struct pdc_intc_priv *)irq_desc_get_handler_data(desc);
status = pdc_read(priv, PDC_IRQ_STATUS) &
pdc_read(priv, PDC_IRQ_ENABLE);
status &= (1 << priv->nr_syswakes) - 1;
for (syswake = 0; status; status >>= 1, ++syswake) {
/* Has this sys_wake triggered? */
if (!(status & 1))
continue;
irq_no = irq_linear_revmap(priv->domain,
syswake_to_hwirq(syswake));
generic_handle_irq(irq_no);
}
}
static void pdc_intc_setup(struct pdc_intc_priv *priv)
{
int i;
unsigned int soc_sys_wake_regoff;
unsigned int soc_sys_wake;
/*
* Mask all syswake interrupts before routing, or we could receive an
* interrupt before we're ready to handle it.
*/
pdc_write(priv, PDC_IRQ_ENABLE, 0);
/*
* Enable routing of all syswakes
* Disable all wake sources
*/
priv->irq_route = ((PDC_IRQ_ROUTE_EXT_EN_SYS0 << priv->nr_syswakes) -
PDC_IRQ_ROUTE_EXT_EN_SYS0);
pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route);
/* Initialise syswake IRQ */
for (i = 0; i < priv->nr_syswakes; ++i) {
/* set the IRQ mode to none */
soc_sys_wake_regoff = PDC_SYS_WAKE_BASE + i*PDC_SYS_WAKE_STRIDE;
soc_sys_wake = PDC_SYS_WAKE_INT_NONE
<< PDC_SYS_WAKE_INT_MODE_SHIFT;
pdc_write(priv, soc_sys_wake_regoff, soc_sys_wake);
}
}
static int pdc_intc_probe(struct
|