// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) ST-Ericsson SA 2010
*
* Author: Arun R Murthy <arun.murthy@stericsson.com>
* Author: Daniel Willerud <daniel.willerud@stericsson.com>
* Author: Johan Palsson <johan.palsson@stericsson.com>
* Author: M'boumba Cedric Madianga
* Author: Linus Walleij <linus.walleij@linaro.org>
*
* AB8500 General Purpose ADC driver. The AB8500 uses reference voltages:
* VinVADC, and VADC relative to GND to do its job. It monitors main and backup
* battery voltages, AC (mains) voltage, USB cable voltage, as well as voltages
* representing the temperature of the chip die and battery, accessory
* detection by resistance measurements using relative voltages and GSM burst
* information.
*
* Some of the voltages are measured on external pins on the IC, such as
* battery temperature or "ADC aux" 1 and 2. Other voltages are internal rails
* from other parts of the ASIC such as main charger voltage, main and battery
* backup voltage or USB VBUS voltage. For this reason drivers for other
* parts of the system are required to obtain handles to the ADC to do work
* for them and the IIO driver provides arbitration among these consumers.
*/
#include <linux/init.h>
#include <linux/bits.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/pm_runtime.h>
#include <linux/platform_device.h>
#include <linux/completion.h>
#include <linux/regulator/consumer.h>
#include <linux/random.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/mfd/abx500.h>
#include <linux/mfd/abx500/ab8500.h>
/* GPADC register offsets and bit definitions */
#define AB8500_GPADC_CTRL1_REG 0x00
/* GPADC control register 1 bits */
#define AB8500_GPADC_CTRL1_DISABLE 0x00
#define AB8500_GPADC_CTRL1_ENABLE BIT(0)
#define AB8500_GPADC_CTRL1_TRIG_ENA BIT(1)
#define AB8500_GPADC_CTRL1_START_SW_CONV BIT(2)
#define AB8500_GPADC_CTRL1_BTEMP_PULL_UP BIT(3)
/* 0 = use rising edge, 1 = use falling edge */
#define AB8500_GPADC_CTRL1_TRIG_EDGE BIT(4)
/* 0 = use VTVOUT, 1 = use VRTC as pull-up supply for battery temp NTC */
#define AB8500_GPADC_CTRL1_PUPSUPSEL BIT(5)
#define AB8500_GPADC_CTRL1_BUF_ENA BIT(6)
#define AB8500_GPADC_CTRL1_ICHAR_ENA BIT(7)
#define AB8500_GPADC_CTRL2_REG 0x01
#define AB8500_GPADC_CTRL3_REG 0x02
/*
* GPADC control register 2 and 3 bits
* the bit layout is the same for SW and HW conversion set-up
*/
#define AB8500_GPADC_CTRL2_AVG_1 0x00
#define AB8500_GPADC_CTRL2_AVG_4 BIT(5)
#define AB8500_GPADC_CTRL2_AVG_8 BIT(6)
#define AB8500_GPADC_CTRL2_AVG_16 (BIT(5) | BIT(6))
enum ab8500_gpadc_channel {
AB8500_GPADC_CHAN_UNUSED = 0x00,
AB8500_GPADC_CHAN_BAT_CTRL = 0x01,
AB8500_GPADC_CHAN_BAT_TEMP = 0x02,
/* This is not used on AB8505 */
AB8500_GPADC_CHAN_MAIN_CHARGER = 0x03,
AB8500_GPADC_CHAN_ACC_DET_1 = 0x04,
AB8500_GPADC_CHAN_ACC_DET_2 = 0x05,
AB8500_GPADC_CHAN_ADC_AUX_1 = 0x06,
AB8500_GPADC_CHAN_ADC_AUX_2 = 0x07,
AB8500_GPADC_CHAN_VBAT_A = 0x08,
AB8500_GPADC_CHAN_VBUS = 0x09,
AB8500_GPADC_CHAN_MAIN_CHARGER_CURRENT = 0x0a,
AB8500_GPADC_CHAN_USB_CHARGER_CURRENT = 0x0b,
AB8500_GPADC_CHAN_BACKUP_BAT = 0x0c,
/* Only on AB8505 */
AB8505_GPADC_CHAN_DIE_TEMP = 0x0d,
AB8500_GPADC_CHAN_ID = 0x0e,
AB8500_GPADC_CHAN_INTERNAL_TEST_1 = 0x0f,
AB8500_GPADC_CHAN_INTERNAL_TEST_2 = 0x10,
AB8500_GPADC_CHAN_INTERNAL_TEST_3 = 0x11,
/* FIXME: Applicable to all ASIC variants? */
AB8500_GPADC_CHAN_XTAL_TEMP = 0x12,
AB8500_GPADC_CHAN_VBAT_TRUE_MEAS = 0x13,
/* FIXME: Doesn't seem to work with pure AB8500 */
AB8500_GPADC_CHAN_BAT_CTRL_AND_IBAT = 0x1c,
AB8500_GPADC_CHAN_VBAT_MEAS_AND_IBAT = 0x1d,
AB8500_GPADC_CHAN_VBAT_TRUE_MEAS_AND_IBAT = 0x1e,
AB8500_GPADC_CHAN_BAT_TEMP_AND_IBAT = 0x1f,
/*
* Virtual channel used only for ibat conversion to ampere.
* Battery current conversion (ibat) cannot be requested as a
* single conversion but it is always requested in combination
* with other input requests.
*/
AB8500_GPADC_CHAN_IBAT_VIRTUAL = 0xFF,
};
#define AB8500_GPADC_AUTO_TIMER_REG 0x03
#define AB8500_GPADC_STAT_REG 0x04
#define AB8500_GPADC_STAT_BUSY BIT(0)
#define AB8500_GPADC_MANDATAL_REG 0x05
#define AB8500_GPADC_MANDATAH_REG 0x06
#define AB8500_GPADC_AUTODATAL_REG 0x07
#define AB8500_GPADC_AUTODATAH_REG 0x08
#define AB8500_GPADC_MUX_CTRL_REG 0x09
#define AB8540_GPADC_MANDATA2L_REG 0x09
#define AB8540_GPADC_MANDATA2H_REG 0x0A
#define AB8540_GPADC_APEAAX_REG 0x10
#define AB8540_GPADC_APEAAT_REG 0x11
#define AB8540_GPADC_APEAAM_REG 0x12
#define AB8540_GPADC_APEAAH_REG 0x13
#define AB8540_GPADC_APEAAL_REG 0x14
/*
* OTP register offsets
* Bank : 0x15
*/
#define AB8500_GPADC_CAL_1 0x0F
#define AB8500_GPADC_CAL_2 0x10
#define AB8500_GPADC_CAL_3 0x11
#define AB8500_GPADC_CAL_4 0x12
#define AB8500_GPADC_CAL_5 0x13
#define AB8500_GPADC_CAL_6 0x14
#define AB8500_GPADC_CAL_7 0x15
/* New calibration for 8540 */
#define AB8540_GPADC_OTP4_REG_7 0x38
#define AB8540_GPADC_OTP4_REG_6 0x39
#define AB8540_GPADC_OTP4_REG_5 0x3A
#define AB8540_GPADC_DIS_ZERO 0x00
#define AB8540_GPADC_EN_VBIAS_XTAL_TEMP 0x02
/* GPADC constants from AB8500 spec, UM0836 */
#define AB8500_ADC_RESOLUTION 1024
#define AB8500_ADC_CH_BTEMP_MIN 0
#define AB8500_ADC_CH_BTEMP_MAX 1350
#define AB8500_ADC_CH_DIETEMP_MIN 0
#define AB8500_ADC_CH_DIETEMP_MAX 1350
#define AB8500_ADC_CH_CHG_V_MIN 0
#define AB8500_ADC_CH_CHG_V_MAX 20030
#define AB8500_ADC_CH_ACCDET2_MIN 0
#define AB8500_ADC_CH_ACCDET2_MAX 2500
#define AB8500_ADC_CH_VBAT_MIN 2300
#define AB8500_ADC_CH_VBAT_MAX 4800
#define AB8500_ADC_CH_CHG_I_MIN 0
#define AB8500_ADC_CH_CHG_I_MAX 1500
#define AB8500_ADC_CH_BKBAT_MIN 0
#define AB8500_ADC_CH_BKBAT_MAX 3200
/* GPADC constants from AB8540 spec */
#define AB8500_ADC_CH_IBAT_MIN (-6000) /* mA range measured by ADC for ibat */
#define AB8500_ADC_CH_IBAT_MAX 6000
#define AB8500_ADC_CH_IBAT_MIN_V (-60) /* mV range measured by ADC for ibat */
#define AB8500_ADC_CH_IBAT_MAX_V 60
#define AB8500_GPADC_IBAT_VDROP_L (