/*
* Copyright 2018 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#include <linux/uaccess.h>
#include <drm/drm_debugfs.h>
#include "dc.h"
#include "amdgpu.h"
#include "amdgpu_dm.h"
#include "amdgpu_dm_debugfs.h"
#include "dm_helpers.h"
#include "dmub/dmub_srv.h"
struct dmub_debugfs_trace_header {
uint32_t entry_count;
uint32_t reserved[3];
};
struct dmub_debugfs_trace_entry {
uint32_t trace_code;
uint32_t tick_count;
uint32_t param0;
uint32_t param1;
};
/* function description
* get/ set DP configuration: lane_count, link_rate, spread_spectrum
*
* valid lane count value: 1, 2, 4
* valid link rate value:
* 06h = 1.62Gbps per lane
* 0Ah = 2.7Gbps per lane
* 0Ch = 3.24Gbps per lane
* 14h = 5.4Gbps per lane
* 1Eh = 8.1Gbps per lane
*
* debugfs is located at /sys/kernel/debug/dri/0/DP-x/link_settings
*
* --- to get dp configuration
*
* cat link_settings
*
* It will list current, verified, reported, preferred dp configuration.
* current -- for current video mode
* verified --- maximum configuration which pass link training
* reported --- DP rx report caps (DPCD register offset 0, 1 2)
* preferred --- user force settings
*
* --- set (or force) dp configuration
*
* echo <lane_count> <link_rate> > link_settings
*
* for example, to force to 2 lane, 2.7GHz,
* echo 4 0xa > link_settings
*
* spread_spectrum could not be changed dynamically.
*
* in case invalid lane count, link rate are force, no hw programming will be
* done. please check link settings after force operation to see if HW get
* programming.
*
* cat link_settings
*
* check current and preferred settings.
*
*/
static ssize_t dp_link_settings_read(struct file *f, char __user *buf,
size_t size, loff_t *pos)
{
struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
struct dc_link *link = connector->dc_link;
char *rd_buf = NULL;
char *rd_buf_ptr = NULL;
const uint32_t rd_buf_size = 100;
uint32_t result = 0;
uint8_t str_len = 0;
int r