linux - Contrib clone of linux

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author	Kees Cook <keescook@chromium.org>	2012-11-15 22:12:17 +0100
committer	Russell King <rmk+kernel@arm.linux.org.uk>	2012-11-19 14:14:18 +0000
commit	ad75b51459ae076a0d406391496f81b897bf6992 (patch)
tree	c34449b78cd833c2506237eb09d8cd291a2b63c3 /arch/arm/kernel/entry-common.S
parent	9b790d71d58be65f9508ab60920eb978af828412 (diff)

ARM: 7579/1: arch/allow a scno of -1 to not cause a SIGILL

On tracehook-friendly platforms, a system call number of -1 falls through without running much code or taking much action. ARM is different. This adds a short-circuit check in the trace path to avoid any additional work, as suggested by Russell King, to make sure that ARM behaves the same way as other platforms. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Will Drewry <wad@chromium.org> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Diffstat (limited to 'arch/arm/kernel/entry-common.S')

-rw-r--r--

arch/arm/kernel/entry-common.S

1 files changed, 4 insertions, 1 deletions

/* * Copyright (C) 2015 Atmel Corporation, * Nicolas Ferre <nicolas.ferre@atmel.com> * * Based on clk-programmable & clk-peripheral drivers by Boris BREZILLON. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * */ #include <linux/clk-provider.h> #include <linux/clkdev.h> #include <linux/clk/at91_pmc.h> #include <linux/of.h> #include <linux/mfd/syscon.h> #include <linux/regmap.h> #include "pmc.h" #define PERIPHERAL_MAX 64 #define PERIPHERAL_ID_MIN 2 #define GENERATED_SOURCE_MAX 6 #define GENERATED_MAX_DIV 255 struct clk_generated { struct clk_hw hw; struct regmap *regmap; struct clk_range range; spinlock_t *lock; u32 id; u32 gckdiv; u8 parent_id; }; #define to_clk_generated(hw) \ container_of(hw, struct clk_generated, hw) static int clk_generated_enable(struct clk_hw *hw) { struct clk_generated *gck = to_clk_generated(hw); unsigned long flags; pr_debug("GCLK: %s, gckdiv = %d, parent id = %d\n", __func__, gck->gckdiv, gck->parent_id); spin_lock_irqsave(gck->lock, flags); regmap_write(gck->regmap, AT91_PMC_PCR, (gck->id & AT91_PMC_PCR_PID_MASK)); regmap_update_bits(gck->regmap, AT91_PMC_PCR, AT91_PMC_PCR_GCKDIV_MASK | AT91_PMC_PCR_GCKCSS_MASK | AT91_PMC_PCR_CMD | AT91_PMC_PCR_GCKEN, AT91_PMC_PCR_GCKCSS(gck->parent_id) | AT91_PMC_PCR_CMD | AT91_PMC_PCR_GCKDIV(gck->gckdiv) | AT91_PMC_PCR_GCKEN); spin_unlock_irqrestore(gck->lock, flags); return 0; } static void clk_generated_disable(struct clk_hw *hw) { struct clk_generated *gck = to_clk_generated(hw); unsigned long flags; spin_lock_irqsave(gck->lock, flags); regmap_write(gck->regmap, AT91_PMC_PCR, (gck->id & AT91_PMC_PCR_PID_MASK)); regmap_update_bits(gck->regmap, AT91_PMC_PCR, AT91_PMC_PCR_CMD | AT91_PMC_PCR_GCKEN, AT91_PMC_PCR_CMD); spin_unlock_irqrestore(gck->lock, flags); } static int clk_generated_is_enabled(struct clk_hw *hw) { struct clk_generated *gck = to_clk_generated(hw); unsigned long flags; unsigned int status; spin_lock_irqsave(gck->lock, flags); regmap_write(gck->regmap, AT91_PMC_PCR, (gck->id & AT91_PMC_PCR_PID_MASK)); regmap_read(gck->regmap, AT91_PMC_PCR, &status); spin_unlock_irqrestore(gck->lock, flags); return status & AT91_PMC_PCR_GCKEN ? 1 : 0; } static unsigned long clk_generated_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { struct clk_generated *gck = to_clk_generated(hw); return DIV_ROUND_CLOSEST(parent_rate, gck->gckdiv + 1); } static int clk_generated_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { struct clk_generated *gck = to_clk_generated(hw); struct clk_hw *parent = NULL; long best_rate = -EINVAL; unsigned long tmp_rate, min_rate; int best_diff = -1; int tmp_diff; int i; for (i = 0; i < clk_hw_get_num_parents(hw); i++) { u32 div; unsigned long parent_rate; parent = clk_hw_get_parent_by_index(hw, i); if (!parent) continue; parent_rate = clk_hw_get_rate(parent); min_rate = DIV_ROUND_CLOSEST(parent_rate, GENERATED_MAX_DIV + 1); if (!parent_rate || (gck->range.max && min_rate > gck->range.max)) continue; for (div = 1; div < GENERATED_MAX_DIV + 2; div++) { tmp_rate = DIV_ROUND_CLOSEST(parent_rate, div); tmp_diff = abs(req->rate - tmp_rate); if (best_diff < 0 || best_diff > tmp_diff) { best_rate = tmp_rate; best_diff = tmp_diff; req->best_parent_rate = parent_rate; req->best_parent_hw = parent; } if (!best_diff || tmp_rate < req->rate) break; } if (!best_diff) break; } pr_debug("GCLK: %s, best_rate = %ld, parent clk: %s @ %ld\n", __func__, best_rate, __clk_get_name((req->best_parent_hw)->clk), req->best_parent_rate); if (best_rate < 0) return best_rate; req->rate = best_rate; return 0; } /* No modification of hardware as we have the flag CLK_SET_PARENT_GATE set */ static int clk_generated_set_parent(struct clk_hw *hw, u8 index) { struct clk_generated *gck = to_clk_generated(hw); if (index >= clk_hw_get_num_parents(hw)) return -EINVAL; gck->parent_id = index; return 0; } static u8 clk_generated_get_parent(struct clk_hw *hw) { struct clk_generated *gck = to_clk_generated(hw); return gck->parent_id; } /* No modification of hardware as we have the flag CLK_SET_RATE_GATE set */ static int clk_generated_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct clk_generated *gck = to_clk_generated(hw); u32 div; if (!rate) return -EINVAL; if (gck->range.max && rate > gck->range.max) return -EINVAL; div = DIV_ROUND_CLOSEST(parent_rate, rate); if (div > GENERATED_MAX_DIV + 1 || !div) return -EINVAL; gck->gckdiv = div - 1; return 0; } static const struct clk_ops generated_ops = { .enable = clk_generated_enable, .disable = clk_generated_disable, .is_enabled = clk_generated_is_enabled, .recalc_rate = clk_generated_recalc_rate, .determine_rate = clk_generated_determine_rate, .get_parent = clk_generated_get_parent, .set_parent = clk_generated_set_parent, .set_rate = clk_generated_set_rate, }; /** * clk_generated_startup - Initialize a given clock to its default parent and * divisor parameter. * * @gck: Generated clock to set the startup parameters for. * * Take parameters from the hardware and update local clock configuration * accordingly. */ static void clk_generated_startup(struct clk_generated *gck) { u32 tmp; unsigned long flags; spin_lock_irqsave(gck->lock, flags); regmap_write(gck->regmap, AT91_PMC_PCR, (gck->id & AT91_PMC_PCR_PID_MASK)); regmap_read(gck->regmap, AT91_PMC_PCR, &tmp); spin_unlock_irqrestore(gck->lock, flags); gck->parent_id = (tmp & AT91_PMC_PCR_GCKCSS_MASK) >> AT91_PMC_PCR_GCKCSS_OFFSET; gck->gckdiv = (tmp & AT91_PMC_PCR_GCKDIV_MASK) >> AT91_PMC_PCR_GCKDIV_OFFSET; } static struct clk_hw * __init at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, const char *name, const char **parent_names, u8 num_parents, u8 id, const struct clk_range *range) { struct clk_generated *gck; struct clk_init_data init; struct clk_hw *hw; int ret; gck = kzalloc(sizeof(*gck), GFP_KERNEL); if (!gck) return ERR_PTR(-ENOMEM); init.name = name; init.ops = &generated_ops; init.parent_names = parent_names; init.num_parents = num_parents; init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; gck->id = id; gck->hw.init = &init; gck->regmap = regmap; gck->lock = lock; gck->range = *range; hw = &gck->hw; ret = clk_hw_register(NULL, &gck->hw); if (ret) { kfree(gck); hw = ERR_PTR(ret); } else clk_generated_startup(gck); return hw; } static void __init of_sama5d2_clk_generated_setup(struct device_node *np) { int num; u32 id; const char *


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