1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
|
/*****************************************************************************
* Copyright 2004 - 2008 Broadcom Corporation. All rights reserved.
*
* Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
* under the terms of the GNU General Public License version 2, available at
* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
*
* Notwithstanding the above, under no circumstances may you combine this
* software in any way with any other Broadcom software provided under a
* license other than the GPL, without Broadcom's express prior written
* consent.
*****************************************************************************/
/****************************************************************************/
/**
* @file dma.h
*
* @brief API definitions for the linux DMA interface.
*/
/****************************************************************************/
#if !defined(ASM_ARM_ARCH_BCMRING_DMA_H)
#define ASM_ARM_ARCH_BCMRING_DMA_H
/* ---- Include Files ---------------------------------------------------- */
#include <linux/kernel.h>
#include <linux/wait.h>
#include <linux/semaphore.h>
#include <csp/dmacHw.h>
#include <mach/timer.h>
#include <linux/scatterlist.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/vmalloc.h>
#include <linux/pagemap.h>
/* ---- Constants and Types ---------------------------------------------- */
/* If DMA_DEBUG_TRACK_RESERVATION is set to a non-zero value, then the filename */
/* and line number of the reservation request will be recorded in the channel table */
#define DMA_DEBUG_TRACK_RESERVATION 1
#define DMA_NUM_CONTROLLERS 2
#define DMA_NUM_CHANNELS 8 /* per controller */
typedef enum {
DMA_DEVICE_MEM_TO_MEM, /* For memory to memory transfers */
DMA_DEVICE_I2S0_DEV_TO_MEM,
DMA_DEVICE_I2S0_MEM_TO_DEV,
DMA_DEVICE_I2S1_DEV_TO_MEM,
DMA_DEVICE_I2S1_MEM_TO_DEV,
DMA_DEVICE_APM_CODEC_A_DEV_TO_MEM,
DMA_DEVICE_APM_CODEC_A_MEM_TO_DEV,
DMA_DEVICE_APM_CODEC_B_DEV_TO_MEM,
DMA_DEVICE_APM_CODEC_B_MEM_TO_DEV,
DMA_DEVICE_APM_CODEC_C_DEV_TO_MEM, /* Additional mic input for beam-forming */
DMA_DEVICE_APM_PCM0_DEV_TO_MEM,
DMA_DEVICE_APM_PCM0_MEM_TO_DEV,
DMA_DEVICE_APM_PCM1_DEV_TO_MEM,
DMA_DEVICE_APM_PCM1_MEM_TO_DEV,
DMA_DEVICE_SPUM_DEV_TO_MEM,
DMA_DEVICE_SPUM_MEM_TO_DEV,
DMA_DEVICE_SPIH_DEV_TO_MEM,
DMA_DEVICE_SPIH_MEM_TO_DEV,
DMA_DEVICE_UART_A_DEV_TO_MEM,
DMA_DEVICE_UART_A_MEM_TO_DEV,
DMA_DEVICE_UART_B_DEV_TO_MEM,
DMA_DEVICE_UART_B_MEM_TO_DEV,
DMA_DEVICE_PIF_MEM_TO_DEV,
DMA_DEVICE_PIF_DEV_TO_MEM,
DMA_DEVICE_ESW_DEV_TO_MEM,
DMA_DEVICE_ESW_MEM_TO_DEV,
DMA_DEVICE_VPM_MEM_TO_MEM,
DMA_DEVICE_CLCD_MEM_TO_MEM,
DMA_DEVICE_NAND_MEM_TO_MEM,
DMA_DEVICE_MEM_TO_VRAM,
DMA_DEVICE_VRAM_TO_MEM,
/* Add new entries before this line. */
DMA_NUM_DEVICE_ENTRIES,
DMA_DEVICE_NONE = 0xff, /* Special value to indicate that no device is currently assigned. */
} DMA_Device_t;
/****************************************************************************
*
* The DMA_Handle_t is the primary object used by callers of the API.
*
*****************************************************************************/
#define DMA_INVALID_HANDLE ((DMA_Handle_t) -1)
typedef int DMA_Handle_t;
/****************************************************************************
*
* The DMA_DescriptorRing_t contains a ring of descriptors which is used
* to point to regions of memory.
*
*****************************************************************************/
typedef struct {
void *virtAddr; /* Virtual Address of the descriptor ring */
dma_addr_t physAddr; /* Physical address of the descriptor ring */
int descriptorsAllocated; /* Number of descriptors allocated in the descriptor ring */
size_t bytesAllocated; /* Number of bytes allocated in the descriptor ring */
} DMA_DescriptorRing_t;
/****************************************************************************
*
* The DMA_MemType_t and DMA_MemMap_t are helper structures used to setup
* DMA chains from a variety of memory sources.
*
*****************************************************************************/
#define DMA_MEM_MAP_MIN_SIZE 4096 /* Pages less than this size are better */
/* off not being DMA'd. */
typedef enum {
DMA_MEM_TYPE_NONE, /* Not a valid setting */
DMA_MEM_TYPE_VMALLOC, /* Memory came from vmalloc call */
DMA_MEM_TYPE_KMALLOC, /* Memory came from kmalloc call */
DMA_MEM_TYPE_DMA, /* Memory came from dma_alloc_xxx call */
DMA_MEM_TYPE_USER, /* Memory came from user space. */
} DMA_MemType_t;
/* A segment represents a physically and virtually contiguous chunk of memory. */
/* i.e. each segment can be DMA'd */
/* A user of the DMA code will add memory regions. Each region may need to be */
/* represented by one or more segments. */
typedef struct {
void *virtAddr; /* Virtual address used for this segment */
dma_addr_t physAddr; /* Physical address this segment maps to */
size_t numBytes; /* Size of the segment, in bytes */
} DMA_Segment_t;
/* A region represents a virtually contiguous chunk of memory, which may be */
/* made up of multiple segments. */
typedef struct {
DMA_MemType_t memType;
void *virtAddr;
size_t numBytes;
/* Each region (virtually contiguous) consists of one or more segments. Each */
/* segment is virtually and physically contiguous. */
int numSegmentsUsed;
int numSegmentsAllocated;
DMA_Segment_t *segment;
/* When a region corresponds to user memory, we need to lock all of the pages */
/* down before we can figure out the physical addresses. The lockedPage array contains */
/* the pages that were locked, and which subsequently need to be unlocked once the */
/* memory is unmapped. */
unsigned numLockedPages;
struct page **lockedPages;
} DMA_Region_t;
typedef struct {
int inUse; /* Is this mapping currently being used? */
struct semaphore lock; /* Acquired when using this structure */
enum dma_data_direction dir; /* Direction this transfer is intended for */
/* In the event that we're mapping user memory, we need to know which task */
/* the memory is for, so that we can obtain the correct mm locks. */
struct task_struct *userTask;
int numRegionsUsed;
int numRegionsAllocated;
DMA_Region_t *region;
} DMA_MemMap_t;
/****************************************************************************
*
* The DMA_DeviceAttribute_t contains information which describes a
* particular DMA device (or peripheral).
*
* It is anticipated that the arrary of DMA_DeviceAttribute_t's will be
* statically initialized.
*
*****************************************************************************/
/* The device handler is called whenever a DMA operation completes. The reaon */
/* for it to be called will be a bitmask with one or more of the following bits */
/* set. */
#define DMA_HANDLER_REASON_BLOCK_COMPLETE dmacHw_INTERRUPT_STATUS_BLOCK
#define DMA_HANDLER_REASON_TRANSFER_COMPLETE dmacHw_INTERRUPT_STATUS_TRANS
#define DMA_HANDLER_REASON_ERROR dmacHw_INTERRUPT_STATUS_ERROR
typedef void (*DMA_DeviceHandler_t) (DMA_Device_t dev, int reason,
void *userData);
#define DMA_DEVICE_FLAG_ON_DMA0 0x00000001
#define DMA_DEVICE_FLAG_ON_DMA1 0x00000002
#define DMA_DEVICE_FLAG_PORT_PER_DMAC 0x00000004 /* If set, it means that the port used on DMAC0 is different from the port used on DMAC1 */
#define DMA_DEVICE_FLAG_ALLOC_DMA1_FIRST 0x00000008 /* If set, allocate from DMA1 before allocating from DMA0 */
#define DMA_DEVICE_FLAG_IS_DEDICATED 0x00000100
#define DMA_DEVICE_FLAG_NO_ISR 0x00000200
#define DMA_DEVICE_FLAG_ALLOW_LARGE_FIFO 0x00000400
#define DMA_DEVICE_FLAG_IN_USE 0x00000800 /* If set, device is in use on a channel */
/* Note: Some DMA devices can be used from multiple DMA Controllers. The bitmask is used to */
/* determine which DMA controllers a given device can be used from, and the interface */
/* array determeines the actual interface number to use for a given controller. */
typedef struct {
uint32_t flags; /* Bitmask of DMA_DEVICE_FLAG_xxx constants */
uint8_t dedicatedController; /* Controller number to use if DMA_DEVICE_FLAG_IS_DEDICATED is set. */
uint8_t dedicatedChannel; /* Channel number to use if DMA_DEVICE_FLAG_IS_DEDICATED is set. */
const char *name; /* Will show up in the /proc entry */
uint32_t dmacPort[DMA_NUM_CONTROLLERS]; /* Specifies the port number when DMA_DEVICE_FLAG_PORT_PER_DMAC flag is set */
dmacHw_CONFIG_t config; /* Configuration to use when DMA'ing using this device */
void *userData; /* Passed to the devHandler */
DMA_DeviceHandler_t devHandler; /* Called when DMA operations finish. */
timer_tick_count_t transferStartTime; /* Time the current transfer was started */
/* The following statistical information will be collected and presented in a proc entry. */
/* Note: With a contiuous bandwidth of 1 Gb/sec, it would take 584 years to overflow */
/* a 64 bit counter. */
uint64_t numTransfers; /* Number of DMA transfers performed */
uint64_t transferTicks; /* Total time spent doing DMA transfers (measured in timer_tick_count_t's) */
uint64_t transferBytes; /* Total bytes transferred */
uint32_t timesBlocked; /* Number of times a channel was unavailable */
uint32_t numBytes; /* Last transfer size */
/* It's not possible to free memory which is allocated for the descriptors from within */
/* the ISR. So make the presumption that a given device will tend to use the */
/* same sized buffers over and over again, and we keep them around. */
DMA_DescriptorRing_t ring; /* Ring of descriptors allocated for this device */
/* We stash away some of the information from the previous transfer. If back-to-back */
/* transfers are performed from the same buffer, then we don't have to keep re-initializing */
/* the descriptor buffers. */
uint32_t prevNumBytes;
dma_addr_t prevSrcData;
dma_addr_t prevDstData;
} DMA_DeviceAttribute_t;
/****************************************************************************
*
* DMA_Channel_t, DMA_Controller_t, and DMA_State_t are really internal
* data structures and don't belong in this header file, but are included
* merely for discussion.
*
* By the time this is implemented, these structures will be moved out into
* the appropriate C source file instead.
*
*****************************************************************************/
/****************************************************************************
*
* The DMA_Channel_t contains state information about each DMA channel. Some
* of the channels are dedicated. Non-dedicated channels are shared
* amongst the other devices.
*
*****************************************************************************/
#define DMA_CHANNEL_FLAG_IN_USE 0x00000001
#define DMA_CHANNEL_FLAG_IS_DEDICATED 0x00000002
#define DMA_CHANNEL_FLAG_NO_ISR 0x00000004
#define DMA_CHANNEL_FLAG_LARGE_FIFO 0x00000008
typedef struct {
uint32_t flags; /* bitmask of DMA_CHANNEL_FLAG_xxx constants */
DMA_Device_t devType; /* Device this channel is currently reserved for */
DMA_Device_t lastDevType; /* Device type that used this previously */
char name[20]; /* Name passed onto request_irq */
#if (DMA_DEBUG_TRACK_RESERVATION)
c
|