From 5c8d08f3471265dfd2f6db6d381751848dbf7db3 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Mon, 9 Apr 2018 22:28:26 +0300 Subject: dt-bindings: memory: tegra: Add hot resets definitions Add definitions for the Tegra20+ memory controller hot resets. Signed-off-by: Dmitry Osipenko Reviewed-by: Rob Herring Signed-off-by: Thierry Reding --- include/dt-bindings/memory/tegra114-mc.h | 19 +++++++++++++++++++ include/dt-bindings/memory/tegra124-mc.h | 25 +++++++++++++++++++++++++ include/dt-bindings/memory/tegra20-mc.h | 21 +++++++++++++++++++++ include/dt-bindings/memory/tegra210-mc.h | 31 +++++++++++++++++++++++++++++++ include/dt-bindings/memory/tegra30-mc.h | 19 +++++++++++++++++++ 5 files changed, 115 insertions(+) create mode 100644 include/dt-bindings/memory/tegra20-mc.h (limited to 'include/dt-bindings') diff --git a/include/dt-bindings/memory/tegra114-mc.h b/include/dt-bindings/memory/tegra114-mc.h index 27c8386987ff..54a12adec7b8 100644 --- a/include/dt-bindings/memory/tegra114-mc.h +++ b/include/dt-bindings/memory/tegra114-mc.h @@ -23,4 +23,23 @@ #define TEGRA_SWGROUP_EMUCIF 18 #define TEGRA_SWGROUP_TSEC 19 +#define TEGRA114_MC_RESET_AFI 0 +#define TEGRA114_MC_RESET_AVPC 1 +#define TEGRA114_MC_RESET_DC 2 +#define TEGRA114_MC_RESET_DCB 3 +#define TEGRA114_MC_RESET_EPP 4 +#define TEGRA114_MC_RESET_2D 5 +#define TEGRA114_MC_RESET_HC 6 +#define TEGRA114_MC_RESET_HDA 7 +#define TEGRA114_MC_RESET_ISP 8 +#define TEGRA114_MC_RESET_MPCORE 9 +#define TEGRA114_MC_RESET_MPCORELP 10 +#define TEGRA114_MC_RESET_MPE 11 +#define TEGRA114_MC_RESET_3D 12 +#define TEGRA114_MC_RESET_3D2 13 +#define TEGRA114_MC_RESET_PPCS 14 +#define TEGRA114_MC_RESET_SATA 15 +#define TEGRA114_MC_RESET_VDE 16 +#define TEGRA114_MC_RESET_VI 17 + #endif diff --git a/include/dt-bindings/memory/tegra124-mc.h b/include/dt-bindings/memory/tegra124-mc.h index f534d7c06019..186e6b7e9b35 100644 --- a/include/dt-bindings/memory/tegra124-mc.h +++ b/include/dt-bindings/memory/tegra124-mc.h @@ -29,4 +29,29 @@ #define TEGRA_SWGROUP_VIC 24 #define TEGRA_SWGROUP_VI 25 +#define TEGRA124_MC_RESET_AFI 0 +#define TEGRA124_MC_RESET_AVPC 1 +#define TEGRA124_MC_RESET_DC 2 +#define TEGRA124_MC_RESET_DCB 3 +#define TEGRA124_MC_RESET_HC 4 +#define TEGRA124_MC_RESET_HDA 5 +#define TEGRA124_MC_RESET_ISP2 6 +#define TEGRA124_MC_RESET_MPCORE 7 +#define TEGRA124_MC_RESET_MPCORELP 8 +#define TEGRA124_MC_RESET_MSENC 9 +#define TEGRA124_MC_RESET_PPCS 10 +#define TEGRA124_MC_RESET_SATA 11 +#define TEGRA124_MC_RESET_VDE 12 +#define TEGRA124_MC_RESET_VI 13 +#define TEGRA124_MC_RESET_VIC 14 +#define TEGRA124_MC_RESET_XUSB_HOST 15 +#define TEGRA124_MC_RESET_XUSB_DEV 16 +#define TEGRA124_MC_RESET_TSEC 17 +#define TEGRA124_MC_RESET_SDMMC1 18 +#define TEGRA124_MC_RESET_SDMMC2 19 +#define TEGRA124_MC_RESET_SDMMC3 20 +#define TEGRA124_MC_RESET_SDMMC4 21 +#define TEGRA124_MC_RESET_ISP2B 22 +#define TEGRA124_MC_RESET_GPU 23 + #endif diff --git a/include/dt-bindings/memory/tegra20-mc.h b/include/dt-bindings/memory/tegra20-mc.h new file mode 100644 index 000000000000..35e131eee198 --- /dev/null +++ b/include/dt-bindings/memory/tegra20-mc.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef DT_BINDINGS_MEMORY_TEGRA20_MC_H +#define DT_BINDINGS_MEMORY_TEGRA20_MC_H + +#define TEGRA20_MC_RESET_AVPC 0 +#define TEGRA20_MC_RESET_DC 1 +#define TEGRA20_MC_RESET_DCB 2 +#define TEGRA20_MC_RESET_EPP 3 +#define TEGRA20_MC_RESET_2D 4 +#define TEGRA20_MC_RESET_HC 5 +#define TEGRA20_MC_RESET_ISP 6 +#define TEGRA20_MC_RESET_MPCORE 7 +#define TEGRA20_MC_RESET_MPEA 8 +#define TEGRA20_MC_RESET_MPEB 9 +#define TEGRA20_MC_RESET_MPEC 10 +#define TEGRA20_MC_RESET_3D 11 +#define TEGRA20_MC_RESET_PPCS 12 +#define TEGRA20_MC_RESET_VDE 13 +#define TEGRA20_MC_RESET_VI 14 + +#endif diff --git a/include/dt-bindings/memory/tegra210-mc.h b/include/dt-bindings/memory/tegra210-mc.h index 4490f7cf4772..cacf05617e03 100644 --- a/include/dt-bindings/memory/tegra210-mc.h +++ b/include/dt-bindings/memory/tegra210-mc.h @@ -34,4 +34,35 @@ #define TEGRA_SWGROUP_ETR 29 #define TEGRA_SWGROUP_TSECB 30 +#define TEGRA210_MC_RESET_AFI 0 +#define TEGRA210_MC_RESET_AVPC 1 +#define TEGRA210_MC_RESET_DC 2 +#define TEGRA210_MC_RESET_DCB 3 +#define TEGRA210_MC_RESET_HC 4 +#define TEGRA210_MC_RESET_HDA 5 +#define TEGRA210_MC_RESET_ISP2 6 +#define TEGRA210_MC_RESET_MPCORE 7 +#define TEGRA210_MC_RESET_NVENC 8 +#define TEGRA210_MC_RESET_PPCS 9 +#define TEGRA210_MC_RESET_SATA 10 +#define TEGRA210_MC_RESET_VI 11 +#define TEGRA210_MC_RESET_VIC 12 +#define TEGRA210_MC_RESET_XUSB_HOST 13 +#define TEGRA210_MC_RESET_XUSB_DEV 14 +#define TEGRA210_MC_RESET_A9AVP 15 +#define TEGRA210_MC_RESET_TSEC 16 +#define TEGRA210_MC_RESET_SDMMC1 17 +#define TEGRA210_MC_RESET_SDMMC2 18 +#define TEGRA210_MC_RESET_SDMMC3 19 +#define TEGRA210_MC_RESET_SDMMC4 20 +#define TEGRA210_MC_RESET_ISP2B 21 +#define TEGRA210_MC_RESET_GPU 22 +#define TEGRA210_MC_RESET_NVDEC 23 +#define TEGRA210_MC_RESET_APE 24 +#define TEGRA210_MC_RESET_SE 25 +#define TEGRA210_MC_RESET_NVJPG 26 +#define TEGRA210_MC_RESET_AXIAP 27 +#define TEGRA210_MC_RESET_ETR 28 +#define TEGRA210_MC_RESET_TSECB 29 + #endif diff --git a/include/dt-bindings/memory/tegra30-mc.h b/include/dt-bindings/memory/tegra30-mc.h index 3cac81919023..169f005fbc78 100644 --- a/include/dt-bindings/memory/tegra30-mc.h +++ b/include/dt-bindings/memory/tegra30-mc.h @@ -22,4 +22,23 @@ #define TEGRA_SWGROUP_MPCORE 17 #define TEGRA_SWGROUP_ISP 18 +#define TEGRA30_MC_RESET_AFI 0 +#define TEGRA30_MC_RESET_AVPC 1 +#define TEGRA30_MC_RESET_DC 2 +#define TEGRA30_MC_RESET_DCB 3 +#define TEGRA30_MC_RESET_EPP 4 +#define TEGRA30_MC_RESET_2D 5 +#define TEGRA30_MC_RESET_HC 6 +#define TEGRA30_MC_RESET_HDA 7 +#define TEGRA30_MC_RESET_ISP 8 +#define TEGRA30_MC_RESET_MPCORE 9 +#define TEGRA30_MC_RESET_MPCORELP 10 +#define TEGRA30_MC_RESET_MPE 11 +#define TEGRA30_MC_RESET_3D 12 +#define TEGRA30_MC_RESET_3D2 13 +#define TEGRA30_MC_RESET_PPCS 14 +#define TEGRA30_MC_RESET_SATA 15 +#define TEGRA30_MC_RESET_VDE 16 +#define TEGRA30_MC_RESET_VI 17 + #endif -- cgit v1.2.3 From a1be3cfdfb81cc55c1b2feb73aca6945f61acddb Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Tue, 8 May 2018 19:49:46 +0300 Subject: dt-bindings: memory: tegra: Remove Tegra114 SATA and AFI reset definitions Tegra114 doesn't have SATA nor PCIe, but TRM seems erroneously document them. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- include/dt-bindings/memory/tegra114-mc.h | 34 +++++++++++++++----------------- 1 file changed, 16 insertions(+), 18 deletions(-) (limited to 'include/dt-bindings') diff --git a/include/dt-bindings/memory/tegra114-mc.h b/include/dt-bindings/memory/tegra114-mc.h index 54a12adec7b8..dfe99c8a5ba5 100644 --- a/include/dt-bindings/memory/tegra114-mc.h +++ b/include/dt-bindings/memory/tegra114-mc.h @@ -23,23 +23,21 @@ #define TEGRA_SWGROUP_EMUCIF 18 #define TEGRA_SWGROUP_TSEC 19 -#define TEGRA114_MC_RESET_AFI 0 -#define TEGRA114_MC_RESET_AVPC 1 -#define TEGRA114_MC_RESET_DC 2 -#define TEGRA114_MC_RESET_DCB 3 -#define TEGRA114_MC_RESET_EPP 4 -#define TEGRA114_MC_RESET_2D 5 -#define TEGRA114_MC_RESET_HC 6 -#define TEGRA114_MC_RESET_HDA 7 -#define TEGRA114_MC_RESET_ISP 8 -#define TEGRA114_MC_RESET_MPCORE 9 -#define TEGRA114_MC_RESET_MPCORELP 10 -#define TEGRA114_MC_RESET_MPE 11 -#define TEGRA114_MC_RESET_3D 12 -#define TEGRA114_MC_RESET_3D2 13 -#define TEGRA114_MC_RESET_PPCS 14 -#define TEGRA114_MC_RESET_SATA 15 -#define TEGRA114_MC_RESET_VDE 16 -#define TEGRA114_MC_RESET_VI 17 +#define TEGRA114_MC_RESET_AVPC 0 +#define TEGRA114_MC_RESET_DC 1 +#define TEGRA114_MC_RESET_DCB 2 +#define TEGRA114_MC_RESET_EPP 3 +#define TEGRA114_MC_RESET_2D 4 +#define TEGRA114_MC_RESET_HC 5 +#define TEGRA114_MC_RESET_HDA 6 +#define TEGRA114_MC_RESET_ISP 7 +#define TEGRA114_MC_RESET_MPCORE 8 +#define TEGRA114_MC_RESET_MPCORELP 9 +#define TEGRA114_MC_RESET_MPE 10 +#define TEGRA114_MC_RESET_3D 11 +#define TEGRA114_MC_RESET_3D2 12 +#define TEGRA114_MC_RESET_PPCS 13 +#define TEGRA114_MC_RESET_VDE 14 +#define TEGRA114_MC_RESET_VI 15 #endif -- cgit v1.2.3