From f0977109a5775a211948c1b8a675932f9699022d Mon Sep 17 00:00:00 2001 From: Jules Irenge Date: Mon, 25 Mar 2019 22:23:13 +0000 Subject: staging: sm750fb: lower case to fix camelcase checkpatch warning Lower case to fix CamelCase checkpatch.pl warning "CHECK: Avoid CamelCase: ". Signed-off-by: Jules Irenge Signed-off-by: Greg Kroah-Hartman --- drivers/staging/sm750fb/ddk750_chip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index cd2ca0de1ae9..5a317cc98a4b 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -56,7 +56,7 @@ static unsigned int get_mxclk_freq(void) static void set_chip_clock(unsigned int frequency) { struct pll_value pll; - unsigned int ulActualMxClk; + unsigned int actual_mx_clk; /* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */ if (sm750_get_chip_type() == SM750LE) @@ -76,7 +76,7 @@ static void set_chip_clock(unsigned int frequency) * Return value of sm750_calc_pll_value gives the actual * possible clock. */ - ulActualMxClk = sm750_calc_pll_value(frequency, &pll); + actual_mx_clk = sm750_calc_pll_value(frequency, &pll); /* Master Clock Control: MXCLK_PLL */ poke32(MXCLK_PLL_CTRL, sm750_format_pll_reg(&pll)); -- cgit v1.2.3