From 7496fcbe8a643097efc061160e1c3b65ee2fa350 Mon Sep 17 00:00:00 2001 From: Amit Daniel Kachhap Date: Mon, 15 Dec 2014 09:08:59 +0530 Subject: PM / Domains: Export of_genpd_get_from_provider function This function looks up a PM domain form the provider. This will be useful to add parent/child domain relationship from the SoC specific code. The caller of the function must make sure that PM domain provider is already registered. Reviewed-by: Ulf Hansson Signed-off-by: Amit Daniel Kachhap Signed-off-by: Rafael J. Wysocki --- drivers/base/power/domain.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index 5d7b7548873a..1bd119efaac1 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c @@ -2108,7 +2108,7 @@ EXPORT_SYMBOL_GPL(of_genpd_del_provider); * Returns a valid pointer to struct generic_pm_domain on success or ERR_PTR() * on failure. */ -static struct generic_pm_domain *of_genpd_get_from_provider( +struct generic_pm_domain *of_genpd_get_from_provider( struct of_phandle_args *genpdspec) { struct generic_pm_domain *genpd = ERR_PTR(-ENOENT); @@ -2128,6 +2128,7 @@ static struct generic_pm_domain *of_genpd_get_from_provider( return genpd; } +EXPORT_SYMBOL_GPL(of_genpd_get_from_provider); /** * genpd_dev_pm_detach - Detach a device from its PM domain. -- cgit v1.2.3 From d72be771c5dbabaf3058ef382f4934aa31c88df2 Mon Sep 17 00:00:00 2001 From: Jacob Pan Date: Tue, 16 Dec 2014 09:52:47 -0800 Subject: powercap / RAPL: add IDs for future Xeon CPUs Enable RAPL driver on Xeon cpu id 0x56. Signed-off-by: Jacob Pan Signed-off-by: Rafael J. Wysocki --- drivers/powercap/intel_rapl.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c index c71443c4f265..97b5e4ee1ca4 100644 --- a/drivers/powercap/intel_rapl.c +++ b/drivers/powercap/intel_rapl.c @@ -1041,6 +1041,7 @@ static const struct x86_cpu_id rapl_ids[] = { RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */ RAPL_CPU(0x4C, rapl_defaults_atom),/* Braswell */ RAPL_CPU(0x4A, rapl_defaults_atom),/* Tangier */ + RAPL_CPU(0x56, rapl_defaults_core),/* Future Xeon */ RAPL_CPU(0x5A, rapl_defaults_atom),/* Annidale */ {} }; -- cgit v1.2.3