From 6743e817a4de3b70354dde588a3382f7202e5fa2 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Fri, 16 Mar 2018 15:34:20 -0700 Subject: usb: dwc3: Add DWC_usb31 GTXTHRCFG reg fields Add new GTXTHRCFG bit field macros for DWC_usb31. The GTXTHRCFG register fields for DWC_usb31 is as follows: +-------+--------------------------+-----------------------------------+ | BITS | Name | Description | +=======+==========================+===================================+ | 31:27 | reserved | | | 26 | UsbTxPktCntSel | Async ESS transmit packet | | | | threshold enable | | 25:21 | UsbTxPktCnt | Async ESS transmit packet | | | | threshold count | | 20:16 | UsbMaxTxBurstSize | Async ESS Max transmit burst size | | 15 | UsbTxThrNumPktSel_HS_Prd | HS high bandwidth periodic | | | | transmit packet threshold enable | | 14:13 | UsbTxThrNumPkt_HS_Prd | HS high bandwidth periodic | | | | transmit packet threshold count | | 12:11 | reserved | | | 10 | UsbTxThrNumPktSel_Prd | Periodic ESS transmit packet | | | | threshold enable | | 9:5 | UsbTxThrNumPkt_Prd | Periodic ESS transmit packet | | | | threshold count | | 4:0 | UsbMaxTxBurstSize_Prd | Max periodic ESS TX burst size | +-------+--------------------------+-----------------------------------+ Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers/usb') diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 8c3f28f3eff8..ce9edcf17738 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -188,6 +188,16 @@ #define DWC31_RXTHRNUMPKT_PRD(n) (((n) & 0x1f) << 5) #define DWC31_MAXRXBURSTSIZE_PRD(n) ((n) & 0x1f) +/* Global TX Threshold Configuration Register for DWC_usb31 only */ +#define DWC31_GTXTHRCFG_MAXTXBURSTSIZE(n) (((n) & 0x1f) << 16) +#define DWC31_GTXTHRCFG_TXPKTCNT(n) (((n) & 0x1f) << 21) +#define DWC31_GTXTHRCFG_PKTCNTSEL BIT(26) +#define DWC31_TXTHRNUMPKTSEL_HS_PRD BIT(15) +#define DWC31_TXTHRNUMPKT_HS_PRD(n) (((n) & 0x3) << 13) +#define DWC31_TXTHRNUMPKTSEL_PRD BIT(10) +#define DWC31_TXTHRNUMPKT_PRD(n) (((n) & 0x1f) << 5) +#define DWC31_MAXTXBURSTSIZE_PRD(n) ((n) & 0x1f) + /* Global Configuration Register */ #define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19) #define DWC3_GCTL_U2RSTECN BIT(16) -- cgit v1.2.3