From 1acbdeb92c87fc18eade0815dedc257fe45b88b7 Mon Sep 17 00:00:00 2001 From: Chao Fu Date: Wed, 12 Feb 2014 15:29:05 +0800 Subject: spi/fsl-dspi: Convert to use regmap and add big-endian support Freescale DSPI module will have two endianess in different platform, but ARM is little endian. So when DSPI in big endian, core in little endian, readl and writel can not adjust R/W register in this condition. This patch will remove general readl/writel, and import regmap mechanism. Data endian will be transfered in regmap APIs. Documents: dspi add bool "big-endian" in dts node if DSPI module work in big endian. Signed-off-by: Chao Fu Reviewed-by: Xiubo Li Signed-off-by: Mark Brown --- drivers/spi/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/spi/Kconfig') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ba9310bc9acb..00e951045aac 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -270,6 +270,7 @@ config SPI_FSL_SPI config SPI_FSL_DSPI tristate "Freescale DSPI controller" select SPI_BITBANG + select REGMAP_MMIO depends on SOC_VF610 || COMPILE_TEST help This enables support for the Freescale DSPI controller in master -- cgit v1.2.3