From fedf42b50d51758ce43fe0a652991dc01421f422 Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Thu, 30 Jul 2015 18:13:56 -0700 Subject: reset: reset-zynq: Adding support for Xilinx Zynq reset controller. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This adds a reset controller driver to control the Xilinx Zynq AP-SoC's various resets. Signed-off-by: Moritz Fischer Reviewed-by: Michal Simek Acked-by: Sören Brinkmann Signed-off-by: Philipp Zabel --- drivers/reset/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/reset/Makefile') diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 1d41feeb2dce..ab06aa01cfc7 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o obj-$(CONFIG_ARCH_STI) += sti/ +obj-$(CONFIG_ARCH_ZYNQ) += reset-zynq.o -- cgit v1.2.3