From a23adb5b2db7f2a0758abfa20b0220dbcbfd7aa9 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 7 Jun 2007 13:27:09 -0700 Subject: PCI: point people to Bernhard instead of the linux-kernel list Back in commit 8c4b2cf9af9b4ecc29d4f0ec4ecc8e94dc4432d7, Bernhard said that he would fix up all instances of when this message happens. So point people at him instead of the linux-kernel list which can not fix things up. Cc: Bernhard Kaindl Cc: Dave Jones Cc: Andrew Morton Cc: Miles Lane Signed-off-by: Greg Kroah-Hartman --- drivers/pci/probe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/pci') diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index e48fcf089621..9cd983acba8c 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -656,7 +656,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass pcibios_assign_all_busses() ? " " : " (try 'pci=assign-busses')"); printk(KERN_WARNING "Please report the result to " - "linux-kernel to fix this permanently\n"); + " to fix this permanently\n"); } bus = bus->parent; } -- cgit v1.2.3 From e4585da22ad04a055cbb5c863a37aa8cc02eac89 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Mon, 23 Apr 2007 14:57:37 +0100 Subject: pci syscall.c: Switch to refcounting API Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman --- drivers/pci/syscall.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/syscall.c b/drivers/pci/syscall.c index 9d37fec27f24..2ac050d7f8cf 100644 --- a/drivers/pci/syscall.c +++ b/drivers/pci/syscall.c @@ -23,14 +23,14 @@ sys_pciconfig_read(unsigned long bus, unsigned long dfn, u8 byte; u16 word; u32 dword; - long err, cfg_ret; + long err; + long cfg_ret; - err = -EPERM; if (!capable(CAP_SYS_ADMIN)) - goto error; + return -EPERM; err = -ENODEV; - dev = pci_find_slot(bus, dfn); + dev = pci_get_bus_and_slot(bus, dfn); if (!dev) goto error; @@ -66,7 +66,8 @@ sys_pciconfig_read(unsigned long bus, unsigned long dfn, case 4: err = put_user(dword, (unsigned int __user *)buf); break; - }; + } + pci_dev_put(dev); return err; error: @@ -83,7 +84,8 @@ error: case 4: put_user(-1, (unsigned int __user *)buf); break; - }; + } + pci_dev_put(dev); return err; } @@ -101,7 +103,7 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn, if (!capable(CAP_SYS_ADMIN)) return -EPERM; - dev = pci_find_slot(bus, dfn); + dev = pci_get_bus_and_slot(bus, dfn); if (!dev) return -ENODEV; @@ -137,8 +139,8 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn, default: err = -EINVAL; break; - }; + } unlock_kernel(); - + pci_dev_put(dev); return err; } -- cgit v1.2.3 From d556ad4bbe75faf17b239e151a9f003322b2e851 Mon Sep 17 00:00:00 2001 From: Peter Oruba Date: Tue, 15 May 2007 13:59:13 +0200 Subject: PCI: add PCI-X/PCI-Express read control interfaces This patch introduces an interface to read and write PCI-X / PCI-Express maximum read byte count values from PCI config space. There is a second function that returns the maximum _designed_ read byte count, which marks the maximum value for a device, since some drivers try to set MMRBC to the highest allowed value and rely on such a function. Based on patch set by Stephen Hemminger Cc: Stephen Hemminger Signed-off-by: Peter Oruba Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci.c | 160 +++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/quirks.c | 16 ++++++ 2 files changed, 176 insertions(+) (limited to 'drivers/pci') diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index fd47ac0c4730..1bb879959a20 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1374,6 +1374,166 @@ pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) } #endif +/** + * pcix_get_max_mmrbc - get PCI-X maximum designed memory read byte count + * @dev: PCI device to query + * + * Returns mmrbc: maximum designed memory read count in bytes + * or appropriate error value. + */ +int pcix_get_max_mmrbc(struct pci_dev *dev) +{ + int ret, err, cap; + u32 stat; + + cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); + if (!cap) + return -EINVAL; + + err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat); + if (err) + return -EINVAL; + + ret = (stat & PCI_X_STATUS_MAX_READ) >> 12; + + return ret; +} +EXPORT_SYMBOL(pcix_get_max_mmrbc); + +/** + * pcix_get_mmrbc - get PCI-X maximum memory read byte count + * @dev: PCI device to query + * + * Returns mmrbc: maximum memory read count in bytes + * or appropriate error value. + */ +int pcix_get_mmrbc(struct pci_dev *dev) +{ + int ret, cap; + u32 cmd; + + cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); + if (!cap) + return -EINVAL; + + ret = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd); + if (!ret) + ret = 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2); + + return ret; +} +EXPORT_SYMBOL(pcix_get_mmrbc); + +/** + * pcix_set_mmrbc - set PCI-X maximum memory read byte count + * @dev: PCI device to query + * @mmrbc: maximum memory read count in bytes + * valid values are 512, 1024, 2048, 4096 + * + * If possible sets maximum memory read byte count, some bridges have erratas + * that prevent this. + */ +int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc) +{ + int cap, err = -EINVAL; + u32 stat, cmd, v, o; + + if (mmrbc < 512 || mmrbc > 4096 || (mmrbc & (mmrbc-1))) + goto out; + + v = ffs(mmrbc) - 10; + + cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); + if (!cap) + goto out; + + err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat); + if (err) + goto out; + + if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21) + return -E2BIG; + + err = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd); + if (err) + goto out; + + o = (cmd & PCI_X_CMD_MAX_READ) >> 2; + if (o != v) { + if (v > o && dev->bus && + (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_MMRBC)) + return -EIO; + + cmd &= ~PCI_X_CMD_MAX_READ; + cmd |= v << 2; + err = pci_write_config_dword(dev, cap + PCI_X_CMD, cmd); + } +out: + return err; +} +EXPORT_SYMBOL(pcix_set_mmrbc); + +/** + * pcie_get_readrq - get PCI Express read request size + * @dev: PCI device to query + * + * Returns maximum memory read request in bytes + * or appropriate error value. + */ +int pcie_get_readrq(struct pci_dev *dev) +{ + int ret, cap; + u16 ctl; + + cap = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!cap) + return -EINVAL; + + ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl); + if (!ret) + ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12); + + return ret; +} +EXPORT_SYMBOL(pcie_get_readrq); + +/** + * pcie_set_readrq - set PCI Express maximum memory read request + * @dev: PCI device to query + * @count: maximum memory read count in bytes + * valid values are 128, 256, 512, 1024, 2048, 4096 + * + * If possible sets maximum read byte count + */ +int pcie_set_readrq(struct pci_dev *dev, int rq) +{ + int cap, err = -EINVAL; + u16 ctl, v; + + if (rq < 128 || rq > 4096 || (rq & (rq-1))) + goto out; + + v = (ffs(rq) - 8) << 12; + + cap = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!cap) + goto out; + + err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl); + if (err) + goto out; + + if ((ctl & PCI_EXP_DEVCTL_READRQ) != v) { + ctl &= ~PCI_EXP_DEVCTL_READRQ; + ctl |= v; + err = pci_write_config_dword(dev, cap + PCI_EXP_DEVCTL, ctl); + } + +out: + return err; +} +EXPORT_SYMBOL(pcie_set_readrq); + /** * pci_select_bars - Make BAR mask from the type of resource * @dev: the PCI device for which BAR mask is made diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 01d8f8a8843c..75bd6a8648f6 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -627,6 +627,22 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic); #endif /* CONFIG_X86_IO_APIC */ +/* + * Some settings of MMRBC can lead to data corruption so block changes. + * See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide + */ +static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev) +{ + unsigned char revid; + + pci_read_config_byte(dev, PCI_REVISION_ID, &revid); + if (dev->subordinate && revid <= 0x12) { + printk(KERN_INFO "AMD8131 rev %x detected, disabling PCI-X MMRBC\n", + revid); + dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; + } +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_mmrbc); /* * FIXME: it is questionable that quirk_via_acpi -- cgit v1.2.3 From 575e3348cb80c3265278756778d5091d5ca4efbf Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Tue, 8 May 2007 12:03:07 +1000 Subject: PCI: Use a weak symbol for the empty version of pcibios_add_platform_entries() I'm not sure if this is going to fly, weak symbols work on the compilers I'm using, but whether they work for all of the affected architectures I can't say. I've cc'ed as many arch maintainers/lists as I could find. But assuming they do, we can use a weak empty definition of pcibios_add_platform_entries() to avoid having an empty definition on every arch. Signed-off-by: Michael Ellerman Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci-sysfs.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/pci') diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 284e83a527f9..e5737f0b3997 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -600,6 +600,11 @@ static struct bin_attribute pcie_config_attr = { .write = pci_write_config, }; +void __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev) +{ + return; +} + int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) { struct bin_attribute *rom_attr = NULL; -- cgit v1.2.3 From a2cd52ca904f5913651e71764755e712894ccc2f Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Tue, 8 May 2007 12:03:08 +1000 Subject: PCI: Make pcibios_add_platform_entries() return errors Currently pcibios_add_platform_entries() returns void, but could fail, so instead have it return an int and propagate errors up to pci_create_sysfs_dev_files(). Fixes: arch/powerpc/kernel/pci_64.c: In function 'pcibios_add_platform_entries': arch/powerpc/kernel/pci_64.c:878: warning: ignoring return value of 'device_create_file', declared with attribute warn_unused_result arch/powerpc/kernel/pci_32.c: In function 'pcibios_add_platform_entries': arch/powerpc/kernel/pci_32.c:1043: warning: ignoring return value of 'device_create_file', declared with attribute warn_unused_result Signed-off-by: Michael Ellerman Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci-sysfs.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index e5737f0b3997..9c4a123eacd1 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -600,9 +600,9 @@ static struct bin_attribute pcie_config_attr = { .write = pci_write_config, }; -void __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev) +int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev) { - return; + return 0; } int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) @@ -645,10 +645,14 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) } } /* add platform-specific attributes */ - pcibios_add_platform_entries(pdev); + if (pcibios_add_platform_entries(pdev)) + goto err_rom_file; return 0; +err_rom_file: + if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) + sysfs_remove_bin_file(&pdev->dev.kobj, rom_attr); err_rom: kfree(rom_attr); err_resource_files: -- cgit v1.2.3 From f477836457730a2b925f625023ec4e5bf11015be Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 31 May 2007 09:43:34 -0700 Subject: PCI: hotplug: pciehp: Fix possible race condition in writing slot The slot control register is modified as follows: (1) Read the register value (2) Change the value (3) Write the value to the register Those must be done atomically, otherwise writing to control register would cause an unexpected result. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp.h | 1 + drivers/pci/hotplug/pciehp_hpc.c | 191 +++++++++++++++++++++------------------ 2 files changed, 102 insertions(+), 90 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h index ccc57627201e..7959c222dc24 100644 --- a/drivers/pci/hotplug/pciehp.h +++ b/drivers/pci/hotplug/pciehp.h @@ -103,6 +103,7 @@ struct controller { u8 cap_base; struct timer_list poll_timer; volatile int cmd_busy; + spinlock_t lock; }; #define INT_BUTTON_IGNORE 0 diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 9aac6a87eb53..016eea94a8a5 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -275,11 +275,19 @@ static inline int pcie_wait_cmd(struct controller *ctrl) return retval; } -static int pcie_write_cmd(struct slot *slot, u16 cmd) +/** + * pcie_write_cmd - Issue controller command + * @slot: slot to which the command is issued + * @cmd: command value written to slot control register + * @mask: bitmask of slot control register to be modified + */ +static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) { struct controller *ctrl = slot->ctrl; int retval = 0; u16 slot_status; + u16 slot_ctrl; + unsigned long flags; DBG_ENTER_ROUTINE @@ -299,17 +307,29 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd) __FUNCTION__); } - ctrl->cmd_busy = 1; - retval = pciehp_writew(ctrl, SLOTCTRL, (cmd | CMD_CMPL_INTR_ENABLE)); + spin_lock_irqsave(&ctrl->lock, flags); + retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); if (retval) { - err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); - goto out; + err("%s: Cannot read SLOTCTRL register\n", __FUNCTION__); + goto out_spin_unlock; } + slot_ctrl &= ~mask; + slot_ctrl |= ((cmd & mask) | CMD_CMPL_INTR_ENABLE); + + ctrl->cmd_busy = 1; + retval = pciehp_writew(ctrl, SLOTCTRL, slot_ctrl); + if (retval) + err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); + + out_spin_unlock: + spin_unlock_irqrestore(&ctrl->lock, flags); + /* * Wait for command completion. */ - retval = pcie_wait_cmd(ctrl); + if (!retval) + retval = pcie_wait_cmd(ctrl); out: mutex_unlock(&ctrl->ctrl_lock); DBG_LEAVE_ROUTINE @@ -502,25 +522,20 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status) static int hpc_toggle_emi(struct slot *slot) { - struct controller *ctrl = slot->ctrl; - u16 slot_cmd = 0; - u16 slot_ctrl; - int rc = 0; + u16 slot_cmd; + u16 cmd_mask; + int rc; DBG_ENTER_ROUTINE - rc = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); - if (rc) { - err("%s : hp_register_read_word SLOT_CTRL failed\n", - __FUNCTION__); - return rc; - } - - slot_cmd = (slot_ctrl | EMI_CTRL); - if (!pciehp_poll_mode) + slot_cmd = EMI_CTRL; + cmd_mask = EMI_CTRL; + if (!pciehp_poll_mode) { slot_cmd = slot_cmd | HP_INTR_ENABLE; + cmd_mask = cmd_mask | HP_INTR_ENABLE; + } - pcie_write_cmd(slot, slot_cmd); + rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); slot->last_emi_toggle = get_seconds(); DBG_LEAVE_ROUTINE return rc; @@ -529,35 +544,32 @@ static int hpc_toggle_emi(struct slot *slot) static int hpc_set_attention_status(struct slot *slot, u8 value) { struct controller *ctrl = slot->ctrl; - u16 slot_cmd = 0; - u16 slot_ctrl; - int rc = 0; + u16 slot_cmd; + u16 cmd_mask; + int rc; DBG_ENTER_ROUTINE - rc = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); - if (rc) { - err("%s: Cannot read SLOTCTRL register\n", __FUNCTION__); - return rc; - } - + cmd_mask = ATTN_LED_CTRL; switch (value) { case 0 : /* turn off */ - slot_cmd = (slot_ctrl & ~ATTN_LED_CTRL) | 0x00C0; + slot_cmd = 0x00C0; break; case 1: /* turn on */ - slot_cmd = (slot_ctrl & ~ATTN_LED_CTRL) | 0x0040; + slot_cmd = 0x0040; break; case 2: /* turn blink */ - slot_cmd = (slot_ctrl & ~ATTN_LED_CTRL) | 0x0080; + slot_cmd = 0x0080; break; default: return -1; } - if (!pciehp_poll_mode) - slot_cmd = slot_cmd | HP_INTR_ENABLE; + if (!pciehp_poll_mode) { + slot_cmd = slot_cmd | HP_INTR_ENABLE; + cmd_mask = cmd_mask | HP_INTR_ENABLE; + } - pcie_write_cmd(slot, slot_cmd); + rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); @@ -570,21 +582,18 @@ static void hpc_set_green_led_on(struct slot *slot) { struct controller *ctrl = slot->ctrl; u16 slot_cmd; - u16 slot_ctrl; - int rc = 0; + u16 cmd_mask; DBG_ENTER_ROUTINE - rc = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); - if (rc) { - err("%s: Cannot read SLOTCTRL register\n", __FUNCTION__); - return; + slot_cmd = 0x0100; + cmd_mask = PWR_LED_CTRL; + if (!pciehp_poll_mode) { + slot_cmd = slot_cmd | HP_INTR_ENABLE; + cmd_mask = cmd_mask | HP_INTR_ENABLE; } - slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0100; - if (!pciehp_poll_mode) - slot_cmd = slot_cmd | HP_INTR_ENABLE; - pcie_write_cmd(slot, slot_cmd); + pcie_write_cmd(slot, slot_cmd, cmd_mask); dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); @@ -596,22 +605,18 @@ static void hpc_set_green_led_off(struct slot *slot) { struct controller *ctrl = slot->ctrl; u16 slot_cmd; - u16 slot_ctrl; - int rc = 0; + u16 cmd_mask; DBG_ENTER_ROUTINE - rc = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); - if (rc) { - err("%s: Cannot read SLOTCTRL register\n", __FUNCTION__); - return; + slot_cmd = 0x0300; + cmd_mask = PWR_LED_CTRL; + if (!pciehp_poll_mode) { + slot_cmd = slot_cmd | HP_INTR_ENABLE; + cmd_mask = cmd_mask | HP_INTR_ENABLE; } - slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0300; - - if (!pciehp_poll_mode) - slot_cmd = slot_cmd | HP_INTR_ENABLE; - pcie_write_cmd(slot, slot_cmd); + pcie_write_cmd(slot, slot_cmd, cmd_mask); dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); @@ -623,22 +628,18 @@ static void hpc_set_green_led_blink(struct slot *slot) { struct controller *ctrl = slot->ctrl; u16 slot_cmd; - u16 slot_ctrl; - int rc = 0; + u16 cmd_mask; DBG_ENTER_ROUTINE - rc = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); - if (rc) { - err("%s: Cannot read SLOTCTRL register\n", __FUNCTION__); - return; + slot_cmd = 0x0200; + cmd_mask = PWR_LED_CTRL; + if (!pciehp_poll_mode) { + slot_cmd = slot_cmd | HP_INTR_ENABLE; + cmd_mask = cmd_mask | HP_INTR_ENABLE; } - slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0200; - - if (!pciehp_poll_mode) - slot_cmd = slot_cmd | HP_INTR_ENABLE; - pcie_write_cmd(slot, slot_cmd); + pcie_write_cmd(slot, slot_cmd, cmd_mask); dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); @@ -669,7 +670,8 @@ static int hpc_power_on_slot(struct slot * slot) { struct controller *ctrl = slot->ctrl; u16 slot_cmd; - u16 slot_ctrl, slot_status; + u16 cmd_mask; + u16 slot_status; int retval = 0; DBG_ENTER_ROUTINE @@ -692,23 +694,23 @@ static int hpc_power_on_slot(struct slot * slot) } } - retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); - if (retval) { - err("%s: Cannot read SLOTCTRL register\n", __FUNCTION__); - return retval; - } - - slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON; - + slot_cmd = POWER_ON; + cmd_mask = PWR_CTRL; /* Enable detection that we turned off at slot power-off time */ - if (!pciehp_poll_mode) + if (!pciehp_poll_mode) { slot_cmd = slot_cmd | PWR_FAULT_DETECT_ENABLE | MRL_DETECT_ENABLE | PRSN_DETECT_ENABLE | HP_INTR_ENABLE; + cmd_mask = cmd_mask | + PWR_FAULT_DETECT_ENABLE | + MRL_DETECT_ENABLE | + PRSN_DETECT_ENABLE | + HP_INTR_ENABLE; + } - retval = pcie_write_cmd(slot, slot_cmd); + retval = pcie_write_cmd(slot, slot_cmd, cmd_mask); if (retval) { err("%s: Write %x command failed!\n", __FUNCTION__, slot_cmd); @@ -726,21 +728,15 @@ static int hpc_power_off_slot(struct slot * slot) { struct controller *ctrl = slot->ctrl; u16 slot_cmd; - u16 slot_ctrl; + u16 cmd_mask; int retval = 0; DBG_ENTER_ROUTINE dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); - retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); - if (retval) { - err("%s: Cannot read SLOTCTRL register\n", __FUNCTION__); - return retval; - } - - slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF; - + slot_cmd = POWER_OFF; + cmd_mask = PWR_CTRL; /* * If we get MRL or presence detect interrupts now, the isr * will notice the sticky power-fault bit too and issue power @@ -748,14 +744,19 @@ static int hpc_power_off_slot(struct slot * slot) * of command completions, since the power-fault bit remains on * till the slot is powered on again. */ - if (!pciehp_poll_mode) + if (!pciehp_poll_mode) { slot_cmd = (slot_cmd & ~PWR_FAULT_DETECT_ENABLE & ~MRL_DETECT_ENABLE & ~PRSN_DETECT_ENABLE) | HP_INTR_ENABLE; + cmd_mask = cmd_mask | + PWR_FAULT_DETECT_ENABLE | + MRL_DETECT_ENABLE | + PRSN_DETECT_ENABLE | + HP_INTR_ENABLE; + } - retval = pcie_write_cmd(slot, slot_cmd); - + retval = pcie_write_cmd(slot, slot_cmd, cmd_mask); if (retval) { err("%s: Write command failed!\n", __FUNCTION__); return -1; @@ -775,6 +776,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) u16 temp_word; int hp_slot = 0; /* only 1 slot per PCI Express port */ int rc = 0; + unsigned long flags; rc = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); if (rc) { @@ -794,10 +796,12 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) dbg("%s: intr_loc %x\n", __FUNCTION__, intr_loc); /* Mask Hot-plug Interrupt Enable */ if (!pciehp_poll_mode) { + spin_lock_irqsave(&ctrl->lock, flags); rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word); if (rc) { err("%s: Cannot read SLOT_CTRL register\n", __FUNCTION__); + spin_unlock_irqrestore(&ctrl->lock, flags); return IRQ_NONE; } @@ -808,8 +812,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) if (rc) { err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); + spin_unlock_irqrestore(&ctrl->lock, flags); return IRQ_NONE; } + spin_unlock_irqrestore(&ctrl->lock, flags); rc = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); if (rc) { @@ -859,10 +865,12 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) } /* Unmask Hot-plug Interrupt Enable */ if (!pciehp_poll_mode) { + spin_lock_irqsave(&ctrl->lock, flags); rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word); if (rc) { err("%s: Cannot read SLOTCTRL register\n", __FUNCTION__); + spin_unlock_irqrestore(&ctrl->lock, flags); return IRQ_NONE; } @@ -873,8 +881,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) if (rc) { err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); + spin_unlock_irqrestore(&ctrl->lock, flags); return IRQ_NONE; } + spin_unlock_irqrestore(&ctrl->lock, flags); rc = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); if (rc) { @@ -1237,6 +1247,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) mutex_init(&ctrl->crit_sect); mutex_init(&ctrl->ctrl_lock); + spin_lock_init(&ctrl->lock); /* setup wait queue */ init_waitqueue_head(&ctrl->queue); -- cgit v1.2.3 From 8d29bfb79e632fe318f4c01c9c2e8faacb89b800 Mon Sep 17 00:00:00 2001 From: "Zhang, Yanmin" Date: Wed, 6 Jun 2007 11:44:16 +0800 Subject: PCI: fix AER driver error information Below patch fixes aer driver error information and enables aer driver although CONFIG_ACPI=n. As a matter of fact, the new patch is created from below 2 patches plus a minor patch apply fuzz fixing. Because the second patch fixed a compilation error introduced by the first patch, I merge them to facilitate bisect. 1) http://marc.info/?l=linux-kernel&m=117783233918191&w=2; 2) http://marc.info/?l=linux-mm-commits&m=118046936720790&w=2 Signed-off-by: Zhang Yanmin Signed-off-by: Michael Ellerman Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci-acpi.c | 8 ++------ drivers/pci/pcie/aer/Kconfig | 2 +- drivers/pci/pcie/aer/Makefile | 3 ++- drivers/pci/pcie/aer/aerdrv.h | 14 +++++++++----- drivers/pci/pcie/aer/aerdrv_acpi.c | 36 ++++++++++++++++++------------------ drivers/pci/pcie/aer/aerdrv_core.c | 18 ++---------------- 6 files changed, 34 insertions(+), 47 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index b5ac810404c0..c8062494009f 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -55,8 +55,6 @@ acpi_query_osc ( status = acpi_evaluate_object(handle, "_OSC", &input, &output); if (ACPI_FAILURE (status)) { - printk(KERN_DEBUG - "Evaluate _OSC Set fails. Status = 0x%04x\n", status); *ret_status = status; return status; } @@ -124,11 +122,9 @@ acpi_run_osc ( in_params[3].buffer.pointer = (u8 *)context; status = acpi_evaluate_object(handle, "_OSC", &input, &output); - if (ACPI_FAILURE (status)) { - printk(KERN_DEBUG - "Evaluate _OSC Set fails. Status = 0x%04x\n", status); + if (ACPI_FAILURE (status)) return status; - } + out_obj = output.pointer; if (out_obj->type != ACPI_TYPE_BUFFER) { printk(KERN_DEBUG diff --git a/drivers/pci/pcie/aer/Kconfig b/drivers/pci/pcie/aer/Kconfig index 3f37a60a6438..c3bde588aa13 100644 --- a/drivers/pci/pcie/aer/Kconfig +++ b/drivers/pci/pcie/aer/Kconfig @@ -4,7 +4,7 @@ config PCIEAER boolean "Root Port Advanced Error Reporting support" - depends on PCIEPORTBUS && ACPI + depends on PCIEPORTBUS default y help This enables PCI Express Root Port Advanced Error Reporting diff --git a/drivers/pci/pcie/aer/Makefile b/drivers/pci/pcie/aer/Makefile index 15a4f40d520b..8da3bd8455a8 100644 --- a/drivers/pci/pcie/aer/Makefile +++ b/drivers/pci/pcie/aer/Makefile @@ -4,5 +4,6 @@ obj-$(CONFIG_PCIEAER) += aerdriver.o -aerdriver-objs := aerdrv_errprint.o aerdrv_core.o aerdrv.o aerdrv_acpi.o +aerdriver-objs := aerdrv_errprint.o aerdrv_core.o aerdrv.o +aerdriver-$(CONFIG_ACPI) += aerdrv_acpi.o diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h index 5cca394d5999..c7ad68b6c6d6 100644 --- a/drivers/pci/pcie/aer/aerdrv.h +++ b/drivers/pci/pcie/aer/aerdrv.h @@ -19,10 +19,6 @@ #define AER_ERROR_MASK 0x001fffff #define AER_ERROR(d) (d & AER_ERROR_MASK) -#define OSC_METHOD_RUN_SUCCESS 0 -#define OSC_METHOD_NOT_SUPPORTED 1 -#define OSC_METHOD_RUN_FAILURE 2 - /* Root Error Status Register Bits */ #define ROOT_ERR_STATUS_MASKS 0x0f @@ -121,6 +117,14 @@ extern void aer_delete_rootport(struct aer_rpc *rpc); extern int aer_init(struct pcie_device *dev); extern void aer_isr(struct work_struct *work); extern void aer_print_error(struct pci_dev *dev, struct aer_err_info *info); -extern int aer_osc_setup(struct pci_dev *dev); + +#ifdef CONFIG_ACPI +extern int aer_osc_setup(struct pcie_device *pciedev); +#else +static inline int aer_osc_setup(struct pcie_device *pciedev) +{ + return 0; +} +#endif #endif //_AERDRV_H_ diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c index fa68e89ebec9..1a1eb45a779e 100644 --- a/drivers/pci/pcie/aer/aerdrv_acpi.c +++ b/drivers/pci/pcie/aer/aerdrv_acpi.c @@ -20,19 +20,18 @@ /** * aer_osc_setup - run ACPI _OSC method + * @pciedev: pcie_device which AER is being enabled on * - * Return: - * Zero if success. Nonzero for otherwise. + * @return: Zero on success. Nonzero otherwise. * * Invoked when PCIE bus loads AER service driver. To avoid conflict with * BIOS AER support requires BIOS to yield AER control to OS native driver. **/ -int aer_osc_setup(struct pci_dev *dev) +int aer_osc_setup(struct pcie_device *pciedev) { - int retval = OSC_METHOD_RUN_SUCCESS; - acpi_status status; - acpi_handle handle = DEVICE_ACPI_HANDLE(&dev->dev); - struct pci_dev *pdev = dev; + acpi_status status = AE_NOT_FOUND; + struct pci_dev *pdev = pciedev->port; + acpi_handle handle = DEVICE_ACPI_HANDLE(&pdev->dev); struct pci_bus *parent; while (!handle) { @@ -50,19 +49,20 @@ int aer_osc_setup(struct pci_dev *dev) pdev = parent->self; } - if (!handle) - return OSC_METHOD_NOT_SUPPORTED; + if (handle) { + pci_osc_support_set(OSC_EXT_PCI_CONFIG_SUPPORT); + status = pci_osc_control_set(handle, + OSC_PCI_EXPRESS_AER_CONTROL | + OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL); + } - pci_osc_support_set(OSC_EXT_PCI_CONFIG_SUPPORT); - status = pci_osc_control_set(handle, OSC_PCI_EXPRESS_AER_CONTROL | - OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL); if (ACPI_FAILURE(status)) { - if (status == AE_SUPPORT) - retval = OSC_METHOD_NOT_SUPPORTED; - else - retval = OSC_METHOD_RUN_FAILURE; + printk(KERN_DEBUG "AER service couldn't init device %s - %s\n", + pciedev->device.bus_id, + (status == AE_SUPPORT || status == AE_NOT_FOUND) ? + "no _OSC support" : "Run ACPI _OSC fails"); + return -1; } - return retval; + return 0; } - diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 08e13033ced8..fef159a68081 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c @@ -22,8 +22,6 @@ #include #include #include -#include -#include #include #include "aerdrv.h" @@ -733,20 +731,8 @@ void aer_delete_rootport(struct aer_rpc *rpc) **/ int aer_init(struct pcie_device *dev) { - int status; - - /* Run _OSC Method */ - status = aer_osc_setup(dev->port); - - if(status != OSC_METHOD_RUN_SUCCESS) { - printk(KERN_DEBUG "%s: AER service init fails - %s\n", - __FUNCTION__, - (status == OSC_METHOD_NOT_SUPPORTED) ? - "No ACPI _OSC support" : "Run ACPI _OSC fails"); - - if (!forceload) - return status; - } + if (aer_osc_setup(dev) && !forceload) + return -ENXIO; return AER_SUCCESS; } -- cgit v1.2.3 From f0dce411930d16a678173e534594bca160f5eaff Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Wed, 6 Jun 2007 11:50:34 +0800 Subject: PCI aer: add pci_cleanup_aer_correct_aer_status Function to clear bogus correctable errors. Analog to pci_aer_uncorrect_are_status. The Marvell chips seem to start out with a bogus value that needs to be cleared. Yanmin ported it to 2.6.22-rc4 by fixing a fuzz patch applying info. Signed-off-by: Stephen Hemminger Acked-by: Zhang Yanmin Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pcie/aer/aerdrv_core.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'drivers/pci') diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index fef159a68081..92a8469b21ba 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c @@ -117,6 +117,21 @@ int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev) return 0; } +int pci_cleanup_aer_correct_error_status(struct pci_dev *dev) +{ + int pos; + u32 status; + + pos = pci_find_aer_capability(dev); + if (!pos) + return -EIO; + + pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status); + pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, status); + + return 0; +} + static int find_device_iter(struct device *device, void *data) { struct pci_dev *dev; @@ -741,4 +756,5 @@ EXPORT_SYMBOL_GPL(pci_find_aer_capability); EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting); EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting); EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status); +EXPORT_SYMBOL_GPL(pci_cleanup_aer_correct_error_status); -- cgit v1.2.3 From e57571a07de8464f2e5911f87d2c8f29b0430fb7 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Wed, 4 Apr 2007 17:25:48 +0200 Subject: PCI: unexport pci_proc_attach_device On Mon, Apr 02, 2007 at 10:47:45PM -0700, Andrew Morton wrote: >... > Changes since 2.6.21-rc5-mm3: >... > +fix-82875-pci-setup.patch >... > Misc >... pci_proc_attach_device() no longer has any modular user. Signed-off-by: Adrian Bunk Signed-off-by: Greg Kroah-Hartman --- drivers/pci/proc.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/pci') diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index 0425a7b7350d..cfa0dfe61b1a 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c @@ -480,7 +480,6 @@ static int __init pci_proc_init(void) __initcall(pci_proc_init); #ifdef CONFIG_HOTPLUG -EXPORT_SYMBOL(pci_proc_attach_device); EXPORT_SYMBOL(pci_proc_detach_bus); #endif -- cgit v1.2.3 From b8a3a5214d7cc115f1ca3a3967b7229d97c46f4a Mon Sep 17 00:00:00 2001 From: Auke Kok Date: Fri, 8 Jun 2007 15:46:30 -0700 Subject: PCI: read revision ID by default Currently there are 97 occurrences where drivers need the pci revision ID. We can do this once for all devices. Even the pci subsystem needs the revision several times for quirks. The extra u8 member pads out nicely in the pci_dev struct. Signed-off-by: Auke Kok Signed-off-by: Greg Kroah-Hartman --- drivers/pci/probe.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/pci') diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 9cd983acba8c..8802fcb4aaf0 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -702,6 +702,7 @@ static int pci_setup_device(struct pci_dev * dev) dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); pci_read_config_dword(dev, PCI_CLASS_REVISION, &class); + dev->revision = class & 0xff; class >>= 8; /* upper 3 bytes */ dev->class = class; class >>= 8; -- cgit v1.2.3 From 44c10138fd4bbc4b6d6bff0873c24902f2a9da65 Mon Sep 17 00:00:00 2001 From: Auke Kok Date: Fri, 8 Jun 2007 15:46:36 -0700 Subject: PCI: Change all drivers to use pci_device->revision Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok Acked-by: Dave Jones Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/cpqphp_core.c | 12 +++++------- drivers/pci/quirks.c | 14 ++++---------- 2 files changed, 9 insertions(+), 17 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c index 5617cfdadc5c..d590a99930fa 100644 --- a/drivers/pci/hotplug/cpqphp_core.c +++ b/drivers/pci/hotplug/cpqphp_core.c @@ -796,7 +796,6 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) u8 num_of_slots = 0; u8 hp_slot = 0; u8 device; - u8 rev; u8 bus_cap; u16 temp_word; u16 vendor_id; @@ -823,9 +822,8 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) } dbg("Vendor ID: %x\n", vendor_id); - rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); - dbg("revision: %d\n", rev); - if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) { + dbg("revision: %d\n", pdev->revision); + if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) { err(msg_HPC_rev_error); rc = -ENODEV; goto err_disable_device; @@ -836,7 +834,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) * For Intel, each SSID bit identifies a PHP capability. * Also Intel HPC's may have RID=0. */ - if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) { + if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) { // TODO: This code can be made to support non-Compaq or Intel subsystem IDs rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid); if (rc) { @@ -870,7 +868,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) switch (subsystem_vid) { case PCI_VENDOR_ID_COMPAQ: - if (rev >= 0x13) { /* CIOBX */ + if (pdev->revision >= 0x13) { /* CIOBX */ ctrl->push_flag = 1; ctrl->slot_switch_type = 1; ctrl->push_button = 1; @@ -1075,7 +1073,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus)); ctrl->bus = pdev->bus->number; - ctrl->rev = rev; + ctrl->rev = pdev->revision; dbg("bus device function rev: %d %d %d %d\n", ctrl->bus, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev); diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 75bd6a8648f6..f75ade6f0602 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -587,10 +587,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, quirk_via_v */ static void __devinit quirk_amd_ioapic(struct pci_dev *dev) { - u8 rev; - - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); - if (rev >= 0x02) { + if (dev->revision >= 0x02) { printk(KERN_WARNING "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n"); printk(KERN_WARNING " : booting with the \"noapic\" option.\n"); } @@ -610,13 +607,12 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw ); #define AMD8131_NIOAMODE_BIT 0 static void quirk_amd_8131_ioapic(struct pci_dev *dev) { - unsigned char revid, tmp; + unsigned char tmp; if (nr_ioapics == 0) return; - pci_read_config_byte(dev, PCI_REVISION_ID, &revid); - if (revid == AMD8131_revA0 || revid == AMD8131_revB0) { + if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) { printk(KERN_INFO "Fixing up AMD8131 IOAPIC mode\n"); pci_read_config_byte( dev, AMD8131_MISC, &tmp); tmp &= ~(1 << AMD8131_NIOAMODE_BIT); @@ -859,10 +855,8 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, qu static void quirk_disable_pxb(struct pci_dev *pdev) { u16 config; - u8 rev; - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); - if (rev != 0x04) /* Only C0 requires this */ + if (pdev->revision != 0x04) /* Only C0 requires this */ return; pci_read_config_word(pdev, 0x40, &config); if (config & (1<<6)) { -- cgit v1.2.3 From b7b095c154c50ee753832bbf78e8690c492fc8f6 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Mon, 9 Jul 2007 11:55:50 -0700 Subject: PCI: pci-x-pci-express-read-control-interfaces cleanups - remove unneeded local - 80-col fix Cc: Peter Oruba Cc: Roland Dreier Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci.c | 6 ++---- drivers/pci/quirks.c | 4 ++-- 2 files changed, 4 insertions(+), 6 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 1bb879959a20..d9fc1bd1f3e8 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1383,7 +1383,7 @@ pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) */ int pcix_get_max_mmrbc(struct pci_dev *dev) { - int ret, err, cap; + int err, cap; u32 stat; cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); @@ -1394,9 +1394,7 @@ int pcix_get_max_mmrbc(struct pci_dev *dev) if (err) return -EINVAL; - ret = (stat & PCI_X_STATUS_MAX_READ) >> 12; - - return ret; + return (stat & PCI_X_STATUS_MAX_READ) >> 12; } EXPORT_SYMBOL(pcix_get_max_mmrbc); diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index f75ade6f0602..c559085c89a5 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -633,8 +633,8 @@ static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev) pci_read_config_byte(dev, PCI_REVISION_ID, &revid); if (dev->subordinate && revid <= 0x12) { - printk(KERN_INFO "AMD8131 rev %x detected, disabling PCI-X MMRBC\n", - revid); + printk(KERN_INFO "AMD8131 rev %x detected, disabling PCI-X " + "MMRBC\n", revid); dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; } } -- cgit v1.2.3 From 6f6f8c2f4b59711857d14ada8e70309d52e8fae4 Mon Sep 17 00:00:00 2001 From: Milind Arun Choudhary Date: Mon, 9 Jul 2007 11:55:51 -0700 Subject: PCI: ROUND_UP macro cleanup in drivers/pci ROUND_UP macro cleanup, use ALIGN where ever appropriate Signed-off-by: Milind Arun Choudhary Acked-by: Scott Murray Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/cpci_hotplug_pci.c | 2 -- drivers/pci/setup-bus.c | 8 +++----- 2 files changed, 3 insertions(+), 7 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/hotplug/cpci_hotplug_pci.c b/drivers/pci/hotplug/cpci_hotplug_pci.c index 7b1beaad2752..5e9be44817cb 100644 --- a/drivers/pci/hotplug/cpci_hotplug_pci.c +++ b/drivers/pci/hotplug/cpci_hotplug_pci.c @@ -45,8 +45,6 @@ extern int cpci_debug; #define info(format, arg...) printk(KERN_INFO "%s: " format "\n", MY_NAME , ## arg) #define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n", MY_NAME , ## arg) -#define ROUND_UP(x, a) (((x) + (a) - 1) & ~((a) - 1)) - u8 cpci_get_attention_status(struct slot* slot) { diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 5ec297d7a5b4..5e5191ec8de6 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -34,8 +34,6 @@ #define DBG(x...) #endif -#define ROUND_UP(x, a) (((x) + (a) - 1) & ~((a) - 1)) - static void pbus_assign_resources_sorted(struct pci_bus *bus) { struct pci_dev *dev; @@ -310,7 +308,7 @@ static void pbus_size_io(struct pci_bus *bus) #if defined(CONFIG_ISA) || defined(CONFIG_EISA) size = (size & 0xff) + ((size & ~0xffUL) << 2); #endif - size = ROUND_UP(size + size1, 4096); + size = ALIGN(size + size1, 4096); if (!size) { b_res->flags = 0; return; @@ -378,11 +376,11 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, unsigned long if (!align) min_align = align1; - else if (ROUND_UP(align + min_align, min_align) < align1) + else if (ALIGN(align + min_align, min_align) < align1) min_align = align1 >> 1; align += aligns[order]; } - size = ROUND_UP(size, min_align); + size = ALIGN(size, min_align); if (!size) { b_res->flags = 0; return 1; -- cgit v1.2.3 From f5609d7e679db3f29433f56e1f2e397a2f815288 Mon Sep 17 00:00:00 2001 From: Milind Arun Choudhary Date: Mon, 9 Jul 2007 11:55:54 -0700 Subject: PCI: pcie: remove SPIN_LOCK_UNLOCKED Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pcie/aer/aerdrv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/pci') diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index db6ad8e763ac..6846fb42b399 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c @@ -157,7 +157,7 @@ static struct aer_rpc* aer_alloc_rpc(struct pcie_device *dev) * Initialize Root lock access, e_lock, to Root Error Status Reg, * Root Error ID Reg, and Root error producer/consumer index. */ - rpc->e_lock = SPIN_LOCK_UNLOCKED; + spin_lock_init(&rpc->e_lock); rpc->rpd = dev; INIT_WORK(&rpc->dpc_handler, aer_isr); -- cgit v1.2.3 From 694625c0b322905d6892fad873029f764cd4823f Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Mon, 9 Jul 2007 11:55:54 -0700 Subject: PCI: add pci_try_set_mwi As suggested by Andrew, add pci_try_set_mwi(), which does not require return-value checking. - add pci_try_set_mwi() without __must_check - make it return 0 on success, errno if the "try" failed or error - review callers Signed-off-by: Randy Dunlap Cc: Alan Cox Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci.c | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index d9fc1bd1f3e8..35fa30aa3065 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1186,6 +1186,11 @@ int pci_set_mwi(struct pci_dev *dev) return 0; } +int pci_try_set_mwi(struct pci_dev *dev) +{ + return 0; +} + void pci_clear_mwi(struct pci_dev *dev) { } @@ -1242,9 +1247,7 @@ pci_set_cacheline_size(struct pci_dev *dev) * pci_set_mwi - enables memory-write-invalidate PCI transaction * @dev: the PCI device for which MWI is enabled * - * Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND, - * and then calls @pcibios_set_mwi to do the needed arch specific - * operations or a generic mwi-prep function. + * Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND. * * RETURNS: An appropriate -ERRNO error value on error, or zero for success. */ @@ -1260,7 +1263,8 @@ pci_set_mwi(struct pci_dev *dev) pci_read_config_word(dev, PCI_COMMAND, &cmd); if (! (cmd & PCI_COMMAND_INVALIDATE)) { - pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n", pci_name(dev)); + pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n", + pci_name(dev)); cmd |= PCI_COMMAND_INVALIDATE; pci_write_config_word(dev, PCI_COMMAND, cmd); } @@ -1268,6 +1272,21 @@ pci_set_mwi(struct pci_dev *dev) return 0; } +/** + * pci_try_set_mwi - enables memory-write-invalidate PCI transaction + * @dev: the PCI device for which MWI is enabled + * + * Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND. + * Callers are not required to check the return value. + * + * RETURNS: An appropriate -ERRNO error value on error, or zero for success. + */ +int pci_try_set_mwi(struct pci_dev *dev) +{ + int rc = pci_set_mwi(dev); + return rc; +} + /** * pci_clear_mwi - disables Memory-Write-Invalidate for device dev * @dev: the PCI device to disable @@ -1600,6 +1619,7 @@ EXPORT_SYMBOL(pci_release_selected_regions); EXPORT_SYMBOL(pci_request_selected_regions); EXPORT_SYMBOL(pci_set_master); EXPORT_SYMBOL(pci_set_mwi); +EXPORT_SYMBOL(pci_try_set_mwi); EXPORT_SYMBOL(pci_clear_mwi); EXPORT_SYMBOL_GPL(pci_intx); EXPORT_SYMBOL(pci_set_dma_mask); -- cgit v1.2.3 From 0bec2c85bb269446358dceae82ca7822ccfd4e9f Mon Sep 17 00:00:00 2001 From: Scott Murray Date: Mon, 9 Jul 2007 11:55:57 -0700 Subject: PCI: cpci_hotplug: Convert to use the kthread API Signed-off-by: Christoph Hellwig Signed-off-by: Scott Murray Acked-by: Kristen Carlson Accardi Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/cpci_hotplug_core.c | 66 +++++++++++---------------------- 1 file changed, 21 insertions(+), 45 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/hotplug/cpci_hotplug_core.c b/drivers/pci/hotplug/cpci_hotplug_core.c index 684551559d44..ed4d44e3332c 100644 --- a/drivers/pci/hotplug/cpci_hotplug_core.c +++ b/drivers/pci/hotplug/cpci_hotplug_core.c @@ -35,6 +35,7 @@ #include #include #include +#include #include "cpci_hotplug.h" #define DRIVER_AUTHOR "Scott Murray " @@ -59,9 +60,8 @@ static int slots; static atomic_t extracting; int cpci_debug; static struct cpci_hp_controller *controller; -static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */ -static struct semaphore thread_exit; /* guard ensure thread has exited before calling it quits */ -static int thread_finished = 1; +static struct task_struct *cpci_thread; +static int thread_finished; static int enable_slot(struct hotplug_slot *slot); static int disable_slot(struct hotplug_slot *slot); @@ -357,9 +357,7 @@ cpci_hp_intr(int irq, void *data) controller->ops->disable_irq(); /* Trigger processing by the event thread */ - dbg("Signal event_semaphore"); - up(&event_semaphore); - dbg("exited cpci_hp_intr"); + wake_up_process(cpci_thread); return IRQ_HANDLED; } @@ -521,17 +519,12 @@ event_thread(void *data) { int rc; - lock_kernel(); - daemonize("cpci_hp_eventd"); - unlock_kernel(); - dbg("%s - event thread started", __FUNCTION__); while (1) { dbg("event thread sleeping"); - down_interruptible(&event_semaphore); - dbg("event thread woken, thread_finished = %d", - thread_finished); - if (thread_finished || signal_pending(current)) + set_current_state(TASK_INTERRUPTIBLE); + schedule(); + if (kthread_should_stop()) break; do { rc = check_slots(); @@ -541,18 +534,17 @@ event_thread(void *data) } else if (rc < 0) { dbg("%s - error checking slots", __FUNCTION__); thread_finished = 1; - break; + goto out; } - } while (atomic_read(&extracting) && !thread_finished); - if (thread_finished) + } while (atomic_read(&extracting) && !kthread_should_stop()); + if (kthread_should_stop()) break; /* Re-enable ENUM# interrupt */ dbg("%s - re-enabling irq", __FUNCTION__); controller->ops->enable_irq(); } - dbg("%s - event thread signals exit", __FUNCTION__); - up(&thread_exit); + out: return 0; } @@ -562,12 +554,8 @@ poll_thread(void *data) { int rc; - lock_kernel(); - daemonize("cpci_hp_polld"); - unlock_kernel(); - while (1) { - if (thread_finished || signal_pending(current)) + if (kthread_should_stop() || signal_pending(current)) break; if (controller->ops->query_enum()) { do { @@ -578,48 +566,36 @@ poll_thread(void *data) } else if (rc < 0) { dbg("%s - error checking slots", __FUNCTION__); thread_finished = 1; - break; + goto out; } - } while (atomic_read(&extracting) && !thread_finished); + } while (atomic_read(&extracting) && !kthread_should_stop()); } msleep(100); } - dbg("poll thread signals exit"); - up(&thread_exit); + out: return 0; } static int cpci_start_thread(void) { - int pid; - - /* initialize our semaphores */ - init_MUTEX_LOCKED(&event_semaphore); - init_MUTEX_LOCKED(&thread_exit); - thread_finished = 0; - if (controller->irq) - pid = kernel_thread(event_thread, NULL, 0); + cpci_thread = kthread_run(event_thread, NULL, "cpci_hp_eventd"); else - pid = kernel_thread(poll_thread, NULL, 0); - if (pid < 0) { + cpci_thread = kthread_run(poll_thread, NULL, "cpci_hp_polld"); + if (IS_ERR(cpci_thread)) { err("Can't start up our thread"); - return -1; + return PTR_ERR(cpci_thread); } - dbg("Our thread pid = %d", pid); + thread_finished = 0; return 0; } static void cpci_stop_thread(void) { + kthread_stop(cpci_thread); thread_finished = 1; - dbg("thread finish command given"); - if (controller->irq) - up(&event_semaphore); - dbg("wait for thread to exit"); - down(&thread_exit); } int -- cgit v1.2.3 From cca03dec2f0eb8f3c4578e067d2b20a366b940db Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Mon, 9 Jul 2007 11:55:58 -0700 Subject: PCI: pci_set_power_state(): check for PM capabilities earlier Check for PCI_CAP_ID_PM before checking the device state. Apparently fixes some log spam via the 3c59x driver. Signed-off-by: Andrew Lunn Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 35fa30aa3065..03fd59e80fef 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -406,6 +406,13 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) if ((state == PCI_D1 || state == PCI_D2) && pci_no_d1d2(dev)) return 0; + /* find PCI PM capability in list */ + pm = pci_find_capability(dev, PCI_CAP_ID_PM); + + /* abort if the device doesn't support PM capabilities */ + if (!pm) + return -EIO; + /* Validate current state: * Can enter D0 from any state, but if we can only go deeper * to sleep if we're already in a low power state @@ -418,13 +425,6 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) return 0; /* we're already there */ - /* find PCI PM capability in list */ - pm = pci_find_capability(dev, PCI_CAP_ID_PM); - - /* abort if the device doesn't support PM capabilities */ - if (!pm) - return -EIO; - pci_read_config_word(dev,pm + PCI_PM_PMC,&pmc); if ((pmc & PCI_PM_CAP_VER_MASK) > 3) { printk(KERN_DEBUG -- cgit v1.2.3 From 5b57a6cea464fc686a6bc446f667c05901fa9734 Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 5 Jul 2007 11:10:45 -0700 Subject: PCI: hotplug: pciehp: wait for 1 second after power off slot According to the specification, we must wait for at least 1 second after turning power off before taking any action that relies on power having been removed from the slot/adapter. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_ctrl.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'drivers/pci') diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c index 7f22caa70178..98e541ffef3d 100644 --- a/drivers/pci/hotplug/pciehp_ctrl.c +++ b/drivers/pci/hotplug/pciehp_ctrl.c @@ -197,6 +197,12 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot) __FUNCTION__); return; } + /* + * After turning power off, we must wait for at least + * 1 second before taking any action that relies on + * power having been removed from the slot/adapter. + */ + msleep(1000); } } @@ -615,6 +621,12 @@ int pciehp_disable_slot(struct slot *p_slot) mutex_unlock(&p_slot->ctrl->crit_sect); return -EINVAL; } + /* + * After turning power off, we must wait for at least + * 1 second before taking any action that relies on + * power having been removed from the slot/adapter. + */ + msleep(1000); } ret = remove_board(p_slot); -- cgit v1.2.3 From bfceafc5979d9055e04f03f970de6ff7a4bce1b6 Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Thu, 5 Jul 2007 11:10:46 -0700 Subject: PCI: hotplug: acpiphp: fix slot poweroff problem on systems without _PS3 On systems where the optional _PS3 ACPI object is not implemented acpiphp fails to power off the slot. This is happening because the current code does not attempt to remove power using the _EJ0 ACPI object. This patch restores the _EJ0 evaluation attempt which was apparently inadvertently removed from the power-off sequence when the _EJ0 evaluation code was relocated from power_off_slot() to acpiphp_eject_slot(). Signed-off-by: Gary Hade Cc: Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/acpiphp.h | 1 + drivers/pci/hotplug/acpiphp_core.c | 6 +++++- drivers/pci/hotplug/acpiphp_glue.c | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/hotplug/acpiphp.h b/drivers/pci/hotplug/acpiphp.h index ddbadd95387e..f6cc0c5b5657 100644 --- a/drivers/pci/hotplug/acpiphp.h +++ b/drivers/pci/hotplug/acpiphp.h @@ -211,6 +211,7 @@ typedef int (*acpiphp_callback)(struct acpiphp_slot *slot, void *data); extern int acpiphp_enable_slot (struct acpiphp_slot *slot); extern int acpiphp_disable_slot (struct acpiphp_slot *slot); +extern int acpiphp_eject_slot (struct acpiphp_slot *slot); extern u8 acpiphp_get_power_status (struct acpiphp_slot *slot); extern u8 acpiphp_get_attention_status (struct acpiphp_slot *slot); extern u8 acpiphp_get_latch_status (struct acpiphp_slot *slot); diff --git a/drivers/pci/hotplug/acpiphp_core.c b/drivers/pci/hotplug/acpiphp_core.c index fa5c0197d571..a0ca63adad5a 100644 --- a/drivers/pci/hotplug/acpiphp_core.c +++ b/drivers/pci/hotplug/acpiphp_core.c @@ -156,11 +156,15 @@ static int enable_slot(struct hotplug_slot *hotplug_slot) static int disable_slot(struct hotplug_slot *hotplug_slot) { struct slot *slot = hotplug_slot->private; + int retval; dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); /* disable the specified slot */ - return acpiphp_disable_slot(slot->acpi_slot); + retval = acpiphp_disable_slot(slot->acpi_slot); + if (!retval) + retval = acpiphp_eject_slot(slot->acpi_slot); + return retval; } diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c index 9ef4e989afc4..3cc5a821f9c5 100644 --- a/drivers/pci/hotplug/acpiphp_glue.c +++ b/drivers/pci/hotplug/acpiphp_glue.c @@ -1282,7 +1282,7 @@ static unsigned int get_slot_status(struct acpiphp_slot *slot) /** * acpiphp_eject_slot - physically eject the slot */ -static int acpiphp_eject_slot(struct acpiphp_slot *slot) +int acpiphp_eject_slot(struct acpiphp_slot *slot) { acpi_status status; struct acpiphp_func *func; -- cgit v1.2.3 From 9ef2241b18266d75319e7d66156243bd9010be44 Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Thu, 5 Jul 2007 11:10:47 -0700 Subject: PCI: hotplug: acpiphp: remove hot plug parameter write to PCI host bridge acpiphp is writing hot plug parameters to the PCI host bridge PCI config space. This patch removes the incorrect operation. Signed-off-by: Gary Hade Cc: Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/acpiphp_glue.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/pci') diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c index 3cc5a821f9c5..72ec4a29a402 100644 --- a/drivers/pci/hotplug/acpiphp_glue.c +++ b/drivers/pci/hotplug/acpiphp_glue.c @@ -1368,6 +1368,9 @@ static void program_hpp(struct pci_dev *dev, struct acpiphp_bridge *bridge) (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI))) return; + if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) + return; + pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, bridge->hpp.t0->cache_line_size); pci_write_config_byte(dev, PCI_LATENCY_TIMER, -- cgit v1.2.3 From 0bbd6424c55f0ab9e7fcd6a851bc49e265259ff5 Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Thu, 5 Jul 2007 11:10:48 -0700 Subject: PCI: hotplug: acpiphp: avoid acpiphp "cannot get bridge info" PCI hotplug failure On some systems, the ACPI bus check event can reference a bridge that is higher in the ACPI hierarchy than the bridge immediately above the hotplug PCI slot into which an adapter was just inserted. The current 'acpiphp' code expects the bus check event to reference the bridge immediately above the slot that received the adapter so the hotplug operation can fail on these systems with the message "acpiphp_glue: cannot get bridge info". This change fixes the problem by re-enumerating all slots that lie below the bridge referenced by the bus check event, including those slots that may be located under lower level PCI-to-PCI bridge(s). Signed-off-by: Gary Hade Cc: Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/acpiphp_glue.c | 48 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 46 insertions(+), 2 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c index 72ec4a29a402..1e125b56c9a9 100644 --- a/drivers/pci/hotplug/acpiphp_glue.c +++ b/drivers/pci/hotplug/acpiphp_glue.c @@ -1505,6 +1505,37 @@ static void handle_bridge_insertion(acpi_handle handle, u32 type) * ACPI event handlers */ +static acpi_status +count_sub_bridges(acpi_handle handle, u32 lvl, void *context, void **rv) +{ + int *count = (int *)context; + struct acpiphp_bridge *bridge; + + bridge = acpiphp_handle_to_bridge(handle); + if (bridge) + (*count)++; + return AE_OK ; +} + +static acpi_status +check_sub_bridges(acpi_handle handle, u32 lvl, void *context, void **rv) +{ + struct acpiphp_bridge *bridge; + char objname[64]; + struct acpi_buffer buffer = { .length = sizeof(objname), + .pointer = objname }; + + bridge = acpiphp_handle_to_bridge(handle); + if (bridge) { + acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer); + dbg("%s: re-enumerating slots under %s\n", + __FUNCTION__, objname); + acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer); + acpiphp_check_bridge(bridge); + } + return AE_OK ; +} + /** * handle_hotplug_event_bridge - handle ACPI event on bridges * @@ -1522,6 +1553,7 @@ static void handle_hotplug_event_bridge(acpi_handle handle, u32 type, void *cont struct acpi_buffer buffer = { .length = sizeof(objname), .pointer = objname }; struct acpi_device *device; + int num_sub_bridges = 0; if (acpi_bus_get_device(handle, &device)) { /* This bridge must have just been physically inserted */ @@ -1530,7 +1562,12 @@ static void handle_hotplug_event_bridge(acpi_handle handle, u32 type, void *cont } bridge = acpiphp_handle_to_bridge(handle); - if (!bridge) { + if (type == ACPI_NOTIFY_BUS_CHECK) { + acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, ACPI_UINT32_MAX, + count_sub_bridges, &num_sub_bridges, NULL); + } + + if (!bridge && !num_sub_bridges) { err("cannot get bridge info\n"); return; } @@ -1541,7 +1578,14 @@ static void handle_hotplug_event_bridge(acpi_handle handle, u32 type, void *cont case ACPI_NOTIFY_BUS_CHECK: /* bus re-enumerate */ dbg("%s: Bus check notify on %s\n", __FUNCTION__, objname); - acpiphp_check_bridge(bridge); + if (bridge) { + dbg("%s: re-enumerating slots under %s\n", + __FUNCTION__, objname); + acpiphp_check_bridge(bridge); + } + if (num_sub_bridges) + acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, + ACPI_UINT32_MAX, check_sub_bridges, NULL, NULL); break; case ACPI_NOTIFY_DEVICE_CHECK: -- cgit v1.2.3 From 5463d9f0f323123d96989d318ac9c537158ad0a5 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Thu, 28 Jun 2007 16:04:21 -0700 Subject: PCI: limit pci_get_bus_and_slot to domain 0 Limit pci_get_bus_and_slot() to domain (segment) 0 since domain is not specified in the function call and defaulting to domain 0 is the only reasonable thing to do (rather than returning a device from some other unknown domain). Signed-off-by: Randy Dunlap Acked-by: H. Peter Anvin Signed-off-by: Greg Kroah-Hartman --- drivers/pci/search.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/search.c b/drivers/pci/search.c index c13232435dc0..9f7090fa8771 100644 --- a/drivers/pci/search.c +++ b/drivers/pci/search.c @@ -139,12 +139,14 @@ struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn) } /** - * pci_get_bus_and_slot - locate PCI device from a given PCI slot + * pci_get_bus_and_slot - locate PCI device from a given PCI bus & slot * @bus: number of PCI bus on which desired PCI device resides * @devfn: encodes number of PCI slot in which the desir