From e838c14a9ee1dfe660527128d8f2e3191c8b1aad Mon Sep 17 00:00:00 2001 From: Carl Huang Date: Thu, 1 Oct 2020 12:34:44 +0300 Subject: ath11k: enable shadow register configuration and access To enable shadow register access, host needs to pass shadow register configuration to firmware via qmi message. Host also needs to update ring's HP or TP address to shadow register address. The write operation to shadow register will be forwarded to target register by hardware automatically, and the write operation to shadow register is permitted even when the target is in power save or sleep mode. Update the shadow config whenever power up happens. This feature is controlled by hw parameter supports_shadow_regs which is only enabled for QCA6390. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1601544890-13450-3-git-send-email-kvalo@codeaurora.org --- drivers/net/wireless/ath/ath11k/qmi.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'drivers/net/wireless/ath/ath11k/qmi.c') diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c index 9144f28b37d1..c2b165158225 100644 --- a/drivers/net/wireless/ath/ath11k/qmi.c +++ b/drivers/net/wireless/ath/ath11k/qmi.c @@ -2275,7 +2275,18 @@ static int ath11k_qmi_wlanfw_wlan_cfg_send(struct ath11k_base *ab) req->svc_cfg[pipe_num].pipe_num = svc_cfg[pipe_num].pipenum; } req->shadow_reg_valid = 0; - req->shadow_reg_v2_valid = 0; + + /* set shadow v2 configuration */ + if (ab->hw_params.supports_shadow_regs) { + req->shadow_reg_v2_valid = 1; + req->shadow_reg_v2_len = min_t(u32, + ab->qmi.ce_cfg.shadow_reg_v2_len, + QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01); + memcpy(&req->shadow_reg_v2, ab->qmi.ce_cfg.shadow_reg_v2, + sizeof(u32) * req->shadow_reg_v2_len); + } else { + req->shadow_reg_v2_valid = 0; + } ret = qmi_txn_init(&ab->qmi.handle, &txn, qmi_wlanfw_wlan_cfg_resp_msg_v01_ei, &resp); -- cgit v1.2.3