From a646113435c9c8862a36d459079c69953ad19e8f Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 8 Aug 2017 15:02:44 +0800 Subject: mmc: sunxi: Fix NULL pointer reference on clk_delays Some SoCs do not support clk delays for MMC in the clock control unit. These include the old controllers in A10/A10s/A13/R8, and the new eMMC controller in A64. The config structure for these controllers do not specify clk_delays, but the check for this was replaced in change "mmc: sunxi: Support controllers that can use both old and new timings". This patch adds back the check for clk_delays, and also adds comments for both checks in sunxi_mmc_clk_set_phase(). Signed-off-by: Chen-Yu Tsai Tested-by: Icenowy Zheng Signed-off-by: Ulf Hansson --- drivers/mmc/host/sunxi-mmc.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/mmc/host/sunxi-mmc.c') diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 3777517982dd..9dc6d726ec49 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -722,9 +722,14 @@ static int sunxi_mmc_clk_set_phase(struct sunxi_mmc_host *host, { int index; + /* clk controller delays not used under new timings mode */ if (host->use_new_timings) return 0; + /* some old controllers don't support delays */ + if (!host->cfg->clk_delays) + return 0; + /* determine delays */ if (rate <= 400000) { index = SDXC_CLK_400K; -- cgit v1.2.3