From 1fa55b4e0e161b3d16b52f5bab1b39b39607bc27 Mon Sep 17 00:00:00 2001 From: Alexander Usyskin Date: Sun, 2 Aug 2015 22:20:52 +0300 Subject: mei: me: d0i3: enable d0i3 interrupts D0i3 adds additional interrupt reason bit, therefore we add a variable intr_source to save the interrupt causes for further dispatching. The interrupt cause is saved in the irq quick handler to achieve unified behavior for both MSI enabled and shared interrupt platforms. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler Signed-off-by: Greg Kroah-Hartman --- drivers/misc/mei/hw-me-regs.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/misc/mei/hw-me-regs.h') diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h index 4c8f05ea3651..8793ccca12ad 100644 --- a/drivers/misc/mei/hw-me-regs.h +++ b/drivers/misc/mei/hw-me-regs.h @@ -166,6 +166,10 @@ /* Host D0I3 Interrupt Status */ #define H_D0I3C_IS 0x00000040 +/* H_CSR masks */ +#define H_CSR_IE_MASK (H_IE | H_D0I3C_IE) +#define H_CSR_IS_MASK (H_IS | H_D0I3C_IS) + /* register bits of ME_CSR_HA (ME Control Status Host Access register) */ /* ME CB (Circular Buffer) Depth HRA (Host Read Access) - host read only access to ME_CBD */ -- cgit v1.2.3