From 04434cfa2b2032eae52c197ea184844dd76a329d Mon Sep 17 00:00:00 2001 From: Peter De Schrijver Date: Tue, 25 Jul 2017 13:34:03 +0300 Subject: clk: tegra: Enable PLL_SS for Tegra210 Make sure the pll_ss ops are compiled even when only building for Tegra210. Signed-off-by: Peter De Schrijver Reviewed-by: Shreshtha Sahu Tested-by: Shreshtha Sahu Reviewed-by: Jon Mayo Tested-by: Thierry Reding Acked-by: Thierry Reding Signed-off-by: Stephen Boyd --- drivers/clk/tegra/clk-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/clk/tegra') diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index e9bdb1662219..fbd8726213ab 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -2255,7 +2255,7 @@ tegra_clk_register_pllu_tegra114(const char *name, const char *parent_name, } #endif -#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) +#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) || defined(CONFIG_ARCH_TEGRA_210_SOC) static const struct clk_ops tegra_clk_pllss_ops = { .is_enabled = clk_pll_is_enabled, .enable = clk_pll_enable, -- cgit v1.2.3