From 904bb4f5c7de2f40ff31d43d3547d40910e46640 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Fri, 18 Nov 2016 17:58:26 +0530 Subject: clk: qcom: gdsc: Add support for gdscs with HW control Some GDSCs might support a HW control mode, where in the power domain (gdsc) is brought in and out of low power state (while unsued) without any SW assistance, saving power. Such GDSCs can be configured in a HW control mode when powered on until they are explicitly requested to be powered off by software. Signed-off-by: Rajendra Nayak Signed-off-by: Sricharan R Signed-off-by: Stephen Boyd --- drivers/clk/qcom/gdsc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/qcom/gdsc.h') diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index f011c4957527..39648348e5ec 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -52,6 +52,7 @@ struct gdsc { const u8 flags; #define VOTABLE BIT(0) #define CLAMP_IO BIT(1) +#define HW_CTRL BIT(2) struct reset_controller_dev *rcdev; unsigned int *resets; unsigned int reset_count; -- cgit v1.2.3