From 8ee9c7de019596445fd81e7647f5509d90e2fb72 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Thu, 9 Apr 2015 23:02:02 -0700 Subject: clk: qcom: Allow clk_set_parent() to work on display clocks Sometimes the display driver may want to change the parent PLL of the display clocks (byte and pixel clocks) depending on the use-case. Currently the parent is fixed by means of having a frequency table with one entry that chooses a particular parent. Remove this restriction and use the parent the clock is configured for in the hardware during clk_set_rate(). This requires consumers to rely on the default parent or to configure the parent with clk_set_parent()/assigned-clock-parents on the clocks before calling clk_set_rate(). Tested-by: Archit Taneja Cc: Hai Li Signed-off-by: Stephen Boyd --- drivers/clk/qcom/clk-rcg.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/qcom/clk-rcg.h') diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h index 56028bb31d87..31f92d70e8e0 100644 --- a/drivers/clk/qcom/clk-rcg.h +++ b/drivers/clk/qcom/clk-rcg.h @@ -171,6 +171,7 @@ struct clk_rcg2 { extern const struct clk_ops clk_rcg2_ops; extern const struct clk_ops clk_edp_pixel_ops; extern const struct clk_ops clk_byte_ops; +extern const struct clk_ops clk_byte2_ops; extern const struct clk_ops clk_pixel_ops; #endif -- cgit v1.2.3