From e2f744a82d725ab55091cccfb8e527b4220471f0 Mon Sep 17 00:00:00 2001 From: "weiyi.lu@mediatek.com" Date: Mon, 23 Oct 2017 12:10:34 +0800 Subject: clk: mediatek: Add MT2712 clock support Add MT2712 clock support, include topckgen, apmixedsys, infracfg, pericfg, mcucfg and subsystem clocks. Signed-off-by: Weiyi Lu [sboyd@codeaurora.org: Static on top_clk_data] Signed-off-by: Stephen Boyd --- drivers/clk/mediatek/clk-mtk.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/clk/mediatek/clk-mtk.h') diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index f5d6b70ce189..f48df75cc901 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -207,6 +207,8 @@ struct mtk_pll_data { uint32_t en_mask; uint32_t pd_reg; uint32_t tuner_reg; + uint32_t tuner_en_reg; + uint8_t tuner_en_bit; int pd_shift; unsigned int flags; const struct clk_ops *ops; -- cgit v1.2.3