From 16eeaec77922c1349e130a9541e83a023deaf11f Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Tue, 2 Sep 2014 09:50:18 +0200 Subject: clk: at91: fix div by zero in USB clock driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Test rate value before calculating the div value to avoid div by zero. Signed-off-by: Boris BREZILLON Reported-by: Gaël PORTAY Tested-by: Gaël PORTAY Signed-off-by: Mike Turquette --- drivers/clk/at91/clk-usb.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c index 183877712c6c..24b5b020753a 100644 --- a/drivers/clk/at91/clk-usb.c +++ b/drivers/clk/at91/clk-usb.c @@ -279,10 +279,13 @@ static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate, int i; struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw); struct at91_pmc *pmc = usb->pmc; - unsigned long div = parent_rate / rate; + unsigned long div; - if (parent_rate % rate) + if (!rate || parent_rate % rate) return -EINVAL; + + div = parent_rate / rate; + for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) { if (usb->divisors[i] == div) { tmp = pmc_read(pmc, AT91_CKGR_PLLBR) & -- cgit v1.2.3