From 555eae97358082be3a46572464829c27b96ed8f1 Mon Sep 17 00:00:00 2001 From: Tang Yuantian Date: Tue, 9 Apr 2013 16:46:26 +0800 Subject: clk: add PowerPC corenet clock driver support This adds the clock driver for Freescale PowerPC corenet series SoCs using common clock infrastructure. Signed-off-by: Tang Yuantian Signed-off-by: Li Yang Signed-off-by: Mike Turquette --- drivers/clk/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/clk/Kconfig') diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 0357ac44638b..30fc2b48447c 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -81,6 +81,13 @@ config COMMON_CLK_AXI_CLKGEN Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx FPGAs. It is commonly used in Analog Devices' reference designs. +config CLK_PPC_CORENET + bool "Clock driver for PowerPC corenet platforms" + depends on PPC_E500MC && OF + ---help--- + This adds the clock driver support for Freescale PowerPC corenet + platforms using common clock framework. + endmenu source "drivers/clk/mvebu/Kconfig" -- cgit v1.2.3