From 37744feebc086908fd89760650f458ab19071750 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 20 Apr 2020 11:37:12 +0200 Subject: sh: remove sh5 support sh5 never became a product and has probably never really worked. Remove it by recursively deleting all associated Kconfig options and all corresponding files. Reviewed-by: Geert Uytterhoeven Signed-off-by: Arnd Bergmann Signed-off-by: Rich Felker --- arch/sh/Kconfig | 62 +- arch/sh/Kconfig.cpu | 9 - arch/sh/Kconfig.debug | 13 +- arch/sh/Makefile | 29 +- arch/sh/boot/compressed/Makefile | 12 +- arch/sh/boot/compressed/misc.c | 8 - arch/sh/drivers/pci/Makefile | 1 - arch/sh/drivers/pci/ops-sh5.c | 65 - arch/sh/drivers/pci/pci-sh5.c | 217 ---- arch/sh/drivers/pci/pci-sh5.h | 108 -- arch/sh/include/asm/barrier.h | 4 +- arch/sh/include/asm/bitops.h | 26 - arch/sh/include/asm/bl_bit.h | 11 +- arch/sh/include/asm/bl_bit_64.h | 37 - arch/sh/include/asm/bugs.h | 4 - arch/sh/include/asm/cache_insns.h | 12 +- arch/sh/include/asm/cache_insns_64.h | 20 - arch/sh/include/asm/checksum.h | 6 +- arch/sh/include/asm/elf.h | 23 - arch/sh/include/asm/extable.h | 4 - arch/sh/include/asm/fixmap.h | 4 - arch/sh/include/asm/io.h | 4 - arch/sh/include/asm/irq.h | 3 - arch/sh/include/asm/mmu_context.h | 12 - arch/sh/include/asm/mmu_context_64.h | 75 -- arch/sh/include/asm/page.h | 21 +- arch/sh/include/asm/pgtable.h | 17 - arch/sh/include/asm/pgtable_64.h | 307 ----- arch/sh/include/asm/posix_types.h | 6 +- arch/sh/include/asm/processor.h | 14 +- arch/sh/include/asm/processor_64.h | 212 --- arch/sh/include/asm/ptrace_64.h | 14 - arch/sh/include/asm/string.h | 6 +- arch/sh/include/asm/string_64.h | 21 - arch/sh/include/asm/switch_to.h | 11 +- arch/sh/include/asm/switch_to_64.h | 32 - arch/sh/include/asm/syscall.h | 6 +- arch/sh/include/asm/syscall_64.h | 75 -- arch/sh/include/asm/syscalls.h | 9 +- arch/sh/include/asm/syscalls_64.h | 18 - arch/sh/include/asm/thread_info.h | 4 +- arch/sh/include/asm/tlb.h | 6 +- arch/sh/include/asm/tlb_64.h | 68 - arch/sh/include/asm/traps.h | 4 - arch/sh/include/asm/traps_64.h | 35 - arch/sh/include/asm/types.h | 5 - arch/sh/include/asm/uaccess.h | 4 - arch/sh/include/asm/uaccess_64.h | 85 -- arch/sh/include/asm/unistd.h | 6 +- arch/sh/include/asm/user.h | 7 - arch/sh/include/asm/vermagic.h | 4 - arch/sh/include/asm/vmlinux.lds.h | 8 - arch/sh/include/cpu-sh5/cpu/addrspace.h | 12 - arch/sh/include/cpu-sh5/cpu/cache.h | 94 -- arch/sh/include/cpu-sh5/cpu/irq.h | 113 -- arch/sh/include/cpu-sh5/cpu/mmu_context.h | 22 - arch/sh/include/cpu-sh5/cpu/registers.h | 103 -- arch/sh/include/cpu-sh5/cpu/rtc.h | 9 - arch/sh/include/uapi/asm/posix_types.h | 8 +- arch/sh/include/uapi/asm/posix_types_64.h | 29 - arch/sh/include/uapi/asm/ptrace.h | 5 - arch/sh/include/uapi/asm/ptrace_64.h | 15 - arch/sh/include/uapi/asm/sigcontext.h | 13 - arch/sh/include/uapi/asm/stat.h | 61 - arch/sh/include/uapi/asm/swab.h | 10 - arch/sh/include/uapi/asm/unistd.h | 8 +- arch/sh/include/uapi/asm/unistd_64.h | 423 ------ arch/sh/kernel/Makefile | 16 +- arch/sh/kernel/cpu/Makefile | 1 - arch/sh/kernel/cpu/init.c | 2 +- arch/sh/kernel/cpu/irq/Makefile | 3 +- arch/sh/kernel/cpu/irq/intc-sh5.c | 194 --- arch/sh/kernel/cpu/proc.c | 1 - arch/sh/kernel/cpu/sh5/Makefile | 16 - arch/sh/kernel/cpu/sh5/clock-sh5.c | 76 -- arch/sh/kernel/cpu/sh5/entry.S | 2000 ----------------------------- arch/sh/kernel/cpu/sh5/fpu.c | 106 -- arch/sh/kernel/cpu/sh5/probe.c | 72 -- arch/sh/kernel/cpu/sh5/setup-sh5.c | 121 -- arch/sh/kernel/cpu/sh5/switchto.S | 195 --- arch/sh/kernel/cpu/sh5/unwind.c | 342 ----- arch/sh/kernel/head_64.S | 346 ----- arch/sh/kernel/irq_64.c | 48 - arch/sh/kernel/module.c | 9 - arch/sh/kernel/process.c | 2 - arch/sh/kernel/process_64.c | 461 ------- arch/sh/kernel/ptrace_64.c | 576 --------- arch/sh/kernel/reboot.c | 6 - arch/sh/kernel/sh_ksyms_64.c | 51 - arch/sh/kernel/signal_64.c | 567 -------- arch/sh/kernel/syscalls_64.S | 419 ------ arch/sh/kernel/traps_64.c | 814 ------------ arch/sh/kernel/vmlinux.lds.S | 18 +- arch/sh/lib64/Makefile | 17 - arch/sh/lib64/copy_page.S | 89 -- arch/sh/lib64/copy_user_memcpy.S | 218 ---- arch/sh/lib64/memcpy.S | 202 --- arch/sh/lib64/memset.S | 92 -- arch/sh/lib64/panic.c | 15 - arch/sh/lib64/sdivsi3.S | 136 -- arch/sh/lib64/strcpy.S | 98 -- arch/sh/lib64/strlen.S | 34 - arch/sh/lib64/udelay.c | 49 - arch/sh/lib64/udivdi3.S | 121 -- arch/sh/lib64/udivsi3.S | 60 - arch/sh/mm/Kconfig | 16 +- arch/sh/mm/Makefile | 31 +- arch/sh/mm/cache-sh5.c | 621 --------- arch/sh/mm/cache.c | 6 - arch/sh/mm/extable_64.c | 84 -- arch/sh/mm/tlb-sh5.c | 224 ---- arch/sh/mm/tlbex_64.c | 166 --- arch/sh/mm/tlbflush_64.c | 172 --- 113 files changed, 64 insertions(+), 11548 deletions(-) delete mode 100644 arch/sh/drivers/pci/ops-sh5.c delete mode 100644 arch/sh/drivers/pci/pci-sh5.c delete mode 100644 arch/sh/drivers/pci/pci-sh5.h delete mode 100644 arch/sh/include/asm/bl_bit_64.h delete mode 100644 arch/sh/include/asm/cache_insns_64.h delete mode 100644 arch/sh/include/asm/mmu_context_64.h delete mode 100644 arch/sh/include/asm/pgtable_64.h delete mode 100644 arch/sh/include/asm/processor_64.h delete mode 100644 arch/sh/include/asm/ptrace_64.h delete mode 100644 arch/sh/include/asm/string_64.h delete mode 100644 arch/sh/include/asm/switch_to_64.h delete mode 100644 arch/sh/include/asm/syscall_64.h delete mode 100644 arch/sh/include/asm/syscalls_64.h delete mode 100644 arch/sh/include/asm/tlb_64.h delete mode 100644 arch/sh/include/asm/traps_64.h delete mode 100644 arch/sh/include/asm/uaccess_64.h delete mode 100644 arch/sh/include/cpu-sh5/cpu/addrspace.h delete mode 100644 arch/sh/include/cpu-sh5/cpu/cache.h delete mode 100644 arch/sh/include/cpu-sh5/cpu/irq.h delete mode 100644 arch/sh/include/cpu-sh5/cpu/mmu_context.h delete mode 100644 arch/sh/include/cpu-sh5/cpu/registers.h delete mode 100644 arch/sh/include/cpu-sh5/cpu/rtc.h delete mode 100644 arch/sh/include/uapi/asm/posix_types_64.h delete mode 100644 arch/sh/include/uapi/asm/ptrace_64.h delete mode 100644 arch/sh/include/uapi/asm/unistd_64.h delete mode 100644 arch/sh/kernel/cpu/irq/intc-sh5.c delete mode 100644 arch/sh/kernel/cpu/sh5/Makefile delete mode 100644 arch/sh/kernel/cpu/sh5/clock-sh5.c delete mode 100644 arch/sh/kernel/cpu/sh5/entry.S delete mode 100644 arch/sh/kernel/cpu/sh5/fpu.c delete mode 100644 arch/sh/kernel/cpu/sh5/probe.c delete mode 100644 arch/sh/kernel/cpu/sh5/setup-sh5.c delete mode 100644 arch/sh/kernel/cpu/sh5/switchto.S delete mode 100644 arch/sh/kernel/cpu/sh5/unwind.c delete mode 100644 arch/sh/kernel/head_64.S delete mode 100644 arch/sh/kernel/irq_64.c delete mode 100644 arch/sh/kernel/process_64.c delete mode 100644 arch/sh/kernel/ptrace_64.c delete mode 100644 arch/sh/kernel/sh_ksyms_64.c delete mode 100644 arch/sh/kernel/signal_64.c delete mode 100644 arch/sh/kernel/syscalls_64.S delete mode 100644 arch/sh/kernel/traps_64.c delete mode 100644 arch/sh/lib64/Makefile delete mode 100644 arch/sh/lib64/copy_page.S delete mode 100644 arch/sh/lib64/copy_user_memcpy.S delete mode 100644 arch/sh/lib64/memcpy.S delete mode 100644 arch/sh/lib64/memset.S delete mode 100644 arch/sh/lib64/panic.c delete mode 100644 arch/sh/lib64/sdivsi3.S delete mode 100644 arch/sh/lib64/strcpy.S delete mode 100644 arch/sh/lib64/strlen.S delete mode 100644 arch/sh/lib64/udelay.c delete mode 100644 arch/sh/lib64/udivdi3.S delete mode 100644 arch/sh/lib64/udivsi3.S delete mode 100644 arch/sh/mm/cache-sh5.c delete mode 100644 arch/sh/mm/extable_64.c delete mode 100644 arch/sh/mm/tlb-sh5.c delete mode 100644 arch/sh/mm/tlbex_64.c delete mode 100644 arch/sh/mm/tlbflush_64.c (limited to 'arch') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index b4f0e37b83eb..74403e80221c 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -54,15 +54,6 @@ config SUPERH select HAVE_NMI select NEED_SG_DMA_LENGTH select ARCH_HAS_GIGANTIC_PAGE - - help - The SuperH is a RISC processor targeted for use in embedded systems - and consumer electronics; it was also used in the Sega Dreamcast - gaming console. The SuperH port has a home page at - . - -config SUPERH32 - def_bool "$(ARCH)" = "sh" select ARCH_32BIT_OFF_T select GUP_GET_PTE_LOW_HIGH if X2TLB select HAVE_KPROBES @@ -81,19 +72,15 @@ config SUPERH32 select ARCH_HIBERNATION_POSSIBLE if MMU select SPARSE_IRQ select HAVE_STACKPROTECTOR - -config SUPERH64 - def_bool "$(ARCH)" = "sh64" - select HAVE_EXIT_THREAD - select KALLSYMS + help + The SuperH is a RISC processor targeted for use in embedded systems + and consumer electronics; it was also used in the Sega Dreamcast + gaming console. The SuperH port has a home page at + . config GENERIC_BUG def_bool y - depends on BUG && SUPERH32 - -config GENERIC_CSUM - def_bool y - depends on SUPERH64 + depends on BUG config GENERIC_HWEIGHT def_bool y @@ -203,12 +190,6 @@ config CPU_SH4AL_DSP select CPU_SH4A select CPU_HAS_DSP -config CPU_SH5 - bool - select CPU_HAS_FPU - select SYS_SUPPORTS_SH_TMU - select SYS_SUPPORTS_HUGETLBFS if MMU - config CPU_SHX2 bool @@ -228,8 +209,6 @@ config CPU_HAS_PMU default y bool -if SUPERH32 - choice prompt "Processor sub-type selection" @@ -518,27 +497,6 @@ config CPU_SUBTYPE_SH7366 endchoice -endif - -if SUPERH64 - -choice - prompt "Processor sub-type selection" - -# SH-5 Processor Support - -config CPU_SUBTYPE_SH5_101 - bool "Support SH5-101 processor" - select CPU_SH5 - -config CPU_SUBTYPE_SH5_103 - bool "Support SH5-103 processor" - select CPU_SH5 - -endchoice - -endif - source "arch/sh/mm/Kconfig" source "arch/sh/Kconfig.cpu" @@ -592,7 +550,7 @@ source "kernel/Kconfig.hz" config KEXEC bool "kexec system call (EXPERIMENTAL)" - depends on SUPERH32 && MMU + depends on MMU select KEXEC_CORE help kexec is a system call that implements the ability to shutdown your @@ -610,7 +568,7 @@ config KEXEC config CRASH_DUMP bool "kernel crash dumps (EXPERIMENTAL)" - depends on SUPERH32 && BROKEN_ON_SMP + depends on BROKEN_ON_SMP help Generate crash dump after being started by kexec. This should be normally only set in special crash dump kernels @@ -624,7 +582,7 @@ config CRASH_DUMP config KEXEC_JUMP bool "kexec jump (EXPERIMENTAL)" - depends on SUPERH32 && KEXEC && HIBERNATION + depends on KEXEC && HIBERNATION help Jump between original kernel and kexeced kernel and invoke code via KEXEC @@ -701,7 +659,7 @@ config HOTPLUG_CPU config GUSA def_bool y - depends on !SMP && SUPERH32 + depends on !SMP help This enables support for gUSA (general UserSpace Atomicity). This is the default implementation for both UP and non-ll/sc diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu index 4a4edc7e03d4..97ca35f2cd37 100644 --- a/arch/sh/Kconfig.cpu +++ b/arch/sh/Kconfig.cpu @@ -13,7 +13,6 @@ config CPU_LITTLE_ENDIAN config CPU_BIG_ENDIAN bool "Big Endian" - depends on !CPU_SH5 endchoice @@ -27,10 +26,6 @@ config SH_FPU This option must be set in order to enable the FPU. -config SH64_FPU_DENORM_FLUSH - bool "Flush floating point denorms to zero" - depends on SH_FPU && SUPERH64 - config SH_FPU_EMU def_bool n prompt "FPU emulation support" @@ -77,10 +72,6 @@ config SPECULATIVE_EXECUTION If unsure, say N. -config SH64_ID2815_WORKAROUND - bool "Include workaround for SH5-101 cut2 silicon defect ID2815" - depends on CPU_SUBTYPE_SH5_101 - config CPU_HAS_INTEVT bool diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 010b6c33bbba..28a43d63bde1 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -5,7 +5,6 @@ config TRACE_IRQFLAGS_SUPPORT config SH_STANDARD_BIOS bool "Use LinuxSH standard BIOS" - depends on SUPERH32 help Say Y here if your target has the gdb-sh-stub package from www.m17n.org (or any conforming standard LinuxSH BIOS) @@ -19,7 +18,7 @@ config SH_STANDARD_BIOS config STACK_DEBUG bool "Check for stack overflows" - depends on DEBUG_KERNEL && SUPERH32 + depends on DEBUG_KERNEL help This option will cause messages to be printed if free stack space drops below a certain limit. Saying Y here will add overhead to @@ -38,7 +37,7 @@ config 4KSTACKS config IRQSTACKS bool "Use separate kernel stacks when processing interrupts" - depends on DEBUG_KERNEL && SUPERH32 && BROKEN + depends on DEBUG_KERNEL && BROKEN help If you say Y here the kernel will use separate kernel stacks for handling hard and soft interrupts. This can help avoid @@ -46,7 +45,7 @@ config IRQSTACKS config DUMP_CODE bool "Show disassembly of nearby code in register dumps" - depends on DEBUG_KERNEL && SUPERH32 + depends on DEBUG_KERNEL default y if DEBUG_BUGVERBOSE default n help @@ -59,7 +58,6 @@ config DUMP_CODE config DWARF_UNWINDER bool "Enable the DWARF unwinder for stacktraces" select FRAME_POINTER - depends on SUPERH32 default n help Enabling this option will make stacktraces more accurate, at @@ -77,11 +75,6 @@ config SH_NO_BSS_INIT For all other cases, say N. If this option seems perplexing, or you aren't sure, say N. -config SH64_SR_WATCH - bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" - depends on SUPERH64 - config MCOUNT def_bool y - depends on SUPERH32 depends on STACK_DEBUG || FUNCTION_TRACER diff --git a/arch/sh/Makefile b/arch/sh/Makefile index b4a86f27e048..da9cf952f33c 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -11,7 +11,7 @@ # ifneq ($(SUBARCH),$(ARCH)) ifeq ($(CROSS_COMPILE),) - CROSS_COMPILE := $(call cc-cross-prefix, $(UTS_MACHINE)-linux- $(UTS_MACHINE)-linux-gnu- $(UTS_MACHINE)-unknown-linux-gnu-) + CROSS_COMPILE := $(call cc-cross-prefix, sh-linux- sh-linux-gnu- sh-unknown-linux-gnu-) endif endif @@ -29,12 +29,9 @@ isa-$(CONFIG_CPU_SH3) := sh3 isa-$(CONFIG_CPU_SH4) := sh4 isa-$(CONFIG_CPU_SH4A) := sh4a isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al -isa-$(CONFIG_CPU_SH5) := shmedia -ifeq ($(CONFIG_SUPERH32),y) isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp isa-y := $(isa-y)-up -endif cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,) cflags-$(CONFIG_CPU_J2) += $(call cc-option,-mj2,) @@ -47,7 +44,6 @@ cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \ cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \ $(call cc-option,-m4a-nofpu,) cflags-$(CONFIG_CPU_SH4AL_DSP) += $(call cc-option,-m4al,) -cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,) ifeq ($(cflags-y),) # @@ -88,7 +84,7 @@ OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \ -R .stab -R .stabstr -S # Give the various platforms the opportunity to set default image types -defaultimage-$(CONFIG_SUPERH32) := zImage +defaultimage-y := zImage defaultimage-$(CONFIG_SH_SH7785LCR) := uImage defaultimage-$(CONFIG_SH_RSK) := uImage defaultimage-$(CONFIG_SH_URQUELL) := uImage @@ -107,31 +103,22 @@ KBUILD_IMAGE := $(boot)/$(defaultimage-y) # Choosing incompatible machines durings configuration will result in # error messages during linking. # -ifdef CONFIG_SUPERH32 UTS_MACHINE := sh -BITS := 32 LDFLAGS_vmlinux += -e _stext -else -UTS_MACHINE := sh64 -BITS := 64 -LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \ - --defsym phys_stext_shmedia=phys_stext+1 \ - -e phys_stext_shmedia -endif ifdef CONFIG_CPU_LITTLE_ENDIAN -ld-bfd := elf32-$(UTS_MACHINE)-linux +ld-bfd := elf32-sh-linux LDFLAGS_vmlinux += --defsym jiffies=jiffies_64 --oformat $(ld-bfd) KBUILD_LDFLAGS += -EL else -ld-bfd := elf32-$(UTS_MACHINE)big-linux +ld-bfd := elf32-shbig-linux LDFLAGS_vmlinux += --defsym jiffies=jiffies_64+4 --oformat $(ld-bfd) KBUILD_LDFLAGS += -EB endif -export ld-bfd BITS +export ld-bfd -head-y := arch/sh/kernel/head_$(BITS).o +head-y := arch/sh/kernel/head_32.o core-y += arch/sh/kernel/ arch/sh/mm/ arch/sh/boards/ core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/ @@ -185,7 +172,6 @@ cpuincdir-$(CONFIG_CPU_SH2) += cpu-sh2 cpuincdir-$(CONFIG_CPU_SH3) += cpu-sh3 cpuincdir-$(CONFIG_CPU_SH4A) += cpu-sh4a cpuincdir-$(CONFIG_CPU_SH4) += cpu-sh4 -cpuincdir-$(CONFIG_CPU_SH5) += cpu-sh5 cpuincdir-y += cpu-common # Must be last drivers-y += arch/sh/drivers/ @@ -206,8 +192,7 @@ ifeq ($(CONFIG_DWARF_UNWINDER),y) KBUILD_CFLAGS += -fasynchronous-unwind-tables endif -libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) -libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) +libs-y := arch/sh/lib/ $(libs-y) BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.xz uImage.lzo \ uImage.srec uImage.bin zImage vmlinux.bin vmlinux.srec \ diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile index f5e1bd779789..ad0e2403e56f 100644 --- a/arch/sh/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile @@ -8,9 +8,9 @@ targets := vmlinux vmlinux.bin vmlinux.bin.gz \ vmlinux.bin.bz2 vmlinux.bin.lzma \ vmlinux.bin.xz vmlinux.bin.lzo \ - head_$(BITS).o misc.o piggy.o + head_32.o misc.o piggy.o -OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o +OBJECTS = $(obj)/head_32.o $(obj)/misc.o $(obj)/cache.o GCOV_PROFILE := n @@ -39,15 +39,11 @@ LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(IMAGE_OFFSET) -e startup \ # # Pull in the necessary libgcc bits from the in-kernel implementation. # -lib1funcs-$(CONFIG_SUPERH32) := ashiftrt.S ashldi3.c ashrsi3.S ashlsi3.S \ - lshrsi3.S -lib1funcs-obj := \ +lib1funcs-y := ashiftrt.S ashldi3.c ashrsi3.S ashlsi3.S lshrsi3.S +lib1funcs-obj := \ $(addsuffix .o, $(basename $(addprefix $(obj)/, $(lib1funcs-y)))) lib1funcs-dir := $(srctree)/arch/$(SRCARCH)/lib -ifeq ($(BITS),64) - lib1funcs-dir := $(addsuffix $(BITS), $(lib1funcs-dir)) -endif KBUILD_CFLAGS += -I$(lib1funcs-dir) -DDISABLE_BRANCH_PROFILING diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c index e69ec12cbbe6..a03b6680a9d9 100644 --- a/arch/sh/boot/compressed/misc.c +++ b/arch/sh/boot/compressed/misc.c @@ -116,11 +116,7 @@ void ftrace_stub(void) { } -#ifdef CONFIG_SUPERH64 -#define stackalign 8 -#else #define stackalign 4 -#endif #define STACK_SIZE (4096) long __attribute__ ((aligned(stackalign))) user_stack[STACK_SIZE]; @@ -130,13 +126,9 @@ void decompress_kernel(void) { unsigned long output_addr; -#ifdef CONFIG_SUPERH64 - output_addr = (CONFIG_MEMORY_START + 0x2000); -#else output_addr = __pa((unsigned long)&_text+PAGE_SIZE); #if defined(CONFIG_29BIT) output_addr |= P2SEG; -#endif #endif output = (unsigned char *)output_addr; diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile index 947bfe8bb0a7..a5c1e9066f83 100644 --- a/arch/sh/drivers/pci/Makefile +++ b/arch/sh/drivers/pci/Makefile @@ -10,7 +10,6 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7786) += pcie-sh7786.o ops-sh7786.o -obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ pci-dreamcast.o diff --git a/arch/sh/drivers/pci/ops-sh5.c b/arch/sh/drivers/pci/ops-sh5.c deleted file mode 100644 index 9fbaf72949ab..000000000000 --- a/arch/sh/drivers/pci/ops-sh5.c +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support functions for the SH5 PCI hardware. - * - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * Copyright (C) 2003, 2004 Paul Mundt - * Copyright (C) 2004 Richard Curnow - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "pci-sh5.h" - -static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 *val) -{ - SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); - - switch (size) { - case 1: - *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3)); - break; - case 2: - *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2)); - break; - case 4: - *val = SH5PCI_READ(PDR); - break; - } - - return PCIBIOS_SUCCESSFUL; -} - -static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 val) -{ - SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); - - switch (size) { - case 1: - SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val); - break; - case 2: - SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val); - break; - case 4: - SH5PCI_WRITE(PDR, val); - break; - } - - return PCIBIOS_SUCCESSFUL; -} - -struct pci_ops sh5_pci_ops = { - .read = sh5pci_read, - .write = sh5pci_write, -}; diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c deleted file mode 100644 index 03225d27770b..000000000000 --- a/arch/sh/drivers/pci/pci-sh5.c +++ /dev/null @@ -1,217 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * Copyright (C) 2003, 2004 Paul Mundt - * Copyright (C) 2004 Richard Curnow - * - * Support functions for the SH5 PCI hardware. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "pci-sh5.h" - -unsigned long pcicr_virt; -unsigned long PCI_IO_AREA; - -/* Rounds a number UP to the nearest power of two. Used for - * sizing the PCI window. - */ -static u32 __init r2p2(u32 num) -{ - int i = 31; - u32 tmp = num; - - if (num == 0) - return 0; - - do { - if (tmp & (1 << 31)) - break; - i--; - tmp <<= 1; - } while (i >= 0); - - tmp = 1 << i; - /* If the original number isn't a power of 2, round it up */ - if (tmp != num) - tmp <<= 1; - - return tmp; -} - -static irqreturn_t pcish5_err_irq(int irq, void *dev_id) -{ - struct pt_regs *regs = get_irq_regs(); - unsigned pci_int, pci_air, pci_cir, pci_aint; - - pci_int = SH5PCI_READ(INT); - pci_cir = SH5PCI_READ(CIR); - pci_air = SH5PCI_READ(AIR); - - if (pci_int) { - printk("PCI INTERRUPT (at %08llx)!\n", regs->pc); - printk("PCI INT -> 0x%x\n", pci_int & 0xffff); - printk("PCI AIR -> 0x%x\n", pci_air); - printk("PCI CIR -> 0x%x\n", pci_cir); - SH5PCI_WRITE(INT, ~0); - } - - pci_aint = SH5PCI_READ(AINT); - if (pci_aint) { - printk("PCI ARB INTERRUPT!\n"); - printk("PCI AINT -> 0x%x\n", pci_aint); - printk("PCI AIR -> 0x%x\n", pci_air); - printk("PCI CIR -> 0x%x\n", pci_cir); - SH5PCI_WRITE(AINT, ~0); - } - - return IRQ_HANDLED; -} - -static irqreturn_t pcish5_serr_irq(int irq, void *dev_id) -{ - printk("SERR IRQ\n"); - - return IRQ_NONE; -} - -static struct resource sh5_pci_resources[2]; - -static struct pci_channel sh5pci_controller = { - .pci_ops = &sh5_pci_ops, - .resources = sh5_pci_resources, - .nr_resources = ARRAY_SIZE(sh5_pci_resources), - .mem_offset = 0x00000000, - .io_offset = 0x00000000, -}; - -static int __init sh5pci_init(void) -{ - unsigned long memStart = __pa(memory_start); - unsigned long memSize = __pa(memory_end) - memStart; - u32 lsr0; - u32 uval; - - if (request_irq(IRQ_ERR, pcish5_err_irq, - 0, "PCI Error",NULL) < 0) { - printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n"); - return -EINVAL; - } - - if (request_irq(IRQ_SERR, pcish5_serr_irq, - 0, "PCI SERR interrupt", NULL) < 0) { - printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n"); - return -EINVAL; - } - - pcicr_virt = (unsigned long)ioremap(SH5PCI_ICR_BASE, 1024); - if (!pcicr_virt) { - panic("Unable to remap PCICR\n"); - } - - PCI_IO_AREA = (unsigned long)ioremap(SH5PCI_IO_BASE, 0x10000); - if (!PCI_IO_AREA) { - panic("Unable to remap PCIIO\n"); - } - - /* Clear snoop registers */ - SH5PCI_WRITE(CSCR0, 0); - SH5PCI_WRITE(CSCR1, 0); - - /* Switch off interrupts */ - SH5PCI_WRITE(INTM, 0); - SH5PCI_WRITE(AINTM, 0); - SH5PCI_WRITE(PINTM, 0); - - /* Set bus active, take it out of reset */ - uval = SH5PCI_READ(CR); - - /* Set command Register */ - SH5PCI_WRITE(CR, uval | CR_LOCK_MASK | CR_CFINT| CR_FTO | CR_PFE | - CR_PFCS | CR_BMAM); - - uval=SH5PCI_READ(CR); - - /* Allow it to be a master */ - /* NB - WE DISABLE I/O ACCESS to stop overlap */ - /* set WAIT bit to enable stepping, an attempt to improve stability */ - SH5PCI_WRITE_SHORT(CSR_CMD, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | - PCI_COMMAND_WAIT); - - /* - ** Set translation mapping memory in order to convert the address - ** used for the main bus, to the PCI internal address. - */ - SH5PCI_WRITE(MBR,0x40000000); - - /* Always set the max size 512M */ - SH5PCI_WRITE(MBMR, PCISH5_MEM_SIZCONV(512*1024*1024)); - - /* - ** I/O addresses are mapped at internal PCI specific address - ** as is described into the configuration bridge table. - ** These are changed to 0, to allow cards that have legacy - ** io such as vga to function correctly. We set the SH5 IOBAR to - ** 256K, which is a bit big as we can only have 64K of address space - */ - - SH5PCI_WRITE(IOBR,0x0); - - /* Set up a 256K window. Totally pointless waste of address space */ - SH5PCI_WRITE(IOBMR,0); - - /* The SH5 has a HUGE 256K I/O region, which breaks the PCI spec. - * Ideally, we would want to map the I/O region somewhere, but it - * is so big this is not that easy! - */ - SH5PCI_WRITE(CSR_IBAR0,~0); - /* Set memory size value */ - memSize = memory_end - memory_start; - - /* Now we set up the mbars so the PCI bus can see the memory of - * the machine */ - if (memSize < (1024 * 1024)) { - printk(KERN_ERR "PCISH5: Ridiculous memory size of 0x%lx?\n", - memSize); - return -EINVAL; - } - - /* Set LSR 0 */ - lsr0 = (memSize > (512 * 1024 * 1024)) ? 0x1ff00001 : - ((r2p2(memSize) - 0x100000) | 0x1); - SH5PCI_WRITE(LSR0, lsr0); - - /* Set MBAR 0 */ - SH5PCI_WRITE(CSR_MBAR0, memory_start); - SH5PCI_WRITE(LAR0, memory_start); - - SH5PCI_WRITE(CSR_MBAR1,0); - SH5PCI_WRITE(LAR1,0); - SH5PCI_WRITE(LSR1,0); - - /* Enable the PCI interrupts on the device */ - SH5PCI_WRITE(INTM, ~0); - SH5PCI_WRITE(AINTM, ~0); - SH5PCI_WRITE(PINTM, ~0); - - sh5_pci_resources[0].start = PCI_IO_AREA; - sh5_pci_resources[0].end = PCI_IO_AREA + 0x10000; - - sh5_pci_resources[1].start = memStart; - sh5_pci_resources[1].end = memStart + memSize; - - return register_pci_controller(&sh5pci_controller); -} -arch_initcall(sh5pci_init); diff --git a/arch/sh/drivers/pci/pci-sh5.h b/arch/sh/drivers/pci/pci-sh5.h deleted file mode 100644 index 91348af0ef6c..000000000000 --- a/arch/sh/drivers/pci/pci-sh5.h +++ /dev/null @@ -1,108 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 - * - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * - * Definitions for the SH5 PCI hardware. - */ -#ifndef __PCI_SH5_H -#define __PCI_SH5_H - -/* Product ID */ -#define PCISH5_PID 0x350d - -/* vendor ID */ -#define PCISH5_VID 0x1054 - -/* Configuration types */ -#define ST_TYPE0 0x00 /* Configuration cycle type 0 */ -#define ST_TYPE1 0x01 /* Configuration cycle type 1 */ - -/* VCR data */ -#define PCISH5_VCR_STATUS 0x00 -#define PCISH5_VCR_VERSION 0x08 - -/* -** ICR register offsets and bits -*/ -#define PCISH5_ICR_CR 0x100 /* PCI control register values */ -#define CR_PBAM (1<<12) -#define CR_PFCS (1<<11) -#define CR_FTO (1<<10) -#define CR_PFE (1<<9) -#define CR_TBS (1<<8) -#define CR_SPUE (1<<7) -#define CR_BMAM (1<<6) -#define CR_HOST (1<<5) -#define CR_CLKEN (1<<4) -#define CR_SOCS (1<<3) -#define CR_IOCS (1<<2) -#define CR_RSTCTL (1<<1) -#define CR_CFINT (1<<0) -#define CR_LOCK_MASK 0xa5000000 - -#define PCISH5_ICR_INT 0x114 /* Interrupt registert values */ -#define INT_MADIM (1<<2) - -#define PCISH5_ICR_LSR0 0X104 /* Local space register values */ -#define PCISH5_ICR_LSR1 0X108 /* Local space register values */ -#define PCISH5_ICR_LAR0 0x10c /* Local address register values */ -#define PCISH5_ICR_LAR1 0x110 /* Local address register values */ -#define PCISH5_ICR_INTM 0x118 /* Interrupt mask register values */ -#define PCISH5_ICR_AIR 0x11c /* Interrupt error address information register values */ -#define PCISH5_ICR_CIR 0x120 /* Interrupt error command information register values */ -#define PCISH5_ICR_AINT 0x130 /* Interrupt error arbiter interrupt register values */ -#define PCISH5_ICR_AINTM 0x134 /* Interrupt error arbiter interrupt mask register values */ -#define PCISH5_ICR_BMIR 0x138 /* Interrupt error info register of bus master values */ -#define PCISH5_ICR_PAR 0x1c0 /* Pio address register values */ -#define PCISH5_ICR_MBR 0x1c4 /* Memory space bank register values */ -#define PCISH5_ICR_IOBR 0x1c8 /* I/O space bank register values */ -#define PCISH5_ICR_PINT 0x1cc /* power management interrupt register values */ -#define PCISH5_ICR_PINTM 0x1d0 /* power management interrupt mask register values */ -#define PCISH5_ICR_MBMR 0x1d8 /* memory space bank mask register values */ -#define PCISH5_ICR_IOBMR 0x1dc /* I/O space bank mask register values */ -#define PCISH5_ICR_CSCR0 0x210 /* PCI cache snoop control register 0 */ -#define PCISH5_ICR_CSCR1 0x214 /* PCI cache snoop control register 1 */ -#define PCISH5_ICR_PDR 0x220 /* Pio data register values */ - -/* These are configs space registers */ -#define PCISH5_ICR_CSR_VID 0x000 /* Vendor id */ -#define PCISH5_ICR_CSR_DID 0x002 /* Device id */ -#define PCISH5_ICR_CSR_CMD 0x004 /* Command register */ -#define PCISH5_ICR_CSR_STATUS 0x006 /* Stautus */ -#define PCISH5_ICR_CSR_IBAR0 0x010 /* I/O base address register */ -#define PCISH5_ICR_CSR_MBAR0 0x014 /* First Memory base address register */ -#define PCISH5_ICR_CSR_MBAR1 0x018 /* Second Memory base address register */ - -/* Base address of registers */ -#define SH5PCI_ICR_BASE (PHYS_PCI_BLOCK + 0x00040000) -#define SH5PCI_IO_BASE (PHYS_PCI_BLOCK + 0x00800000) -/* #define SH5PCI_VCR_BASE (P2SEG_PCICB_BLOCK + P2SEG) */ - -extern unsigned long pcicr_virt; -/* Register selection macro */ -#define PCISH5_ICR_REG(x) ( pcicr_virt + (PCISH5_ICR_##x)) -/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */ - -/* Write I/O functions */ -#define SH5PCI_WRITE(reg,val) __raw_writel((u32)(val),PCISH5_ICR_REG(reg)) -#define SH5PCI_WRITE_SHORT(reg,val) __raw_writew((u16)(val),PCISH5_ICR_REG(reg)) -#define SH5PCI_WRITE_BYTE(reg,val) __raw_writeb((u8)(val),PCISH5_ICR_REG(reg)) - -/* Read I/O functions */ -#define SH5PCI_READ(reg) __raw_readl(PCISH5_ICR_REG(reg)) -#define SH5PCI_READ_SHORT(reg) __raw_readw(PCISH5_ICR_REG(reg)) -#define SH5PCI_READ_BYTE(reg) __raw_readb(PCISH5_ICR_REG(reg)) - -/* Set PCI config bits */ -#define SET_CONFIG_BITS(bus,devfn,where) ((((bus) << 16) | ((devfn) << 8) | ((where) & ~3)) | 0x80000000) - -/* Set PCI command register */ -#define CONFIG_CMD(bus, devfn, where) SET_CONFIG_BITS(bus->number,devfn,where) - -/* Size converters */ -#define PCISH5_MEM_SIZCONV(x) (((x / 0x40000) - 1) << 18) -#define PCISH5_IO_SIZCONV(x) (((x / 0x40000) - 1) << 18) - -extern struct pci_ops sh5_pci_ops; - -#endif /* __PCI_SH5_H */ diff --git a/arch/sh/include/asm/barrier.h b/arch/sh/include/asm/barrier.h index 66faae19d254..0d58a0159aa6 100644 --- a/arch/sh/include/asm/barrier.h +++ b/arch/sh/include/asm/barrier.h @@ -6,7 +6,7 @@ #ifndef __ASM_SH_BARRIER_H #define __ASM_SH_BARRIER_H -#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) +#if defined(CONFIG_CPU_SH4A) #include #endif @@ -24,7 +24,7 @@ * Historically we have only done this type of barrier for the MMUCR, but * it's also necessary for the CCR, so we make it generic here instead. */ -#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) +#if defined(CONFIG_CPU_SH4A) #define mb() __asm__ __volatile__ ("synco": : :"memory") #define rmb() mb() #define wmb() mb() diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index 8c3578288db5..445dd14c448a 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h @@ -26,7 +26,6 @@ #include #endif -#ifdef CONFIG_SUPERH32 static inline unsigned long ffz(unsigned long word) { unsigned long result; @@ -60,31 +59,6 @@ static inline unsigned long __ffs(unsigned long word) : "t"); return result; } -#else -static inline unsigned long ffz(unsigned long word) -{ - unsigned long result, __d2, __d3; - - __asm__("gettr tr0, %2\n\t" - "pta $+32, tr0\n\t" - "andi %1, 1, %3\n\t" - "beq %3, r63, tr0\n\t" - "pta $+4, tr0\n" - "0:\n\t" - "shlri.l %1, 1, %1\n\t" - "addi %0, 1, %0\n\t" - "andi %1, 1, %3\n\t" - "beqi %3, 1, tr0\n" - "1:\n\t" - "ptabs %2, tr0\n\t" - : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3) - : "0" (0L), "1" (word)); - - return result; -} - -#include -#endif #include #include diff --git a/arch/sh/include/asm/bl_bit.h b/arch/sh/include/asm/bl_bit.h index 7e3d81691ad5..5d04f2c62563 100644 --- a/arch/sh/include/asm/bl_bit.h +++ b/arch/sh/include/asm/bl_bit.h @@ -1,11 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_BL_BIT_H -#define __ASM_SH_BL_BIT_H - -#ifdef CONFIG_SUPERH32 -# include -#else -# include -#endif - -#endif /* __ASM_SH_BL_BIT_H */ +#include diff --git a/arch/sh/include/asm/bl_bit_64.h b/arch/sh/include/asm/bl_bit_64.h deleted file mode 100644 index aac9780fe864..000000000000 --- a/arch/sh/include/asm/bl_bit_64.h +++ /dev/null @@ -1,37 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - */ -#ifndef __ASM_SH_BL_BIT_64_H -#define __ASM_SH_BL_BIT_64_H - -#include - -#define SR_BL_LL 0x0000000010000000LL - -static inline void set_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "or %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); - -} - -static inline void clear_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "and %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); -} - -#endif /* __ASM_SH_BL_BIT_64_H */ diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h index 030df56bfdb2..fe52abb69cea 100644 --- a/arch/sh/include/asm/bugs.h +++ b/arch/sh/include/asm/bugs.h @@ -53,10 +53,6 @@ static void __init check_bugs(void) *p++ = 's'; *p++ = 'p'; break; - case CPU_FAMILY_SH5: - *p++ = '6'; - *p++ = '4'; - break; case CPU_FAMILY_UNKNOWN: /* * Specifically use CPU_FAMILY_UNKNOWN rather than diff --git a/arch/sh/include/asm/cache_insns.h b/arch/sh/include/asm/cache_insns.h index c5a4acdc53f9..d7edd5297bd0 100644 --- a/arch/sh/include/asm/cache_insns.h +++ b/arch/sh/include/asm/cache_insns.h @@ -1,12 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_CACHE_INSNS_H -#define __ASM_SH_CACHE_INSNS_H - - -#ifdef CONFIG_SUPERH32 -# include -#else -# include -#endif - -#endif /* __ASM_SH_CACHE_INSNS_H */ +#include diff --git a/arch/sh/include/asm/cache_insns_64.h b/arch/sh/include/asm/cache_insns_64.h deleted file mode 100644 index ed682b987b0d..000000000000 --- a/arch/sh/include/asm/cache_insns_64.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - */ -#ifndef __ASM_SH_CACHE_INSNS_64_H -#define __ASM_SH_CACHE_INSNS_64_H - -#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) -#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) -#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) -#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) - -static inline reg_size_t register_align(void *val) -{ - return (unsigned long long)(signed long long)(signed long)val; -} - -#endif /* __ASM_SH_CACHE_INSNS_64_H */ diff --git a/arch/sh/include/asm/checksum.h b/arch/sh/include/asm/checksum.h index a460a108969d..00e39dd0d146 100644 --- a/arch/sh/include/asm/checksum.h +++ b/arch/sh/include/asm/checksum.h @@ -1,6 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifdef CONFIG_SUPERH32 -# include -#else -# include -#endif +#include diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h index 5ec8db1ddc20..7661fb5d548a 100644 --- a/arch/sh/include/asm/elf.h +++ b/arch/sh/include/asm/elf.h @@ -133,28 +133,6 @@ typedef struct user_fpu_struct elf_fpregset_t; #define ELF_PLATFORM (utsname()->machine) -#ifdef __SH5__ -#define ELF_PLAT_INIT(_r, load_addr) \ - do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ - _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ - _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ - _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; _r->regs[15]=0; \ - _r->regs[16]=0; _r->regs[17]=0; _r->regs[18]=0; _r->regs[19]=0; \ - _r->regs[20]=0; _r->regs[21]=0; _r->regs[22]=0; _r->regs[23]=0; \ - _r->regs[24]=0; _r->regs[25]=0; _r->regs[26]=0; _r->regs[27]=0; \ - _r->regs[28]=0; _r->regs[29]=0; _r->regs[30]=0; _r->regs[31]=0; \ - _r->regs[32]=0; _r->regs[33]=0; _r->regs[34]=0; _r->regs[35]=0; \ - _r->regs[36]=0; _r->regs[37]=0; _r->regs[38]=0; _r->regs[39]=0; \ - _r->regs[40]=0; _r->regs[41]=0; _r->regs[42]=0; _r->regs[43]=0; \ - _r->regs[44]=0; _r->regs[45]=0; _r->regs[46]=0; _r->regs[47]=0; \ - _r->regs[48]=0; _r->regs[49]=0; _r->regs[50]=0; _r->regs[51]=0; \ - _r->regs[52]=0; _r->regs[53]=0; _r->regs[54]=0; _r->regs[55]=0; \ - _r->regs[56]=0; _r->regs[57]=0; _r->regs[58]=0; _r->regs[59]=0; \ - _r->regs[60]=0; _r->regs[61]=0; _r->regs[62]=0; \ - _r->tregs[0]=0; _r->tregs[1]=0; _r->tregs[2]=0; _r->tregs[3]=0; \ - _r->tregs[4]=0; _r->tregs[5]=0; _r->tregs[6]=0; _r->tregs[7]=0; \ - _r->sr = SR_FD | SR_MMU; } while (0) -#else #define ELF_PLAT_INIT(_r, load_addr) \ do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ @@ -182,7 +160,6 @@ do { \ _r->regs[14] = 0; \ _r->sr = SR_FD; \ } while (0) -#endif #define SET_PERSONALITY(ex) \ set_personality(PER_LINUX_32BIT | (current->personality & (~PER_MASK))) diff --git a/arch/sh/include/asm/extable.h b/arch/sh/include/asm/extable.h index ed46f8bebb9f..5658d2bae372 100644 --- a/arch/sh/include/asm/extable.h +++ b/arch/sh/include/asm/extable.h @@ -4,8 +4,4 @@ #include -#if defined(CONFIG_SUPERH64) && defined(CONFIG_MMU) -#define ARCH_HAS_SEARCH_EXTABLE -#endif - #endif diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h index e30348c58073..f38adc189b83 100644 --- a/arch/sh/include/asm/fixmap.h +++ b/arch/sh/include/asm/fixmap.h @@ -83,11 +83,7 @@ extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags); * the start of the fixmap, and leave one page empty * at the top of mem.. */ -#ifdef CONFIG_SUPERH32 #define FIXADDR_TOP (P4SEG - PAGE_SIZE) -#else -#define FIXADDR_TOP ((unsigned long)(-PAGE_SIZE)) -#endif #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index b42228906eaf..3924d91e0fa0 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -115,12 +115,8 @@ static inline void pfx##reads##bwlq(volatile void __iomem *mem, \ __BUILD_MEMORY_STRING(__raw_, b, u8) __BUILD_MEMORY_STRING(__raw_, w, u16) -#ifdef CONFIG_SUPERH32 void __raw_writesl(void __iomem *addr, const void *data, int longlen); void __raw_readsl(const void __iomem *addr, void *data, int longlen); -#else -__BUILD_MEMORY_STRING(__raw_, l, u32) -#endif __BUILD_MEMORY_STRING(__raw_, q, u64) diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h index 8065a3222e19..6d44c32ef047 100644 --- a/arch/sh/include/asm/irq.h +++ b/arch/sh/include/asm/irq.h @@ -66,8 +66,5 @@ extern void irq_finish(unsigned int irq); #endif #include -#ifdef CONFIG_CPU_SH5 -#include -#endif #endif /* __ASM_SH_IRQ_H */ diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h index 2d09650093c7..48e67d544d53 100644 --- a/arch/sh/include/asm/mmu_context.h +++ b/arch/sh/include/asm/mmu_context.h @@ -48,11 +48,7 @@ */ #define MMU_VPN_MASK 0xfffff000 -#if defined(CONFIG_SUPERH32) #include -#else -#include -#endif /* * Get MMU context if needed. @@ -74,14 +70,6 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) */ local_flush_tlb_all(); -#ifdef CONFIG_SUPERH64 - /* - * The SH-5 cache uses the ASIDs, requiring both the I and D - * cache to be flushed when the ASID is exhausted. Weak. - */ - flush_cache_all(); -#endif - /* * Fix version; Note that we avoid version #0 * to distinguish NO_CONTEXT. diff --git a/arch/sh/include/asm/mmu_context_64.h b/arch/sh/include/asm/mmu_context_64.h deleted file mode 100644 index bacafe0b887d..000000000000 --- a/arch/sh/include/asm/mmu_context_64.h +++ /dev/null @@ -1,75 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_MMU_CONTEXT_64_H -#define __ASM_SH_MMU_CONTEXT_64_H - -/* - * sh64-specific mmu_context interface. - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 - 2007 Paul Mundt - */ -#include -#include - -#define SR_ASID_MASK 0xffffffffff00ffffULL -#define SR_ASID_SHIFT 16 - -/* - * Destroy context related info for an mm_struct that is about - * to be put to rest. - */ -static inline void destroy_context(struct mm_struct *mm) -{ - /* Well, at least free TLB entries */ - flush_tlb_mm(mm); -} - -static inline unsigned long get_asid(void) -{ - unsigned long long sr; - - asm volatile ("getcon " __SR ", %0\n\t" - : "=r" (sr)); - - sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK; - return (unsigned long) sr; -} - -/* Set ASID into SR */ -static inline void set_asid(unsigned long asid) -{ - unsigned long long sr, pc; - - asm volatile ("getcon " __SR ", %0" : "=r" (sr)); - - sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT); - - /* - * It is possible that this function may be inlined and so to avoid - * the assembler reporting duplicate symbols we make use of the - * gas trick of generating symbols using numerics and forward - * reference. - */ - asm volatile ("movi 1, %1\n\t" - "shlli %1, 28, %1\n\t" - "or %0, %1, %1\n\t" - "putcon %1, " __SR "\n\t" - "putcon %0, " __SSR "\n\t" - "movi 1f, %1\n\t" - "ori %1, 1 , %1\n\t" - "putcon %1, " __SPC "\n\t" - "rte\n" - "1:\n\t" - : "=r" (sr), "=r" (pc) : "0" (sr)); -} - -/* arch/sh/kernel/cpu/sh5/entry.S */ -extern unsigned long switch_and_save_asid(unsigned long new_asid); - -/* No spare register to twiddle, so use a software cache */ -extern pgd_t *mmu_pdtp_cache; - -#define set_TTB(pgd) (mmu_pdtp_cache = (pgd)) -#define get_TTB() (mmu_pdtp_cache) - -#endif /* __ASM_SH_MMU_CONTEXT_64_H */ diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h index ea8d68f58e39..eca5daa43b93 100644 --- a/arch/sh/include/asm/page.h +++ b/arch/sh/include/asm/page.h @@ -35,8 +35,6 @@ #define HPAGE_SHIFT 22 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) #define HPAGE_SHIFT 26 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) -#define HPAGE_SHIFT 29 #endif #ifdef CONFIG_HUGETLB_PAGE @@ -82,18 +80,12 @@ typedef struct { unsigned long long pgd; } pgd_t; ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #define __pte(x) \ ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) -#elif defined(CONFIG_SUPERH32) +#else typedef struct { unsigned long pte_low; } pte_t; typedef struct { unsigned long pgprot; } pgprot_t; typedef struct { unsigned long pgd; } pgd_t; #define pte_val(x) ((x).pte_low) #define __pte(x) ((pte_t) { (x) } ) -#else -typedef struct { unsigned long long pte_low; } pte_t; -typedef struct { unsigned long long pgprot; } pgprot_t; -typedef struct { unsigned long pgd; } pgd_t; -#define pte_val(x) ((x).pte_low) -#define __pte(x) ((pte_t) { (x) } ) #endif #define pgd_val(x) ((x).pgd) @@ -191,15 +183,4 @@ typedef struct page *pgtable_t; */ #define ARCH_DMA_MINALIGN L1_CACHE_BYTES -#ifdef CONFIG_SUPERH64 -/* - * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still - * happily generate {ld/st}.q pairs, requiring us to have 8-byte - * alignment to avoid traps. The kmalloc alignment is guaranteed by - * virtue of L1_CACHE_BYTES, requiring this to only be special cased - * for slab caches. - */ -#define ARCH_SLAB_MINALIGN 8 -#endif - #endif /* __ASM_SH_PAGE_H */ diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h index cbd0f3c55a0c..02d936406c6e 100644 --- a/arch/sh/include/asm/pgtable.h +++ b/arch/sh/include/asm/pgtable.h @@ -76,18 +76,10 @@ static inline unsigned long phys_addr_mask(void) #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) -#ifdef CONFIG_SUPERH32 #define VMALLOC_START (P3SEG) -#else -#define VMALLOC_START (0xf0000000) -#endif #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) -#if defined(CONFIG_SUPERH32) #include -#else -#include -#endif /* * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page @@ -159,15 +151,6 @@ static inline bool pte_access_permitted(pte_t pte, bool write) prot |= _PAGE_EXT(_PAGE_EXT_KERN_WRITE | _PAGE_EXT_USER_WRITE); return __pte_access_permitted(pte, prot); } -#elif defined(CONFIG_SUPERH64) -static inline bool pte_access_permitted(pte_t pte, bool write) -{ - u64 prot = _PAGE_PRESENT | _PAGE_USER | _PAGE_READ; - - if (write) - prot |= _PAGE_WRITE; - return __pte_access_permitted(pte, prot); -} #else static inline bool pte_access_permitted(pte_t pte, bool write) { diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h deleted file mode 100644 index 1778bc5971e7..000000000000 --- a/arch/sh/include/asm/pgtable_64.h +++ /dev/null @@ -1,307 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_PGTABLE_64_H -#define __ASM_SH_PGTABLE_64_H - -/* - * include/asm-sh/pgtable_64.h - * - * This file contains the functions and defines necessary to modify and use - * the SuperH page table tree. - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003, 2004 Paul Mundt - * Copyright (C) 2003, 2004 Richard Curnow - */ -#include -#include -#include - -/* - * Error outputs. - */ -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) - -/* - * Table setting routines. Used within arch/mm only. - */ -#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) - -static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) -{ - unsigned long long x = ((unsigned long long) pteval.pte_low); - unsigned long long *xp = (unsigned long long *) pteptr; - /* - * Sign-extend based on NPHYS. - */ - *(xp) = (x & NPHYS_SIGN) ? (x | NPHYS_MASK) : x; -} -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) - -/* - * PGD defines. Top level. - */ - -/* To find an entry in a generic PGD. */ -#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) -#define __pgd_offset(address) pgd_index(address) -#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) - -/* To find an entry in a kernel PGD. */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) -#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) - -/* - * PMD level access routines. Same notes as above. - */ -#define _PMD_EMPTY 0x0 -/* Either the PMD is empty or present, it's not paged out */ -#define pmd_present(pmd_entry) (pmd_val(pmd_entry) & _PAGE_PRESENT) -#define pmd_clear(pmd_entry_p) (set_pmd((pmd_entry_p), __pmd(_PMD_EMPTY))) -#define pmd_none(pmd_entry) (pmd_val((pmd_entry)) == _PMD_EMPTY) -#define pmd_bad(pmd_entry) ((pmd_val(pmd_entry) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) - -#define pmd_page_vaddr(pmd_entry) \ - ((unsigned long) __va(pmd_val(pmd_entry) & PAGE_MASK)) - -#define pmd_page(pmd) \ - (virt_to_page(pmd_val(pmd))) - -/* PMD to PTE dereferencing */ -#define pte_index(address) \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) - -#define __pte_offset(address) pte_index(address) - -#define pte_offset_kernel(dir, addr) \ - ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) - -#define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr) -#define pte_unmap(pte) do { } while (0) - -#ifndef __ASSEMBLY__ -/* - * PTEL coherent flags. - * See Chapter 17 ST50 CPU Core Volume 1, Architecture. - */ -/* The bits that are required in the SH-5 TLB are placed in the h/w-defined - positions, to avoid expensive bit shuffling on every refill. The remaining - bits are used for s/w purposes and masked out on each refill. - - Note, the PTE slots are used to hold data of type swp_entry_t when a page is - swapped out. Only the _PAGE_PRESENT flag is significant when the page is - swapped out, and it must be placed so that it doesn't overlap either the - type or offset fields of swp_entry_t. For x86, offset is at [31:8] and type - at [6:1], with _PAGE_PRESENT at bit 0 for both pte_t and swp_entry_t. This - scheme doesn't map to SH-5 because bit [0] controls cacheability. So bit - [2] is used for _PAGE_PRESENT and the type field of swp_entry_t is split - into 2 pieces. That is handled by SWP_ENTRY and SWP_TYPE below. */ -#define _PAGE_WT 0x001 /* CB0: if cacheable, 1->write-thru, 0->write-back */ -#define _PAGE_DEVICE 0x001 /* CB0: if uncacheable, 1->device (i.e. no write-combining or reordering at bus level) */ -#define _PAGE_CACHABLE 0x002 /* CB1: uncachable/cachable */ -#define _PAGE_PRESENT 0x004 /* software: page referenced */ -#define _PAGE_SIZE0 0x008 /* SZ0-bit : size of page */ -#define _PAGE_SIZE1 0x010 /* SZ1-bit : size of page */ -#define _PAGE_SHARED 0x020 /* software: reflects PTEH's SH */ -#define _PAGE_READ 0x040 /* PR0-bit : read access allowed */ -#define _PAGE_EXECUTE 0x080 /* PR1-bit : execute access allowed */ -#define _PAGE_WRITE 0x100 /* PR2-bit : write access allowed */ -#define _PAGE_USER 0x200 /* PR3-bit : user space access allowed */ -#define _PAGE_DIRTY 0x400 /* software: page accessed in write */ -#define _PAGE_ACCESSED 0x800 /* software: page referenced */ - -/* Wrapper for extended mode pgprot twiddling */ -#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) - -/* - * We can use the sign-extended bits in the PTEL to get 32 bits of - * software flags. This works for now because no implementations uses - * anything above the PPN field. - */ -#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */ -#define _PAGE_SPECIAL _PAGE_EXT(0x002) - -#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_SHARED | \ - _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED) - -/* Mask which drops software flags */ -#define _PAGE_FLAGS_HARDWARE_MASK (NEFF_MASK & ~(_PAGE_CLEAR_FLAGS)) - -/* - * HugeTLB support - */ -#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define _PAGE_SZHUGE (_PAGE_SIZE0) -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) -#define _PAGE_SZHUGE (_PAGE_SIZE1) -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) -#define _PAGE_SZHUGE (_PAGE_SIZE0 | _PAGE_SIZE1) -#endif - -/* - * Stub out _PAGE_SZHUGE if we don't have a good definition for it, - * to make pte_mkhuge() happy. - */ -#ifndef _PAGE_SZHUGE -# define _PAGE_SZHUGE (0) -#endif - -/* - * Default flags for a Kernel page. - * This is fundametally also SHARED because the main use of this define - * (other than for PGD/PMD entries) is for the VMALLOC pool which is - * contextless. - * - * _PAGE_EXECUTE is required for modules - * - */ -#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ - _PAGE_EXECUTE | \ - _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_DIRTY | \ - _PAGE_SHARED) - -/* Default flags for a User page */ -#define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER) - -#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ - _PAGE_SPECIAL) - -/* - * We have full permissions (Read/Write/Execute/Shared). - */ -#define _PAGE_COMMON (_PAGE_PRESENT | _PAGE_USER | \ - _PAGE_CACHABLE | _PAGE_ACCESSED) - -#define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED) -#define PAGE_SHARED __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_WRITE | \ - _PAGE_SHARED) -#define PAGE_EXECREAD __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_EXECUTE) - -/* - * We need to include PAGE_EXECUTE in PAGE_COPY because it is the default - * protection mode for the stack. - */ -#define PAGE_COPY PAGE_EXECREAD - -#define PAGE_READONLY __pgprot(_PAGE_COMMON | _PAGE_READ) -#define PAGE_WRITEONLY __pgprot(_PAGE_COMMON | _PAGE_WRITE) -#define PAGE_RWX __pgprot(_PAGE_COMMON | _PAGE_READ | \ - _PAGE_WRITE | _PAGE_EXECUTE) -#define PAGE_KERNEL __pgprot(_KERNPG_TABLE) - -#define PAGE_KERNEL_NOCACHE \ - __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ - _PAGE_EXECUTE | _PAGE_ACCESSED | \ - _PAGE_DIRTY | _PAGE_SHARED) - -/* Make it a device mapping for maximum safety (e.g. for mapping device - registers into user-space via /dev/map). */ -#define pgprot_noncached(x) __pgprot(((x).pgprot & ~(_PAGE_CACHABLE)) | _PAGE_DEVICE) -#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) - -/* - * PTE level access routines. - * - * Note1: - * It's the tree walk leaf. This is physical address to be stored. - * - * Note 2: - * Regarding the choice of _PTE_EMPTY: - - We must choose a bit pattern that cannot be valid, whether or not the page - is present. bit[2]==1 => present, bit[2]==0 => swapped out. If swapped - out, bits [31:8], [6:3], [1:0] are under swapper control, so only bit[7] is - left for us to select. If we force bit[7]==0 when swapped out, we could use - the combination bit[7,2]=2'b10 to indicate an empty PTE. Alternatively, if - we force bit[7]==1 when swapped out, we can use all zeroes to indicate - empty. This is convenient, because the page tables get cleared to zero - when they are allocated. - - */ -#define _PTE_EMPTY 0x0 -#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) -#define pte_clear(mm,addr,xp) (set_pte_at(mm, addr, xp, __pte(_PTE_EMPTY))) -#define pte_none(x) (pte_val(x) == _PTE_EMPTY) - -/* - * Some definitions to translate between mem_map, PTEs, and page - * addresses: - */ - -/* - * Given a PTE, return the index of the mem_map[] entry corresponding - * to the page frame the PTE. Get the absolute physical address, make - * a relative physical address and translate it to an index. - */ -#define pte_pagenr(x) (((unsigned long) (pte_val(x)) - \ - __MEMORY_START) >> PAGE_SHIFT) - -/* - * Given a PTE, return the "struct page *". - */ -#define pte_page(x) (mem_map + pte_pagenr(x)) - -/* - * Return number of (down rounded) MB corresponding to x pages. - */ -#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) - - -/* - * The following have defined behavior only work if pte_present() is true. - */ -static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } -static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } -static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } -static inline int pte_special(pte_t pte){ return pte_val(pte) & _PAGE_SPECIAL; } - -static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; } -static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } -static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; } -static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_WRITE)); return pte; } -static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } -static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } -static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } -static inline pte_t pte_mkspecial(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SPECIAL)); return pte; } - -/* - * Conversion functions: convert a page and protection to a page entry. - * - * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) - */ -#define mk_pte(page,pgprot) \ -({ \ - pte_t __pte; \ - \ - set_pte(&__pte, __pte((((page)-mem_map) << PAGE_SHIFT) | \ - __MEMORY_START | pgprot_val((pgprot)))); \ - __pte; \ -}) - -/* - * This takes a (absolute) physical page address that is used - * by the remapping functions - */ -#define mk_pte_phys(physpage, pgprot) \ -({ pte_t __pte; set_pte(&__pte, __pte(physpage | pgprot_val(pgprot))); __pte; }) - -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } - -/* Encode and decode a swap entry */ -#define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c)) -#define __swp_offset(x) ((x).val >> 8) -#define __swp_entry(type, offset) ((swp_entry_t) { ((offset << 8) + ((type & 0x3c) << 1) + (type & 3)) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -#endif /* !__ASSEMBLY__ */ - -#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) -#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) - -#endif /* __ASM_SH_PGTABLE_64_H */ diff --git a/arch/sh/include/asm/posix_types.h b/arch/sh/include/asm/posix_types.h index 0d670fd94fe7..f8982b757c33 100644 --- a/arch/sh/include/asm/posix_types.h +++ b/arch/sh/include/asm/posix_types.h @@ -1,6 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ -# ifdef CONFIG_SUPERH32 -# include -# else -# include -# endif +#include diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 6fbf8c80e498..3820d698846e 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -39,9 +39,6 @@ enum cpu_type { /* SH4AL-DSP types */ CPU_SH7343, CPU_SH7722, CPU_SH7366, CPU_SH7372, - /* SH-5 types */ - CPU_SH5_101, CPU_SH5_103, - /* Unknown subtype */ CPU_SH_NONE }; @@ -53,7 +50,6 @@ enum cpu_family { CPU_FAMILY_SH4, CPU_FAMILY_SH4A, CPU_FAMILY_SH4AL_DSP, - CPU_FAMILY_SH5, CPU_FAMILY_UNKNOWN, }; @@ -167,18 +163,12 @@ int vsyscall_init(void); */ #ifdef CONFIG_CPU_SH2A extern unsigned int instruction_size(unsigned int insn); -#elif defined(CONFIG_SUPERH32) -#define instruction_size(insn) (2) #else -#define instruction_size(insn) (4) +#define instruction_size(insn) (2) #endif #endif /* __ASSEMBLY__ */ -#ifdef CONFIG_SUPERH32 -# include -#else -# include -#endif +#include #endif /* __ASM_SH_PROCESSOR_H */ diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h deleted file mode 100644 index 53efc9f51ef1..000000000000 --- a/arch/sh/include/asm/processor_64.h +++ /dev/null @@ -1,212 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_PROCESSOR_64_H -#define __ASM_SH_PROCESSOR_64_H - -/* - * include/asm-sh/processor_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - */ -#ifndef __ASSEMBLY__ - -#include -#include -#include -#include - -#endif - -/* - * User space process size: 2GB - 4k. - */ -#define TASK_SIZE 0x7ffff000UL - -#define STACK_TOP TASK_SIZE -#define STACK_TOP_MAX STACK_TOP - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) - -/* - * Bit of SR register - * - * FD-bit: - * When it's set, it means the processor doesn't have right to use FPU, - * and it results exception when the floating operation is executed. - * - * IMASK-bit: - * Interrupt level mask - * - * STEP-bit: - * Single step bit - * - */ -#if defined(CONFIG_SH64_SR_WATCH) -#define SR_MMU 0x84000000 -#else -#define SR_MMU 0x80000000 -#endif - -#define SR_IMASK 0x000000f0 -#define SR_FD 0x00008000 -#define SR_SSTEP 0x08000000 - -#ifndef __ASSEMBLY__ - -/* - * FPU structure and data : require 8-byte alignment as we need to