From d5ece1cb074b2c7082c9a2948ac598dd0ad40657 Mon Sep 17 00:00:00 2001 From: James Hogan Date: Sat, 26 Dec 2015 22:47:52 +0000 Subject: Fix ld-version.sh to handle large 3rd version part The ld-version.sh script doesn't handle versions with large (>= 10) 3rd version components, because the 2nd component is only multiplied by 10 times that of the 3rd component. For example the following version string: GNU ld (Codescape GNU Tools 2015.06-05 for MIPS MTI Linux) 2.24.90 gives a bogus version number: 20000000 + 2400000 + 900000 = 23300000 Breakage, confusion and mole-whacking ensues. Increase the multipliers of the first two version components by a factor of 10 to give space for a 3rd components of up to 99, and update the sole user of ld-ifversion (MIPS VDSO) accordingly. Signed-off-by: James Hogan Acked-by: Guenter Roeck Reviewed-by: Andi Kleen Cc: Andi Kleen Cc: Michal Marek Cc: Guenter Roeck Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11931/ Signed-off-by: Ralf Baechle --- arch/mips/vdso/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips') diff --git a/arch/mips/vdso/Makefile b/arch/mips/vdso/Makefile index 14568900fc1d..ee3617c0c5e2 100644 --- a/arch/mips/vdso/Makefile +++ b/arch/mips/vdso/Makefile @@ -26,7 +26,7 @@ aflags-vdso := $(ccflags-vdso) \ # the comments on that file. # ifndef CONFIG_CPU_MIPSR6 - ifeq ($(call ld-ifversion, -lt, 22500000, y),y) + ifeq ($(call ld-ifversion, -lt, 225000000, y),y) $(warning MIPS VDSO requires binutils >= 2.25) obj-vdso-y := $(filter-out gettimeofday.o, $(obj-vdso-y)) ccflags-vdso += -DDISABLE_MIPS_VDSO -- cgit v1.2.3 From 800dc4f49cc002879e1e5e6b79926f86b60528e6 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Fri, 22 Jan 2016 09:20:37 -0800 Subject: Revert "MIPS: Fix PAGE_MASK definition" This reverts commit 22b14523994588279ae9c5ccfe64073c1e5b3c00. It was originally sent in an earlier revision of the pfn_t patchset. Besides being broken, the warning is also fixed by PFN_FLAGS_MASK casting the PAGE_MASK to an unsigned long. Reported-by: Manuel Lauss Signed-off-by: Dan Williams Cc: linux-kernel@vger.kernel.org Cc: Linux-MIPS Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12182/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/page.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips') diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index 2046c0230224..21ed7150fec3 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h @@ -33,7 +33,7 @@ #define PAGE_SHIFT 16 #endif #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE - 1)) +#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) /* * This is used for calculating the real page sizes -- cgit v1.2.3 From a68f376844605399cbd28b662d5ed213639f46f7 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Sat, 9 Jan 2016 02:05:31 +0000 Subject: MIPS: io.h: Define `ioremap_cache' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Maciej W. Rozycki Cc: Brian Norris Cc: Rafał Miłecki Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12040/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/io.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/mips') diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index d10fd80dbb7e..2b4dc7ad53b8 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -275,6 +275,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si */ #define ioremap_cachable(offset, size) \ __ioremap_mode((offset), (size), _page_cachable_default) +#define ioremap_cache ioremap_cachable /* * These two are MIPS specific ioremap variant. ioremap_cacheable_cow -- cgit v1.2.3 From 497e803ebf98ea88c7191e67333bfcc6ffd64bc6 Mon Sep 17 00:00:00 2001 From: Matt Redfearn Date: Fri, 18 Dec 2015 12:47:00 +0000 Subject: MIPS: smp-cps: Ensure secondary cores start with EVA disabled The kernel currently assumes that a core will start up in legacy mode using the exception base provided through the CM GCR registers. If a core has been configured in hardware to start in EVA mode, these assumptions will fail. This patch ensures that secondary cores are initialized to meet these assumptions. Signed-off-by: Matt Redfearn Reviewed-by: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11907/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mips-cm.h | 4 ++++ arch/mips/kernel/smp-cps.c | 3 +++ 2 files changed, 7 insertions(+) (limited to 'arch/mips') diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h index 6516e9da5133..b196825a1de9 100644 --- a/arch/mips/include/asm/mips-cm.h +++ b/arch/mips/include/asm/mips-cm.h @@ -243,6 +243,10 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80) #define CM_GCR_BASE_CMDEFTGT_IOCU0 2 #define CM_GCR_BASE_CMDEFTGT_IOCU1 3 +/* GCR_RESET_EXT_BASE register fields */ +#define CM_GCR_RESET_EXT_BASE_EVARESET BIT(31) +#define CM_GCR_RESET_EXT_BASE_UEB BIT(30) + /* GCR_ACCESS register fields */ #define CM_GCR_ACCESS_ACCESSEN_SHF 0 #define CM_GCR_ACCESS_ACCESSEN_MSK (_ULCAST_(0xff) << 0) diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index e04c8057b882..2ad4e4c96d61 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -202,6 +202,9 @@ static void boot_core(unsigned core) /* Ensure its coherency is disabled */ write_gcr_co_coherence(0); + /* Start it with the legacy memory map and exception base */ + write_gcr_co_reset_ext_base(CM_GCR_RESET_EXT_BASE_UEB); + /* Ensure the core can access the GCRs */ access = read_gcr_access(); access |= 1 << (CM_GCR_ACCESS_ACCESSEN_SHF + core); -- cgit v1.2.3 From 2549cc967ebb4043f3507b55e3dc579f44d3b516 Mon Sep 17 00:00:00 2001 From: Jaedon Shin Date: Mon, 21 Dec 2015 12:47:35 +0900 Subject: MIPS: Fix macro typo Change the CONFIG_MIPS_CMDLINE_EXTEND to CONFIG_MIPS_CMDLINE_DTB_EXTEND to resolve the EXTEND_WITH_PROM macro. Signed-off-by: Jaedon Shin Fixes: 2024972ef533 ("MIPS: Make the kernel arguments from dtb available") Reviewed-by: Alexander Sverdlin Cc: Jonas Gorski Cc: Masahiro Yamada Cc: Paul Burton Cc: Aaro Koskinen Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11909/ Signed-off-by: Ralf Baechle --- arch/mips/kernel/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips') diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 66aac55df349..569a7d5242dd 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -623,7 +623,7 @@ static void __init request_crashkernel(struct resource *res) #define USE_PROM_CMDLINE IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER) #define USE_DTB_CMDLINE IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_DTB) -#define EXTEND_WITH_PROM IS_ENABLED(CONFIG_MIPS_CMDLINE_EXTEND) +#define EXTEND_WITH_PROM IS_ENABLED(CONFIG_MIPS_CMDLINE_DTB_EXTEND) static void __init arch_mem_init(char **cmdline_p) { -- cgit v1.2.3