From 5dad549d94c8dac1a99bbc72d481d64dc4974ea3 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Fri, 25 Jan 2019 17:09:26 -0300 Subject: MIPS: DTS: jz4740: Add node for the MMC driver Add a devicetree node for the jz4740-mmc driver. Signed-off-by: Paul Cercueil Signed-off-by: Paul Burton Cc: Rob Herring Cc: Mark Rutland Cc: Ralf Baechle Cc: James Hogan Cc: Ulf Hansson Cc: Linus Walleij Cc: devicetree@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mmc@vger.kernel.org --- arch/mips/boot/dts/ingenic/jz4740.dtsi | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index 2beb78a62b7d..3ffaf63f22dd 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -132,6 +132,24 @@ }; }; + mmc: mmc@10021000 { + compatible = "ingenic,jz4740-mmc"; + reg = <0x10021000 0x1000>; + + clocks = <&cgu JZ4740_CLK_MMC>; + clock-names = "mmc"; + + interrupt-parent = <&intc>; + interrupts = <14>; + + dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>; + dma-names = "rx", "tx"; + + cap-sd-highspeed; + cap-mmc-highspeed; + cap-sdio-irq; + }; + uart0: serial@10030000 { compatible = "ingenic,jz4740-uart"; reg = <0x10030000 0x100>; @@ -164,9 +182,6 @@ interrupts = <20>; clocks = <&cgu JZ4740_CLK_DMA>; - - /* Disable dmac until we have something that uses it */ - status = "disabled"; }; uhc: uhc@13030000 { -- cgit v1.2.3 From a23c4134955e87d9e16149daedefd3a602fb019b Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Thu, 2 May 2019 14:26:57 +0200 Subject: MIPS: BMIPS: add clock controller nodes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that we have a driver for the clock controller, add nodes to allow devices to make use of it. Signed-off-by: Jonas Gorski Reviewed-by: Florian Fainelli Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paul Burton Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: Michael Turquette Cc: Stephen Boyd Cc: Rob Herring Cc: Mark Rutland Cc: bcm-kernel-feedback-list@broadcom.com Cc: Kevin Cernekee Cc: Ralf Baechle Cc: James Hogan --- arch/mips/boot/dts/brcm/bcm3368.dtsi | 12 +++++++++--- arch/mips/boot/dts/brcm/bcm63268.dtsi | 12 +++++++++--- arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 ++++++ arch/mips/boot/dts/brcm/bcm6358.dtsi | 12 +++++++++--- arch/mips/boot/dts/brcm/bcm6362.dtsi | 12 +++++++++--- arch/mips/boot/dts/brcm/bcm6368.dtsi | 12 +++++++++--- 6 files changed, 51 insertions(+), 15 deletions(-) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/brcm/bcm3368.dtsi b/arch/mips/boot/dts/brcm/bcm3368.dtsi index 7a3e5c8943ca..69cbef472377 100644 --- a/arch/mips/boot/dts/brcm/bcm3368.dtsi +++ b/arch/mips/boot/dts/brcm/bcm3368.dtsi @@ -51,16 +51,22 @@ compatible = "simple-bus"; ranges; - periph_cntl: syscon@fff8c000 { + clkctl: clock-controller@fff8c004 { + compatible = "brcm,bcm3368-clocks"; + reg = <0xfff8c004 0x4>; + #clock-cells = <1>; + }; + + periph_cntl: syscon@fff8c008 { compatible = "syscon"; - reg = <0xfff8c000 0xc>; + reg = <0xfff8c000 0x4>; native-endian; }; reboot: syscon-reboot@fff8c008 { compatible = "syscon-reboot"; regmap = <&periph_cntl>; - offset = <0x8>; + offset = <0x0>; mask = <0x1>; }; diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi index 58790b173bb2..beec24145af7 100644 --- a/arch/mips/boot/dts/brcm/bcm63268.dtsi +++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi @@ -51,16 +51,22 @@ compatible = "simple-bus"; ranges; - periph_cntl: syscon@10000000 { + clkctl: clock-controller@10000004 { + compatible = "brcm,bcm63268-clocks"; + reg = <0x10000004 0x4>; + #clock-cells = <1>; + }; + + periph_cntl: syscon@10000008 { compatible = "syscon"; - reg = <0x10000000 0x14>; + reg = <0x10000000 0xc>; native-endian; }; reboot: syscon-reboot@10000008 { compatible = "syscon-reboot"; regmap = <&periph_cntl>; - offset = <0x8>; + offset = <0x0>; mask = <0x1>; }; diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi index bf6716aa425a..af860d06def6 100644 --- a/arch/mips/boot/dts/brcm/bcm6328.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi @@ -51,6 +51,12 @@ compatible = "simple-bus"; ranges; + clkctl: clock-controller@10000004 { + compatible = "brcm,bcm6328-clocks"; + reg = <0x10000004 0x4>; + #clock-cells = <1>; + }; + periph_intc: interrupt-controller@10000020 { compatible = "brcm,bcm6345-l1-intc"; reg = <0x10000020 0x10>, diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi index 26ddae5a4247..f21176cac038 100644 --- a/arch/mips/boot/dts/brcm/bcm6358.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi @@ -51,16 +51,22 @@ compatible = "simple-bus"; ranges; - periph_cntl: syscon@fffe0000 { + clkctl: clock-controller@fffe0004 { + compatible = "brcm,bcm6358-clocks"; + reg = <0xfffe0004 0x4>; + #clock-cells = <1>; + }; + + periph_cntl: syscon@fffe0008 { compatible = "syscon"; - reg = <0xfffe0000 0xc>; + reg = <0xfffe0000 0x4>; native-endian; }; reboot: syscon-reboot@fffe0008 { compatible = "syscon-reboot"; regmap = <&periph_cntl>; - offset = <0x8>; + offset = <0x0>; mask = <0x1>; }; diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi index c387793525dd..8ae6981735b8 100644 --- a/arch/mips/boot/dts/brcm/bcm6362.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi @@ -51,16 +51,22 @@ compatible = "simple-bus"; ranges; - periph_cntl: syscon@10000000 { + clkctl: clock-controller@10000004 { + compatible = "brcm,bcm6362-clocks"; + reg = <0x10000004 0x4>; + #clock-cells = <1>; + }; + + periph_cntl: syscon@10000008 { compatible = "syscon"; - reg = <0x10000000 0x14>; + reg = <0x10000000 0xc>; native-endian; }; reboot: syscon-reboot@10000008 { compatible = "syscon-reboot"; regmap = <&periph_cntl>; - offset = <0x8>; + offset = <0x0>; mask = <0x1>; }; diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi index e116a385525f..449c167dd892 100644 --- a/arch/mips/boot/dts/brcm/bcm6368.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi @@ -51,16 +51,22 @@ compatible = "simple-bus"; ranges; - periph_cntl: syscon@10000000 { + clkctl: clock-controller@10000004 { + compatible = "brcm,bcm6368-clocks"; + reg = <0x10000004 0x4>; + #clock-cells = <1>; + }; + + periph_cntl: syscon@100000008 { compatible = "syscon"; - reg = <0x10000000 0x14>; + reg = <0x10000000 0xc>; native-endian; }; reboot: syscon-reboot@10000008 { compatible = "syscon-reboot"; regmap = <&periph_cntl>; - offset = <0x8>; + offset = <0x0>; mask = <0x1>; }; -- cgit v1.2.3 From f23478f6ea2ed6c8dccc6f7b902c2362ebc197ef Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Fri, 25 Jan 2019 17:09:27 -0300 Subject: MIPS: qi_lb60: Move MMC configuration to devicetree Move the MMC configuration from the board C file to devicetree. The 'power' GPIO was removed and instead the vmmc regulator is used, to follow the changes introduced in the jz4740-mmc driver. Signed-off-by: Paul Cercueil Signed-off-by: Paul Burton --- arch/mips/boot/dts/ingenic/qi_lb60.dts | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts index 76aaf8982554..cc26650562c2 100644 --- a/arch/mips/boot/dts/ingenic/qi_lb60.dts +++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts @@ -2,6 +2,7 @@ /dts-v1/; #include "jz4740.dtsi" +#include / { compatible = "qi,lb60", "ingenic,jz4740"; @@ -9,6 +10,15 @@ chosen { stdout-path = &uart0; }; + + mmc_power: fixedregulator { + compatible = "regulator-fixed"; + regulator-name = "mmc_vcc"; + gpio = <&gpd 2 0>; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; &ext { @@ -30,4 +40,27 @@ groups = "uart0-data"; bias-disable; }; + + pins_mmc: mmc { + mmc { + function = "mmc"; + groups = "mmc-1bit", "mmc-4bit"; + bias-disable; + }; + + mmc-gpios { + pins = "PD0", "PD2"; + bias-disable; + }; + }; +}; + +&mmc { + bus-width = <4>; + max-frequency = <24000000>; + cd-gpios = <&gpd 0 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&mmc_power>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_mmc>; }; -- cgit v1.2.3 From 36ba3eae036242fdc36eb8e89d5001a219a7fb1d Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Thu, 25 Jul 2019 18:02:05 -0400 Subject: MIPS: DTS: jz4740: Add missing nodes Add nodes for the MMC, AIC, ADC, CODEC, MUSB, LCD, memory, and BCH controllers. Signed-off-by: Paul Cercueil Tested-by: Artur Rojek Signed-off-by: Paul Burton --- arch/mips/boot/dts/ingenic/jz4740.dtsi | 84 ++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index 3ffaf63f22dd..bceabf494af5 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -132,6 +132,35 @@ }; }; + aic: audio-controller@10020000 { + compatible = "ingenic,jz4740-i2s"; + reg = <0x10020000 0x38>; + + #sound-dai-cells = <0>; + + interrupt-parent = <&intc>; + interrupts = <18>; + + clocks = <&cgu JZ4740_CLK_AIC>, + <&cgu JZ4740_CLK_I2S>, + <&cgu JZ4740_CLK_EXT>, + <&cgu JZ4740_CLK_PLL_HALF>; + clock-names = "aic", "i2s", "ext", "pll half"; + + dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>; + dma-names = "rx", "tx"; + }; + + codec: audio-codec@100200a4 { + compatible = "ingenic,jz4740-codec"; + reg = <0x10020080 0x8>; + + #sound-dai-cells = <0>; + + clocks = <&cgu JZ4740_CLK_AIC>; + clock-names = "aic"; + }; + mmc: mmc@10021000 { compatible = "ingenic,jz4740-mmc"; reg = <0x10021000 0x1000>; @@ -172,6 +201,38 @@ clock-names = "baud", "module"; }; + adc: adc@10070000 { + compatible = "ingenic,jz4740-adc"; + reg = <0x10070000 0x30>; + #io-channel-cells = <1>; + + clocks = <&cgu JZ4740_CLK_ADC>; + clock-names = "adc"; + + interrupt-parent = <&intc>; + interrupts = <12>; + }; + + nemc: memory-controller@13010000 { + compatible = "ingenic,jz4740-nemc"; + reg = <0x13010000 0x54>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <1 0 0x18000000 0x4000000 + 2 0 0x14000000 0x4000000 + 3 0 0x0c000000 0x4000000 + 4 0 0x08000000 0x4000000>; + + clocks = <&cgu JZ4740_CLK_MCLK>; + }; + + ecc: ecc-controller@13010100 { + compatible = "ingenic,jz4740-ecc"; + reg = <0x13010100 0x2C>; + + clocks = <&cgu JZ4740_CLK_MCLK>; + }; + dmac: dma-controller@13020000 { compatible = "ingenic,jz4740-dma"; reg = <0x13020000 0xbc @@ -197,4 +258,27 @@ status = "disabled"; }; + + udc: usb@13040000 { + compatible = "ingenic,jz4740-musb"; + reg = <0x13040000 0x10000>; + + interrupt-parent = <&intc>; + interrupts = <24>; + interrupt-names = "mc"; + + clocks = <&cgu JZ4740_CLK_UDC>; + clock-names = "udc"; + }; + + lcd: lcd-controller@13050000 { + compatible = "ingenic,jz4740-lcd"; + reg = <0x13050000 0x1000>; + + interrupt-parent = <&intc>; + interrupts = <30>; + + clocks = <&cgu JZ4740_CLK_LCD_PCLK>, <&cgu JZ4740_CLK_LCD>; + clock-names = "lcd_pclk", "lcd"; + }; }; -- cgit v1.2.3 From 8ddebad15e9b0b8d5b9599618c0f7dca96222713 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Thu, 25 Jul 2019 18:02:06 -0400 Subject: MIPS: qi_lb60: Migrate to devicetree Move all the platform data to devicetree. The only bit dropped is the PWM beeper, which requires the PWM driver to be updated. I figured it's okay to remove it here since it's really a non-critical device, and it'll be re-introduced soon enough. The other change is the CS line of the SPI is now set as active low. The SPI core would have forced "active low" anyway, unless the 'spi-cs-high' property is set. In the process of moving to devicetree, we also switched to new drivers: - We use the simple-audio-card and simple-amplifier drivers instead of the custom ASoC code; - We use the new Ingenic DRM driver coupled with the GiantPlus GPM940B0 DRM panel driver instead of the old framebuffer driver; - We use the new jz4780-dma driver instead of the old jz4740-dma one; - We use the ingenic-nand and jz4740-ecc drivers instead of the old jz4740-nand driver; - We use ingenic-battery instead of jz4740-battery; - We use iio-hwmon instead of jz4740-hwmon; - We use ingenic-iio instead of the old jz4740-adc MFD driver. Signed-off-by: Paul Cercueil Tested-by: Artur Rojek [paul.burton@mips.com: Drop the unused & undocumented ili8960 spi@0 node.] Signed-off-by: Paul Burton --- arch/mips/boot/dts/ingenic/qi_lb60.dts | 288 ++++++++++++++++++++++++++++++++- 1 file changed, 287 insertions(+), 1 deletion(-) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts index cc26650562c2..51a0443559e3 100644 --- a/arch/mips/boot/dts/ingenic/qi_lb60.dts +++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts @@ -4,6 +4,16 @@ #include "jz4740.dtsi" #include +#include +#include +#include + +#define KEY_QI_QI KEY_F13 +#define KEY_QI_UPRED KEY_RIGHTALT +#define KEY_QI_VOLUP KEY_VOLUMEUP +#define KEY_QI_VOLDOWN KEY_VOLUMEDOWN +#define KEY_QI_FN KEY_LEFTCTRL + / { compatible = "qi,lb60", "ingenic,jz4740"; @@ -11,7 +21,16 @@ stdout-path = &uart0; }; - mmc_power: fixedregulator { + vcc: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vcc"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + mmc_power: regulator@1 { compatible = "regulator-fixed"; regulator-name = "mmc_vcc"; gpio = <&gpd 2 0>; @@ -19,6 +38,196 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + amp_supply: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "amp_supply"; + gpio = <&gpd 4 0>; + enable-active-high; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + amp: analog-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpb 29 GPIO_ACTIVE_HIGH>; + VCC-supply = <&_supply>; + }; + + sound { + compatible = "simple-audio-card"; + + simple-audio-card,name = "QI LB60"; + simple-audio-card,format = "i2s"; + + simple-audio-card,widgets = + "Speaker", "Speaker", + "Microphone", "Mic"; + simple-audio-card,routing = + "MIC", "Mic", + "Speaker", "OUTL", + "Speaker", "OUTR", + "INL", "LOUT", + "INL", "ROUT"; + + simple-audio-card,aux-devs = <&>; + + simple-audio-card,bitclock-master = <&dai_codec>; + simple-audio-card,frame-master = <&dai_codec>; + + dai_cpu: simple-audio-card,cpu { + sound-dai = <&aic>; + }; + + dai_codec: simple-audio-card,codec { + sound-dai = <&codec>; + }; + }; + + keys { + compatible = "gpio-keys"; + + key { + label = "Power"; + wakeup-source; + linux,code = ; + gpios = <&gpd 29 GPIO_ACTIVE_LOW>; + }; + }; + + keyboard { + compatible = "gpio-matrix-keypad"; + + col-scan-delay-us = <10>; + debounce-delay-ms = <10>; + wakeup-source; + + row-gpios = <&gpd 18 0 &gpd 19 0 &gpd 20 0 &gpd 21 0 + &gpd 22 0 &gpd 23 0 &gpd 24 0 &gpd 26 0>; + col-gpios = <&gpc 10 0 &gpc 11 0 &gpc 12 0 &gpc 13 0 + &gpc 14 0 &gpc 15 0 &gpc 16 0 &gpc 17 0>; + gpio-activelow; + + linux,keymap = < + MATRIX_KEY(0, 0, KEY_F1) /* S2 */ + MATRIX_KEY(0, 1, KEY_F2) /* S3 */ + MATRIX_KEY(0, 2, KEY_F3) /* S4 */ + MATRIX_KEY(0, 3, KEY_F4) /* S5 */ + MATRIX_KEY(0, 4, KEY_F5) /* S6 */ + MATRIX_KEY(0, 5, KEY_F6) /* S7 */ + MATRIX_KEY(0, 6, KEY_F7) /* S8 */ + + MATRIX_KEY(1, 0, KEY_Q) /* S10 */ + MATRIX_KEY(1, 1, KEY_W) /* S11 */ + MATRIX_KEY(1, 2, KEY_E) /* S12 */ + MATRIX_KEY(1, 3, KEY_R) /* S13 */ + MATRIX_KEY(1, 4, KEY_T) /* S14 */ + MATRIX_KEY(1, 5, KEY_Y) /* S15 */ + MATRIX_KEY(1, 6, KEY_U) /* S16 */ + MATRIX_KEY(1, 7, KEY_I) /* S17 */ + MATRIX_KEY(2, 0, KEY_A) /* S18 */ + MATRIX_KEY(2, 1, KEY_S) /* S19 */ + MATRIX_KEY(2, 2, KEY_D) /* S20 */ + MATRIX_KEY(2, 3, KEY_F) /* S21 */ + MATRIX_KEY(2, 4, KEY_G) /* S22 */ + MATRIX_KEY(2, 5, KEY_H) /* S23 */ + MATRIX_KEY(2, 6, KEY_J) /* S24 */ + MATRIX_KEY(2, 7, KEY_K) /* S25 */ + MATRIX_KEY(3, 0, KEY_ESC) /* S26 */ + MATRIX_KEY(3, 1, KEY_Z) /* S27 */ + MATRIX_KEY(3, 2, KEY_X) /* S28 */ + MATRIX_KEY(3, 3, KEY_C) /* S29 */ + MATRIX_KEY(3, 4, KEY_V) /* S30 */ + MATRIX_KEY(3, 5, KEY_B) /* S31 */ + MATRIX_KEY(3, 6, KEY_N) /* S32 */ + MATRIX_KEY(3, 7, KEY_M) /* S33 */ + MATRIX_KEY(4, 0, KEY_TAB) /* S34 */ + MATRIX_KEY(4, 1, KEY_CAPSLOCK) /* S35 */ + MATRIX_KEY(4, 2, KEY_BACKSLASH) /* S36 */ + MATRIX_KEY(4, 3, KEY_APOSTROPHE) /* S37 */ + MATRIX_KEY(4, 4, KEY_COMMA) /* S38 */ + MATRIX_KEY(4, 5, KEY_DOT) /* S39 */ + MATRIX_KEY(4, 6, KEY_SLASH) /* S40 */ + MATRIX_KEY(4, 7, KEY_UP) /* S41 */ + MATRIX_KEY(5, 0, KEY_O) /* S42 */ + MATRIX_KEY(5, 1, KEY_L) /* S43 */ + MATRIX_KEY(5, 2, KEY_EQUAL) /* S44 */ + MATRIX_KEY(5, 3, KEY_QI_UPRED) /* S45 */ + MATRIX_KEY(5, 4, KEY_SPACE) /* S46 */ + MATRIX_KEY(5, 5, KEY_QI_QI) /* S47 */ + MATRIX_KEY(5, 6, KEY_RIGHTCTRL) /* S48 */ + MATRIX_KEY(5, 7, KEY_LEFT) /* S49 */ + MATRIX_KEY(6, 0, KEY_F8) /* S50 */ + MATRIX_KEY(6, 1, KEY_P) /* S51 */ + MATRIX_KEY(6, 2, KEY_BACKSPACE)/* S52 */ + MATRIX_KEY(6, 3, KEY_ENTER) /* S53 */ + MATRIX_KEY(6, 4, KEY_QI_VOLUP) /* S54 */ + MATRIX_KEY(6, 5, KEY_QI_VOLDOWN) /* S55 */ + MATRIX_KEY(6, 6, KEY_DOWN) /* S56 */ + MATRIX_KEY(6, 7, KEY_RIGHT) /* S57 */ + + MATRIX_KEY(7, 0, KEY_LEFTSHIFT) /* S58 */ + MATRIX_KEY(7, 1, KEY_LEFTALT) /* S59 */ + MATRIX_KEY(7, 2, KEY_QI_FN) /* S60 */ + >; + }; + + spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&gpc 23 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&gpc 22 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpc 21 GPIO_ACTIVE_LOW>; + num-chipselects = <1>; + }; + + usb_charger: charger { + compatible = "gpio-charger"; + charger-type = "usb-sdp"; + gpios = <&gpd 28 GPIO_ACTIVE_LOW>; + status-gpios = <&gpc 27 GPIO_ACTIVE_LOW>; + }; + + simple_battery: battery { + compatible = "simple-battery"; + voltage-min-design-microvolt = <3600000>; + voltage-max-design-microvolt = <4200000>; + }; + + pmu { + compatible = "ingenic,jz4740-battery"; + io-channels = <&adc INGENIC_ADC_BATTERY>; + io-channel-names = "battery"; + power-supplies = <&usb_charger>; + monitored-battery = <&simple_battery>; + }; + + hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc INGENIC_ADC_AUX>; + }; + + panel: panel { + compatible = "giantplus,gpm940b0"; + + power-supply = <&vcc>; + + port { + panel_input: endpoint { + remote-endpoint = <&panel_output>; + }; + }; + }; + + usb_phy: usb-phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + + vcc-supply = <&vcc>; + }; }; &ext { @@ -34,7 +243,84 @@ pinctrl-0 = <&pins_uart0>; }; +&uart1 { + status = "disabled"; +}; + +&nemc { + nandc: nand-controller@1 { + compatible = "ingenic,jz4740-nand"; + reg = <1 0 0x4000000>; + + #address-cells = <1>; + #size-cells = <0>; + + ingenic,bch-controller = <&ecc>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_nemc>; + + rb-gpios = <&gpc 30 GPIO_ACTIVE_LOW>; + + nand@1 { + reg = <1>; + + nand-ecc-step-size = <512>; + nand-ecc-strength = <4>; + nand-ecc-mode = "hw"; + nand-is-boot-medium; + nand-on-flash-bbt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "boot"; + reg = <0x0 0x400000>; + }; + + partition@400000 { + label = "kernel"; + reg = <0x400000 0x400000>; + }; + + partition@800000 { + label = "rootfs"; + reg = <0x800000 0x0>; + }; + }; + }; + }; +}; + +&lcd { + pinctrl-names = "default"; + pinctrl-0 = <&pins_lcd>; + + port { + panel_output: endpoint { + remote-endpoint = <&panel_input>; + }; + }; +}; + +&udc { + phys = <&usb_phy>; +}; + &pinctrl { + pins_lcd: lcd { + function = "lcd"; + groups = "lcd-8bit"; + }; + + pins_nemc: nemc { + function = "nand"; + groups = "nand-cs1"; + }; + pins_uart0: uart0 { function = "uart0"; groups = "uart0-data"; -- cgit v1.2.3 From 36aafdbd52881eda9073c4d03d65438a16b87a92 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Wed, 24 Jul 2019 13:16:11 -0400 Subject: MIPS: jz4740: Add DTS nodes for the TCU drivers Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Jonathan Corbet Cc: Lee Jones Cc: Arnd Bergmann Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Michael Turquette Cc: Stephen Boyd Cc: Jason Cooper Cc: Marc Zyngier Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me --- arch/mips/boot/dts/ingenic/jz4740.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/ingenic/jz4770.dtsi | 21 +++++++++++++++++++++ arch/mips/boot/dts/ingenic/jz4780.dtsi | 23 +++++++++++++++++++++++ 3 files changed, 66 insertions(+) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index 2beb78a62b7d..1b4d9d8ace6f 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -53,6 +53,28 @@ clock-names = "rtc"; }; + tcu: timer@10002000 { + compatible = "ingenic,jz4740-tcu", "simple-mfd"; + reg = <0x10002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10002000 0x1000>; + + #clock-cells = <1>; + + clocks = <&cgu JZ4740_CLK_RTC + &cgu JZ4740_CLK_EXT + &cgu JZ4740_CLK_PCLK + &cgu JZ4740_CLK_TCU>; + clock-names = "rtc", "ext", "pclk", "tcu"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&intc>; + interrupts = <23 22 21>; + }; + rtc_dev: rtc@10003000 { compatible = "ingenic,jz4740-rtc"; reg = <0x10003000 0x40>; diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi index 49ede6c14ff3..0bfb9edff3d0 100644 --- a/arch/mips/boot/dts/ingenic/jz4770.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi @@ -46,6 +46,27 @@ #clock-cells = <1>; }; + tcu: timer@10002000 { + compatible = "ingenic,jz4770-tcu", "simple-mfd"; + reg = <0x10002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10002000 0x1000>; + + #clock-cells = <1>; + + clocks = <&cgu JZ4770_CLK_RTC + &cgu JZ4770_CLK_EXT + &cgu JZ4770_CLK_PCLK>; + clock-names = "rtc", "ext", "pclk"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&intc>; + interrupts = <27 26 25>; + }; + pinctrl: pin-controller@10010000 { compatible = "ingenic,jz4770-pinctrl"; reg = <0x10010000 0x600>; diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index b03cdec56de9..c54bd7cfec55 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -46,6 +46,29 @@ #clock-cells = <1>; }; + tcu: timer@10002000 { + compatible = "ingenic,jz4780-tcu", + "ingenic,jz4770-tcu", + "simple-mfd"; + reg = <0x10002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10002000 0x1000>; + + #clock-cells = <1>; + + clocks = <&cgu JZ4780_CLK_RTCLK + &cgu JZ4780_CLK_EXCLK + &cgu JZ4780_CLK_PCLK>; + clock-names = "rtc", "ext", "pclk"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&intc>; + interrupts = <27 26 25>; + }; + rtc_dev: rtc@10003000 { compatible = "ingenic,jz4780-rtc"; reg = <0x10003000 0x4c>; -- cgit v1.2.3 From a68d3b052b57a223a6842883f6a2f71621d2e8cb Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Wed, 24 Jul 2019 13:16:12 -0400 Subject: MIPS: qi_lb60: Reduce system timer and clocksource to 750 kHz The default clock (12 MHz) is too fast for the system timer, which fails to report time accurately. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Jonathan Corbet Cc: Lee Jones Cc: Arnd Bergmann Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Michael Turquette Cc: Stephen Boyd Cc: Jason Cooper Cc: Marc Zyngier Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me --- arch/mips/boot/dts/ingenic/qi_lb60.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts index 76aaf8982554..01b8c917cb33 100644 --- a/arch/mips/boot/dts/ingenic/qi_lb60.dts +++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts @@ -2,6 +2,7 @@ /dts-v1/; #include "jz4740.dtsi" +#include / { compatible = "qi,lb60", "ingenic,jz4740"; @@ -31,3 +32,9 @@ bias-disable; }; }; + +&tcu { + /* 750 kHz for the system timer and clocksource */ + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>; + assigned-clock-rates = <750000>, <750000>; +}; -- cgit v1.2.3 From 157c887aff5236b2ee15d4e7d2719537f14dae49 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Wed, 24 Jul 2019 13:16:13 -0400 Subject: MIPS: CI20: Reduce system timer and clocksource to 3 MHz The default clock (48 MHz) is too fast for the system timer. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Jonathan Corbet Cc: Lee Jones Cc: Arnd Bergmann Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Michael Turquette Cc: Stephen Boyd Cc: Jason Cooper Cc: Marc Zyngier Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me --- arch/mips/boot/dts/ingenic/ci20.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 4f7b1fa31cf5..2e9952311ecd 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -2,6 +2,7 @@ /dts-v1/; #include "jz4780.dtsi" +#include #include / { @@ -238,3 +239,9 @@ bias-disable; }; }; + +&tcu { + /* 3 MHz for the system timer and clocksource */ + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>; + assigned-clock-rates = <3000000>, <3000000>; +}; -- cgit v1.2.3 From 967a7100400ab8fa06752f4791934353bae67ced Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Wed, 24 Jul 2019 13:16:14 -0400 Subject: MIPS: GCW0: Reduce system timer and clocksource to 750 kHz The default clock (12 MHz) is too fast for the system timer. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Jonathan Corbet Cc: Lee Jones Cc: Arnd Bergmann Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Michael Turquette Cc: Stephen Boyd Cc: Jason Cooper Cc: Marc Zyngier Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me --- arch/mips/boot/dts/ingenic/gcw0.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/ingenic/gcw0.dts b/arch/mips/boot/dts/ingenic/gcw0.dts index 35f0291e8d38..f58d239c2058 100644 --- a/arch/mips/boot/dts/ingenic/gcw0.dts +++ b/arch/mips/boot/dts/ingenic/gcw0.dts @@ -2,6 +2,7 @@ /dts-v1/; #include "jz4770.dtsi" +#include / { compatible = "gcw,zero", "ingenic,jz4770"; @@ -60,3 +61,12 @@ /* The WiFi module is connected to the UHC. */ status = "okay"; }; + +&tcu { + /* 750 kHz for the system timer and clocksource */ + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER2>; + assigned-clock-rates = <750000>, <750000>; + + /* PWM1 is in use, so reserve channel #2 for the clocksource */ + ingenic,pwm-channels-mask = <0xfa>; +}; -- cgit v1.2.3 From 048dc3abe82738567435d9caa106a20eb417b28a Mon Sep 17 00:00:00 2001 From: Antoine Tenart Date: Wed, 24 Jul 2019 10:17:09 +0200 Subject: MIPS: dts: mscc: describe the PTP register range This patch adds one register range within the mscc,vsc7514-switch node, to describe the PTP registers. Signed-off-by: Antoine Tenart Signed-off-by: Paul Burton Cc: davem@davemloft.net Cc: richardcochran@gmail.com Cc: alexandre.belloni@bootlin.com Cc: UNGLinuxDriver@microchip.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: netdev@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: thomas.petazzoni@bootlin.com Cc: allan.nielsen@microchip.com --- arch/mips/boot/dts/mscc/ocelot.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi index 33ae74aaa1bb..1e55a778def5 100644 --- a/arch/mips/boot/dts/mscc/ocelot.dtsi +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi @@ -120,6 +120,7 @@ reg = <0x1010000 0x10000>, <0x1030000 0x10000>, <0x1080000 0x100>, + <0x10e0000 0x10000>, <0x11e0000 0x100>, <0x11f0000 0x100>, <0x1200000 0x100>, @@ -134,7 +135,7 @@ <0x1800000 0x80000>, <0x1880000 0x10000>, <0x1060000 0x10000>; - reg-names = "sys", "rew", "qs", "port0", "port1", + reg-names = "sys", "rew", "qs", "ptp", "port0", "port1", "port2", "port3", "port4", "port5", "port6", "port7", "port8", "port9", "port10", "qsys", "ana", "s2"; -- cgit v1.2.3 From b4742e6682d5809ddf4d0a63cb57e629e815ec63 Mon Sep 17 00:00:00 2001 From: Antoine Tenart Date: Wed, 24 Jul 2019 10:17:11 +0200 Subject: MIPS: dts: mscc: describe the PTP ready interrupt This patch adds a description of the PTP ready interrupt, which can be triggered when a PTP timestamp is available on an hardware FIFO. Signed-off-by: Antoine Tenart Signed-off-by: Paul Burton Cc: davem@davemloft.net Cc: richardcochran@gmail.com Cc: alexandre.belloni@bootlin.com Cc: UNGLinuxDriver@microchip.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: netdev@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: thomas.petazzoni@bootlin.com Cc: allan.nielsen@microchip.com --- arch/mips/boot/dts/mscc/ocelot.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/mips/boot') diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi index 1e55a778def5..797d336db54d 100644 --- a/arch/mips/boot/dts/mscc/ocelot.dtsi +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi @@ -139,8 +139,8 @@ "port2", "port3", "port4", "port5", "port6", "port7", "port8", "port9", "port10", "qsys", "ana", "s2"; - interrupts = <21 22>; - interrupt-names = "xtr", "inj"; + interrupts = <18 21 22>; + interrupt-names = "ptp_rdy", "xtr", "inj"; ethernet-ports { #address-cells = <1>; -- cgit v1.2.3