From fd8773f9f544955f6f47dc2ac3ab85ad64376b7f Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 7 Mar 2018 21:21:59 +0100 Subject: arch: remove frv port The Fujitsu FRV kernel port has been around for a long time, but has not seen regular updates in several years and instead was marked 'Orphaned' in 2016 by long-time maintainer David Howells. The SoC product line apparently is apparently still around in the form of the Socionext Milbeaut image processor, but this one no longer uses the FRV CPU cores. This removes all FRV specific files from the kernel. Link: http://www.socionext.com/en/products/assp/milbeaut/ Cc: David Howells Signed-off-by: Arnd Bergmann --- arch/frv/kernel/.gitignore | 1 - arch/frv/kernel/Makefile | 24 - arch/frv/kernel/asm-offsets.c | 96 -- arch/frv/kernel/break.S | 792 -------------- arch/frv/kernel/cmode.S | 189 ---- arch/frv/kernel/debug-stub.c | 258 ----- arch/frv/kernel/dma.c | 463 -------- arch/frv/kernel/entry-table.S | 329 ------ arch/frv/kernel/entry.S | 1519 --------------------------- arch/frv/kernel/frv_ksyms.c | 109 -- arch/frv/kernel/futex.c | 223 ---- arch/frv/kernel/gdb-io.c | 215 ---- arch/frv/kernel/gdb-io.h | 55 - arch/frv/kernel/gdb-stub.c | 2149 -------------------------------------- arch/frv/kernel/head-mmu-fr451.S | 374 ------- arch/frv/kernel/head-uc-fr401.S | 311 ------ arch/frv/kernel/head-uc-fr451.S | 174 --- arch/frv/kernel/head-uc-fr555.S | 347 ------ arch/frv/kernel/head.S | 638 ----------- arch/frv/kernel/head.inc | 50 - arch/frv/kernel/irq-mb93091.c | 157 --- arch/frv/kernel/irq-mb93093.c | 129 --- arch/frv/kernel/irq-mb93493.c | 147 --- arch/frv/kernel/irq.c | 159 --- arch/frv/kernel/local.h | 59 -- arch/frv/kernel/local64.h | 1 - arch/frv/kernel/module.c | 27 - arch/frv/kernel/pm-mb93093.c | 65 -- arch/frv/kernel/pm.c | 352 ------- arch/frv/kernel/process.c | 275 ----- arch/frv/kernel/ptrace.c | 377 ------- arch/frv/kernel/setup.c | 1178 --------------------- arch/frv/kernel/signal.c | 426 -------- arch/frv/kernel/sleep.S | 373 ------- arch/frv/kernel/switch_to.S | 489 --------- arch/frv/kernel/sys_frv.c | 44 - arch/frv/kernel/sysctl.c | 221 ---- arch/frv/kernel/time.c | 122 --- arch/frv/kernel/traps.c | 642 ------------ arch/frv/kernel/uaccess.c | 100 -- arch/frv/kernel/vmlinux.lds.S | 136 --- 41 files changed, 13795 deletions(-) delete mode 100644 arch/frv/kernel/.gitignore delete mode 100644 arch/frv/kernel/Makefile delete mode 100644 arch/frv/kernel/asm-offsets.c delete mode 100644 arch/frv/kernel/break.S delete mode 100644 arch/frv/kernel/cmode.S delete mode 100644 arch/frv/kernel/debug-stub.c delete mode 100644 arch/frv/kernel/dma.c delete mode 100644 arch/frv/kernel/entry-table.S delete mode 100644 arch/frv/kernel/entry.S delete mode 100644 arch/frv/kernel/frv_ksyms.c delete mode 100644 arch/frv/kernel/futex.c delete mode 100644 arch/frv/kernel/gdb-io.c delete mode 100644 arch/frv/kernel/gdb-io.h delete mode 100644 arch/frv/kernel/gdb-stub.c delete mode 100644 arch/frv/kernel/head-mmu-fr451.S delete mode 100644 arch/frv/kernel/head-uc-fr401.S delete mode 100644 arch/frv/kernel/head-uc-fr451.S delete mode 100644 arch/frv/kernel/head-uc-fr555.S delete mode 100644 arch/frv/kernel/head.S delete mode 100644 arch/frv/kernel/head.inc delete mode 100644 arch/frv/kernel/irq-mb93091.c delete mode 100644 arch/frv/kernel/irq-mb93093.c delete mode 100644 arch/frv/kernel/irq-mb93493.c delete mode 100644 arch/frv/kernel/irq.c delete mode 100644 arch/frv/kernel/local.h delete mode 100644 arch/frv/kernel/local64.h delete mode 100644 arch/frv/kernel/module.c delete mode 100644 arch/frv/kernel/pm-mb93093.c delete mode 100644 arch/frv/kernel/pm.c delete mode 100644 arch/frv/kernel/process.c delete mode 100644 arch/frv/kernel/ptrace.c delete mode 100644 arch/frv/kernel/setup.c delete mode 100644 arch/frv/kernel/signal.c delete mode 100644 arch/frv/kernel/sleep.S delete mode 100644 arch/frv/kernel/switch_to.S delete mode 100644 arch/frv/kernel/sys_frv.c delete mode 100644 arch/frv/kernel/sysctl.c delete mode 100644 arch/frv/kernel/time.c delete mode 100644 arch/frv/kernel/traps.c delete mode 100644 arch/frv/kernel/uaccess.c delete mode 100644 arch/frv/kernel/vmlinux.lds.S (limited to 'arch/frv/kernel') diff --git a/arch/frv/kernel/.gitignore b/arch/frv/kernel/.gitignore deleted file mode 100644 index c5f676c3c224..000000000000 --- a/arch/frv/kernel/.gitignore +++ /dev/null @@ -1 +0,0 @@ -vmlinux.lds diff --git a/arch/frv/kernel/Makefile b/arch/frv/kernel/Makefile deleted file mode 100644 index 216ddf30c3c1..000000000000 --- a/arch/frv/kernel/Makefile +++ /dev/null @@ -1,24 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Makefile for the linux kernel. -# - -heads-y := head-uc-fr401.o head-uc-fr451.o head-uc-fr555.o -heads-$(CONFIG_MMU) := head-mmu-fr451.o - -extra-y:= head.o vmlinux.lds - -obj-y := $(heads-y) entry.o entry-table.o break.o switch_to.o \ - process.o traps.o ptrace.o signal.o dma.o \ - sys_frv.o time.o setup.o frv_ksyms.o \ - debug-stub.o irq.o sleep.o uaccess.o - -obj-$(CONFIG_GDBSTUB) += gdb-stub.o gdb-io.o - -obj-$(CONFIG_MB93091_VDK) += irq-mb93091.o -obj-$(CONFIG_PM) += pm.o cmode.o -obj-$(CONFIG_MB93093_PDK) += pm-mb93093.o -obj-$(CONFIG_FUJITSU_MB93493) += irq-mb93493.o -obj-$(CONFIG_SYSCTL) += sysctl.o -obj-$(CONFIG_FUTEX) += futex.o -obj-$(CONFIG_MODULES) += module.o diff --git a/arch/frv/kernel/asm-offsets.c b/arch/frv/kernel/asm-offsets.c deleted file mode 100644 index 0a468e9b51ad..000000000000 --- a/arch/frv/kernel/asm-offsets.c +++ /dev/null @@ -1,96 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Generate definitions needed by assembly language modules. - * This code generates raw asm output which is post-processed - * to extract and format the required data. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DEF_PTREG(sym, reg) OFFSET(sym, pt_regs, reg) -#define DEF_IREG(sym, reg) OFFSET(sym, user_context, reg) -#define DEF_FREG(sym, reg) OFFSET(sym, user_context, reg) -#define DEF_0REG(sym, reg) OFFSET(sym, frv_frame0, reg) - -void foo(void) -{ - /* offsets into the thread_info structure */ - OFFSET(TI_TASK, thread_info, task); - OFFSET(TI_FLAGS, thread_info, flags); - OFFSET(TI_STATUS, thread_info, status); - OFFSET(TI_CPU, thread_info, cpu); - OFFSET(TI_PREEMPT_COUNT, thread_info, preempt_count); - OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit); - BLANK(); - - /* offsets into register file storage */ - DEF_PTREG(REG_PSR, psr); - DEF_PTREG(REG_ISR, isr); - DEF_PTREG(REG_CCR, ccr); - DEF_PTREG(REG_CCCR, cccr); - DEF_PTREG(REG_LR, lr); - DEF_PTREG(REG_LCR, lcr); - DEF_PTREG(REG_PC, pc); - DEF_PTREG(REG__STATUS, __status); - DEF_PTREG(REG_SYSCALLNO, syscallno); - DEF_PTREG(REG_ORIG_GR8, orig_gr8); - DEF_PTREG(REG_GNER0, gner0); - DEF_PTREG(REG_GNER1, gner1); - DEF_PTREG(REG_IACC0, iacc0); - DEF_PTREG(REG_TBR, tbr); - DEF_PTREG(REG_GR0, tbr); - DEFINE(REG__END, sizeof(struct pt_regs)); - BLANK(); - - DEF_0REG(REG_DCR, debug.dcr); - DEF_0REG(REG_IBAR0, debug.ibar[0]); - DEF_0REG(REG_DBAR0, debug.dbar[0]); - DEF_0REG(REG_DBDR00, debug.dbdr[0][0]); - DEF_0REG(REG_DBMR00, debug.dbmr[0][0]); - BLANK(); - - DEF_IREG(__INT_GR0, i.gr[0]); - DEF_FREG(__USER_FPMEDIA, f); - DEF_FREG(__FPMEDIA_FR0, f.fr[0]); - DEF_FREG(__FPMEDIA_FNER0, f.fner[0]); - DEF_FREG(__FPMEDIA_MSR0, f.msr[0]); - DEF_FREG(__FPMEDIA_ACC0, f.acc[0]); - DEF_FREG(__FPMEDIA_ACCG0, f.accg[0]); - DEF_FREG(__FPMEDIA_FSR0, f.fsr[0]); - BLANK(); - - DEFINE(NR_PT_REGS, sizeof(struct pt_regs) / 4); - DEFINE(NR_USER_INT_REGS, sizeof(struct user_int_regs) / 4); - DEFINE(NR_USER_FPMEDIA_REGS, sizeof(struct user_fpmedia_regs) / 4); - DEFINE(NR_USER_CONTEXT, sizeof(struct user_context) / 4); - DEFINE(FRV_FRAME0_SIZE, sizeof(struct frv_frame0)); - BLANK(); - - /* offsets into thread_struct */ - OFFSET(__THREAD_FRAME, thread_struct, frame); - OFFSET(__THREAD_CURR, thread_struct, curr); - OFFSET(__THREAD_SP, thread_struct, sp); - OFFSET(__THREAD_FP, thread_struct, fp); - OFFSET(__THREAD_LR, thread_struct, lr); - OFFSET(__THREAD_PC, thread_struct, pc); - OFFSET(__THREAD_GR16, thread_struct, gr[0]); - OFFSET(__THREAD_SCHED_LR, thread_struct, sched_lr); - OFFSET(__THREAD_FRAME0, thread_struct, frame0); - OFFSET(__THREAD_USER, thread_struct, user); - BLANK(); - - /* offsets into frv_debug_status */ - OFFSET(DEBUG_BPSR, frv_debug_status, bpsr); - OFFSET(DEBUG_DCR, frv_debug_status, dcr); - OFFSET(DEBUG_BRR, frv_debug_status, brr); - OFFSET(DEBUG_NMAR, frv_debug_status, nmar); - BLANK(); -} diff --git a/arch/frv/kernel/break.S b/arch/frv/kernel/break.S deleted file mode 100644 index cbb6958a3147..000000000000 --- a/arch/frv/kernel/break.S +++ /dev/null @@ -1,792 +0,0 @@ -/* break.S: Break interrupt handling (kept separate from entry.S) - * - * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include - -#include - -# -# the break handler has its own stack -# - .section .bss..stack - .globl __break_user_context - .balign THREAD_SIZE -__break_stack: - .space THREAD_SIZE - FRV_FRAME0_SIZE -__break_frame_0: - .space FRV_FRAME0_SIZE - -# -# miscellaneous variables -# - .section .bss -#ifdef CONFIG_MMU - .globl __break_tlb_miss_real_return_info -__break_tlb_miss_real_return_info: - .balign 8 - .space 2*4 /* saved PCSR, PSR for TLB-miss handler fixup */ -#endif - -__break_trace_through_exceptions: - .space 4 - -#define CS2_ECS1 0xe1200000 -#define CS2_USERLED 0x4 - -.macro LEDS val,reg -# sethi.p %hi(CS2_ECS1+CS2_USERLED),gr30 -# setlo %lo(CS2_ECS1+CS2_USERLED),gr30 -# setlos #~\val,\reg -# st \reg,@(gr30,gr0) -# setlos #0x5555,\reg -# sethi.p %hi(0xffc00100),gr30 -# setlo %lo(0xffc00100),gr30 -# sth \reg,@(gr30,gr0) -# membar -.endm - -############################################################################### -# -# entry point for Break Exceptions/Interrupts -# -############################################################################### - .section .text..break - .balign 4 - .globl __entry_break -__entry_break: -#ifdef CONFIG_MMU - movgs gr31,scr3 -#endif - LEDS 0x1001,gr31 - - sethi.p %hi(__break_frame_0),gr31 - setlo %lo(__break_frame_0),gr31 - - stdi gr2,@(gr31,#REG_GR(2)) - movsg ccr,gr3 - sti gr3,@(gr31,#REG_CCR) - - # catch the return from a TLB-miss handler that had single-step disabled - # traps will be enabled, so we have to do this now -#ifdef CONFIG_MMU - movsg bpcsr,gr3 - sethi.p %hi(__break_tlb_miss_return_breaks_here),gr2 - setlo %lo(__break_tlb_miss_return_breaks_here),gr2 - subcc gr2,gr3,gr0,icc0 - beq icc0,#2,__break_return_singlestep_tlbmiss -#endif - - # determine whether we have stepped through into an exception - # - we need to take special action to suspend h/w single stepping if we've done - # that, so that the gdbstub doesn't get bogged down endlessly stepping through - # external interrupt handling - movsg bpsr,gr3 - andicc gr3,#BPSR_BET,gr0,icc0 - bne icc0,#2,__break_maybe_userspace /* jump if PSR.ET was 1 */ - - LEDS 0x1003,gr2 - - movsg brr,gr3 - andicc gr3,#BRR_ST,gr0,icc0 - andicc.p gr3,#BRR_SB,gr0,icc1 - bne icc0,#2,__break_step /* jump if single-step caused break */ - beq icc1,#2,__break_continue /* jump if BREAK didn't cause break */ - - LEDS 0x1007,gr2 - - # handle special breaks - movsg bpcsr,gr3 - - sethi.p %hi(__entry_return_singlestep_breaks_here),gr2 - setlo %lo(__entry_return_singlestep_breaks_here),gr2 - subcc gr2,gr3,gr0,icc0 - beq icc0,#2,__break_return_singlestep - - bra __break_continue - - -############################################################################### -# -# handle BREAK instruction in kernel-mode exception epilogue -# -############################################################################### -__break_return_singlestep: - LEDS 0x100f,gr2 - - # special break insn requests single-stepping to be turned back on - # HERE RETT - # PSR.ET 0 0 - # PSR.PS old PSR.S ? - # PSR.S 1 1 - # BPSR.ET 0 1 (can't have caused orig excep otherwise) - # BPSR.BS 1 old PSR.S - movsg dcr,gr2 - sethi.p %hi(DCR_SE),gr3 - setlo %lo(DCR_SE),gr3 - or gr2,gr3,gr2 - movgs gr2,dcr - - movsg psr,gr2 - andi gr2,#PSR_PS,gr2 - slli gr2,#11,gr2 /* PSR.PS -> BPSR.BS */ - ori gr2,#BPSR_BET,gr2 /* 1 -> BPSR.BET */ - movgs gr2,bpsr - - # return to the invoker of the original kernel exception - movsg pcsr,gr2 - movgs gr2,bpcsr - - LEDS 0x101f,gr2 - - ldi @(gr31,#REG_CCR),gr3 - movgs gr3,ccr - lddi.p @(gr31,#REG_GR(2)),gr2 - xor gr31,gr31,gr31 - movgs gr0,brr -#ifdef CONFIG_MMU - movsg scr3,gr31 -#endif - rett #1 - -############################################################################### -# -# handle BREAK instruction in TLB-miss handler return path -# -############################################################################### -#ifdef CONFIG_MMU -__break_return_singlestep_tlbmiss: - LEDS 0x1100,gr2 - - sethi.p %hi(__break_tlb_miss_real_return_info),gr3 - setlo %lo(__break_tlb_miss_real_return_info),gr3 - lddi @(gr3,#0),gr2 - movgs gr2,pcsr - movgs gr3,psr - - bra __break_return_singlestep -#endif - - -############################################################################### -# -# handle single stepping into an exception prologue from kernel mode -# - we try and catch it whilst it is still in the main vector table -# - if we catch it there, we have to jump to the fixup handler -# - there is a fixup table that has a pointer for every 16b slot in the trap -# table -# -############################################################################### -__break_step: - LEDS 0x2003,gr2 - - # external interrupts seem to escape from the trap table before single - # step catches up with them - movsg bpcsr,gr2 - sethi.p %hi(__entry_kernel_external_interrupt),gr3 - setlo %lo(__entry_kernel_external_interrupt),gr3 - subcc.p gr2,gr3,gr0,icc0 - sethi %hi(__entry_uspace_external_interrupt),gr3 - setlo.p %lo(__entry_uspace_external_interrupt),gr3 - beq icc0,#2,__break_step_kernel_external_interrupt - subcc.p gr2,gr3,gr0,icc0 - sethi %hi(__entry_kernel_external_interrupt_virtually_disabled),gr3 - setlo.p %lo(__entry_kernel_external_interrupt_virtually_disabled),gr3 - beq icc0,#2,__break_step_uspace_external_interrupt - subcc.p gr2,gr3,gr0,icc0 - sethi %hi(__entry_kernel_external_interrupt_virtual_reenable),gr3 - setlo.p %lo(__entry_kernel_external_interrupt_virtual_reenable),gr3 - beq icc0,#2,__break_step_kernel_external_interrupt_virtually_disabled - subcc gr2,gr3,gr0,icc0 - beq icc0,#2,__break_step_kernel_external_interrupt_virtual_reenable - - LEDS 0x2007,gr2 - - # the two main vector tables are adjacent on one 8Kb slab - movsg bpcsr,gr2 - setlos #0xffffe000,gr3 - and gr2,gr3,gr2 - sethi.p %hi(__trap_tables),gr3 - setlo %lo(__trap_tables),gr3 - subcc gr2,gr3,gr0,icc0 - bne icc0,#2,__break_continue - - LEDS 0x200f,gr2 - - # skip workaround if so requested by GDB - sethi.p %hi(__break_trace_through_exceptions),gr3 - setlo %lo(__break_trace_through_exceptions),gr3 - ld @(gr3,gr0),gr3 - subcc gr3,gr0,gr0,icc0 - bne icc0,#0,__break_continue - - LEDS 0x201f,gr2 - - # access the fixup table - there's a 1:1 mapping between the slots in the trap tables and - # the slots in the trap fixup tables allowing us to simply divide the offset into the - # former by 4 to access the latter - sethi.p %hi(__trap_tables),gr3 - setlo %lo(__trap_tables),gr3 - movsg bpcsr,gr2 - sub gr2,gr3,gr2 - srli.p gr2,#2,gr2 - - sethi %hi(__trap_fixup_tables),gr3 - setlo.p %lo(__trap_fixup_tables),gr3 - andi gr2,#~3,gr2 - ld @(gr2,gr3),gr2 - jmpil @(gr2,#0) - -# step through an internal exception from kernel mode - .globl __break_step_kernel_softprog_interrupt -__break_step_kernel_softprog_interrupt: - sethi.p %hi(__entry_kernel_softprog_interrupt_reentry),gr3 - setlo %lo(__entry_kernel_softprog_interrupt_reentry),gr3 - bra __break_return_as_kernel_prologue - -# step through an external interrupt from kernel mode - .globl __break_step_kernel_external_interrupt -__break_step_kernel_external_interrupt: - # deal with virtual interrupt disablement - beq icc2,#0,__break_step_kernel_external_interrupt_virtually_disabled - - sethi.p %hi(__entry_kernel_external_interrupt_reentry),gr3 - setlo %lo(__entry_kernel_external_interrupt_reentry),gr3 - -__break_return_as_kernel_prologue: - LEDS 0x203f,gr2 - - movgs gr3,bpcsr - - # do the bit we had to skip -#ifdef CONFIG_MMU - movsg ear0,gr2 /* EAR0 can get clobbered by gdb-stub (ICI/ICEI) */ - movgs gr2,scr2 -#endif - - or.p sp,gr0,gr2 /* set up the stack pointer */ - subi sp,#REG__END,sp - sti.p gr2,@(sp,#REG_SP) - - setlos #REG__STATUS_STEP,gr2 - sti gr2,@(sp,#REG__STATUS) /* record single step status */ - - # cancel single-stepping mode - movsg dcr,gr2 - sethi.p %hi(~DCR_SE),gr3 - setlo %lo(~DCR_SE),gr3 - and gr2,gr3,gr2 - movgs gr2,dcr - - LEDS 0x207f,gr2 - - ldi @(gr31,#REG_CCR),gr3 - movgs gr3,ccr - lddi.p @(gr31,#REG_GR(2)),gr2 - xor gr31,gr31,gr31 - movgs gr0,brr -#ifdef CONFIG_MMU - movsg scr3,gr31 -#endif - rett #1 - -# we single-stepped into an interrupt handler whilst interrupts were merely virtually disabled -# need to really disable interrupts, set flag, fix up and return -__break_step_kernel_external_interrupt_virtually_disabled: - movsg psr,gr2 - andi gr2,#~PSR_PIL,gr2 - ori gr2,#PSR_PIL_14,gr2 /* debugging interrupts only */ - movgs gr2,psr - - ldi @(gr31,#REG_CCR),gr3 - movgs gr3,ccr - subcc.p gr0,gr0,gr0,icc2 /* leave Z set, clear C */ - - # exceptions must've been enabled and we must've been in supervisor mode - setlos BPSR_BET|BPSR_BS,gr3 - movgs gr3,bpsr - - # return to where the interrupt happened - movsg pcsr,gr2 - movgs gr2,bpcsr - - lddi.p @(gr31,#REG_GR(2)),gr2 - - xor gr31,gr31,gr31 - movgs gr0,brr -#ifdef CONFIG_MMU - movsg scr3,gr31 -#endif - rett #1 - -# we stepped through into the virtual interrupt reenablement trap -# -# we also want to single step anyway, but after fixing up so that we get an event on the -# instruction after the broken-into exception returns - .globl __break_step_kernel_external_interrupt_virtual_reenable -__break_step_kernel_external_interrupt_virtual_reenable: - movsg psr,gr2 - andi gr2,#~PSR_PIL,gr2 - movgs gr2,psr - - ldi @(gr31,#REG_CCR),gr3 - movgs gr3,ccr - subicc gr0,#1,gr0,icc2 /* clear Z, set C */ - - # save the adjusted ICC2 - movsg ccr,gr3 - sti gr3,@(gr31,#REG_CCR) - - # exceptions must've been enabled and we must've been in supervisor mode - setlos BPSR_BET|BPSR_BS,gr3 - movgs gr3,bpsr - - # return to where the trap happened - movsg pcsr,gr2 - movgs gr2,bpcsr - - # and then process the single step - bra __break_continue - -# step through an internal exception from uspace mode - .globl __break_step_uspace_softprog_interrupt -__break_step_uspace_softprog_interrupt: - sethi.p %hi(__entry_uspace_softprog_interrupt_reentry),gr3 - setlo %lo(__entry_uspace_softprog_interrupt_reentry),gr3 - bra __break_return_as_uspace_prologue - -# step through an external interrupt from kernel mode - .globl __break_step_uspace_external_interrupt -__break_step_uspace_external_interrupt: - sethi.p %hi(__entry_uspace_external_interrupt_reentry),gr3 - setlo %lo(__entry_uspace_external_interrupt_reentry),gr3 - -__break_return_as_uspace_prologue: - LEDS 0x20ff,gr2 - - movgs gr3,bpcsr - - # do the bit we had to skip - sethi.p %hi(__kernel_frame0_ptr),gr28 - setlo %lo(__kernel_frame0_ptr),gr28 - ldi.p @(gr28,#0),gr28 - - setlos #REG__STATUS_STEP,gr2 - sti gr2,@(gr28,#REG__STATUS) /* record single step status */ - - # cancel single-stepping mode - movsg dcr,gr2 - sethi.p %hi(~DCR_SE),gr3 - setlo %lo(~DCR_SE),gr3 - and gr2,gr3,gr2 - movgs gr2,dcr - - LEDS 0x20fe,gr2 - - ldi @(gr31,#REG_CCR),gr3 - movgs gr3,ccr - lddi.p @(gr31,#REG_GR(2)),gr2 - xor gr31,gr31,gr31 - movgs gr0,brr -#ifdef CONFIG_MMU - movsg scr3,gr31 -#endif - rett #1 - -#ifdef CONFIG_MMU -# step through an ITLB-miss handler from user mode - .globl __break_user_insn_tlb_miss -__break_user_insn_tlb_miss: - # we'll want to try the trap stub again - sethi.p %hi(__trap_user_insn_tlb_miss),gr2 - setlo %lo(__trap_user_insn_tlb_miss),gr2 - movgs gr2,bpcsr - -__break_tlb_miss_common: - LEDS 0x2101,gr2 - - # cancel single-stepping mode - movsg dcr,gr2 - sethi.p %hi(~DCR_SE),gr3 - setlo %lo(~DCR_SE),gr3 - and gr2,gr3,gr2 - movgs gr2,dcr - - # we'll swap the real return address for one with a BREAK insn so that we can re-enable - # single stepping on return - movsg pcsr,gr2 - sethi.p %hi(__break_tlb_miss_real_return_info),gr3 - setlo %lo(__break_tlb_miss_real_return_info),gr3 - sti gr2,@(gr3,#0) - - sethi.p %hi(__break_tlb_miss_return_break),gr2 - setlo %lo(__break_tlb_miss_return_break),gr2 - movgs gr2,pcsr - - # we also have to fudge PSR because the return BREAK is in kernel space and we want - # to get a BREAK fault not an access violation should the return be to userspace - movsg psr,gr2 - sti.p gr2,@(gr3,#4) - ori gr2,#PSR_PS,gr2 - movgs gr2,psr - - LEDS 0x2102,gr2 - - ldi @(gr31,#REG_CCR),gr3 - movgs gr3,ccr - lddi @(gr31,#REG_GR(2)),gr2 - movsg scr3,gr31 - movgs gr0,brr - rett #1 - -# step through a DTLB-miss handler from user mode - .globl __break_user_data_tlb_miss -__break_user_data_tlb_miss: - # we'll want to try the trap stub again - sethi.p %hi(__trap_user_data_tlb_miss),gr2 - setlo %lo(__trap_user_data_tlb_miss),gr2 - movgs gr2,bpcsr - bra __break_tlb_miss_common - -# step through an ITLB-miss handler from kernel mode - .globl __break_kernel_insn_tlb_miss -__break_kernel_insn_tlb_miss: - # we'll want to try the trap stub again - sethi.p %hi(__trap_kernel_insn_tlb_miss),gr2 - setlo %lo(__trap_kernel_insn_tlb_miss),gr2 - movgs gr2,bpcsr - bra __break_tlb_miss_common - -# step through a DTLB-miss handler from kernel mode - .globl __break_kernel_data_tlb_miss -__break_kernel_data_tlb_miss: - # we'll want to try the trap stub again - sethi.p %hi(__trap_kernel_data_tlb_miss),gr2 - setlo %lo(__trap_kernel_data_tlb_miss),gr2 - movgs gr2,bpcsr - bra __break_tlb_miss_common -#endif - -############################################################################### -# -# handle debug events originating with userspace -# -############################################################################### -__break_maybe_userspace: - LEDS 0x3003,gr2 - - setlos #BPSR_BS,gr2 - andcc gr3,gr2,gr0,icc0 - bne icc0,#0,__break_continue /* skip if PSR.S was 1 */ - - movsg brr,gr2 - andicc gr2,#BRR_ST|BRR_SB,gr0,icc0 - beq icc0,#0,__break_continue /* jump if not BREAK or single-step */ - - LEDS 0x3007,gr2 - - # do the first part of the exception prologue here - sethi.p %hi(__kernel_frame0_ptr),gr28 - setlo %lo(__kernel_frame0_ptr),gr28 - ldi @(gr28,#0),gr28 - andi gr28,#~7,gr28 - - # set up the kernel stack pointer - sti sp ,@(gr28,#REG_SP) - ori gr28,0,sp - sti gr0 ,@(gr28,#REG_GR(28)) - - stdi gr20,@(gr28,#REG_GR(20)) - stdi gr22,@(gr28,#REG_GR(22)) - - movsg tbr,gr20 - movsg bpcsr,gr21 - movsg psr,gr22 - - # determine the exception type and cancel single-stepping mode - or gr0,gr0,gr23 - - movsg dcr,gr2 - sethi.p %hi(DCR_SE),gr3 - setlo %lo(DCR_SE),gr3 - andcc gr2,gr3,gr0,icc0 - beq icc0,#0,__break_no_user_sstep /* must have been a BREAK insn */ - - not gr3,gr3 - and gr2,gr3,gr2 - movgs gr2,dcr - ori gr23,#REG__STATUS_STEP,gr23 - -__break_no_user_sstep: - LEDS 0x300f,gr2 - - movsg brr,gr2 - andi gr2,#BRR_ST|BRR_SB,gr2 - slli gr2,#1,gr2 - or gr23,gr2,gr23 - sti.p gr23,@(gr28,#REG__STATUS) /* record single step status */ - - # adjust the value acquired from TBR - this indicates the exception - setlos #~TBR_TT,gr2 - and.p gr20,gr2,gr20 - setlos #TBR_TT_BREAK,gr2 - or.p gr20,gr2,gr20 - - # fudge PSR.PS and BPSR.BS to return to kernel mode through the trap - # table as trap 126 - andi gr22,#~PSR_PS,gr22 /* PSR.PS should be 0 */ - movgs gr22,psr - - setlos #BPSR_BS,gr2 /* BPSR.BS should be 1 and BPSR.BET 0 */ - movgs gr2,bpsr - - # return through remainder of the exception prologue - # - need to load gr23 with return handler address - sethi.p %hi(__entry_return_from_user_exception),gr23 - setlo %lo(__entry_return_from_user_exception),gr23 - sethi.p %hi(__entry_common),gr3 - setlo %lo(__entry_common),gr3 - movgs gr3,bpcsr - - LEDS 0x301f,gr2 - - ldi @(gr31,#REG_CCR),gr3 - movgs gr3,ccr - lddi.p @(gr31,#REG_GR(2)),gr2 - xor gr31,gr31,gr31 - movgs gr0,brr -#ifdef CONFIG_MMU - movsg scr3,gr31 -#endif - rett #1 - -############################################################################### -# -# resume normal debug-mode entry -# -############################################################################### -__break_continue: - LEDS 0x4003,gr2 - - # set up the kernel stack pointer - sti sp,@(gr31,#REG_SP) - - sethi.p %hi(__break_frame_0),sp - setlo %lo(__break_frame_0),sp - - # finish building the exception frame - stdi gr4 ,@(gr31,#REG_GR(4)) - stdi gr6 ,@(gr31,#REG_GR(6)) - stdi gr8 ,@(gr31,#REG_GR(8)) - stdi gr10,@(gr31,#REG_GR(10)) - stdi gr12,@(gr31,#REG_GR(12)) - stdi gr14,@(gr31,#REG_GR(14)) - stdi gr16,@(gr31,#REG_GR(16)) - stdi gr18,@(gr31,#REG_GR(18)) - stdi gr20,@(gr31,#REG_GR(20)) - stdi gr22,@(gr31,#REG_GR(22)) - stdi gr24,@(gr31,#REG_GR(24)) - stdi gr26,@(gr31,#REG_GR(26)) - sti gr0 ,@(gr31,#REG_GR(28)) /* NULL frame pointer */ - sti gr29,@(gr31,#REG_GR(29)) - sti gr30,@(gr31,#REG_GR(30)) - sti gr8 ,@(gr31,#REG_ORIG_GR8) - -#ifdef CONFIG_MMU - movsg scr3,gr19 - sti gr19,@(gr31,#REG_GR(31)) -#endif - - movsg bpsr ,gr19 - movsg tbr ,gr20 - movsg bpcsr,gr21 - movsg psr ,gr22 - movsg isr ,gr23 - movsg cccr ,gr25 - movsg lr ,gr26 - movsg lcr ,gr27 - - andi.p gr22,#~(PSR_S|PSR_ET),gr5 /* rebuild PSR */ - andi gr19,#PSR_ET,gr4 - or.p gr4,gr5,gr5 - srli gr19,#10,gr4 - andi gr4,#PSR_S,gr4 - or.p gr4,gr5,gr5 - - setlos #-1,gr6 - sti gr20,@(gr31,#REG_TBR) - sti gr21,@(gr31,#REG_PC) - sti gr5 ,@(gr31,#REG_PSR) - sti gr23,@(gr31,#REG_ISR) - sti gr25,@(gr31,#REG_CCCR) - stdi gr26,@(gr31,#REG_LR) - sti gr6 ,@(gr31,#REG_SYSCALLNO) - - # store CPU-specific regs - movsg iacc0h,gr4 - movsg iacc0l,gr5 - stdi gr4,@(gr31,#REG_IACC0) - - movsg gner0,gr4 - movsg gner1,gr5 - stdi gr4,@(gr31,#REG_GNER0) - - # build the debug register frame - movsg brr,gr4 - movgs gr0,brr - movsg nmar,gr5 - movsg dcr,gr6 - - sethi.p %hi(__debug_status),gr7 - setlo %lo(__debug_status),gr7 - - stdi gr4 ,@(gr7,#DEBUG_BRR) - sti gr19,@(gr7,#DEBUG_BPSR) - sti.p gr6 ,@(gr7,#DEBUG_DCR) - - # trap exceptions during break handling and disable h/w breakpoints/watchpoints - sethi %hi(DCR_EBE),gr5 - setlo.p %lo(DCR_EBE),gr5 - sethi %hi(__entry_breaktrap_table),gr4 - setlo %lo(__entry_breaktrap_table),gr4 - movgs gr5,dcr - movgs gr4,tbr - - # set up kernel global registers - sethi.p %hi(__kernel_current_task),gr5 - setlo %lo(__kernel_current_task),gr5 - ld @(gr5,gr0),gr29 - ldi.p @(gr29,#4),gr15 ; __current_thread_info = current->thread_info - - sethi %hi(_gp),gr16 - setlo.p %lo(_gp),gr16 - - # make sure we (the kernel) get div-zero and misalignment exceptions - setlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5 - movgs gr5,isr - - # enter the GDB stub - LEDS 0x4007,gr2 - - or.p gr0,gr0,fp - call debug_stub - - LEDS 0x403f,gr2 - - # return from break - lddi @(gr31,#REG_IACC0),gr4 - movgs gr4,iacc0h - movgs gr5,iacc0l - - lddi @(gr31,#REG_GNER0),gr4 - movgs gr4,gner0 - movgs gr5,gner1 - - lddi @(gr31,#REG_LR) ,gr26 - lddi @(gr31,#REG_CCR) ,gr24 - lddi @(gr31,#REG_PSR) ,gr22 - ldi @(gr31,#REG_PC) ,gr21 - ldi @(gr31,#REG_TBR) ,gr20 - - sethi.p %hi(__debug_status),gr6 - setlo %lo(__debug_status),gr6 - ldi.p @(gr6,#DEBUG_DCR) ,gr6 - - andi gr22,#PSR_S,gr19 /* rebuild BPSR */ - andi.p gr22,#PSR_ET,gr5 - slli gr19,#10,gr19 - or gr5,gr19,gr19 - - movgs gr6 ,dcr - movgs gr19,bpsr - movgs gr20,tbr - movgs gr21,bpcsr - movgs gr23,isr - movgs gr24,ccr - movgs gr25,cccr - movgs gr26,lr - movgs gr27,lcr - - LEDS 0x407f,gr2 - -#ifdef CONFIG_MMU - ldi @(gr31,#REG_GR(31)),gr2 - movgs gr2,scr3 -#endif - - ldi @(gr31,#REG_GR(30)),gr30 - ldi @(gr31,#REG_GR(29)),gr29 - lddi @(gr31,#REG_GR(26)),gr26 - lddi @(gr31,#REG_GR(24)),gr24 - lddi @(gr31,#REG_GR(22)),gr22 - lddi @(gr31,#REG_GR(20)),gr20 - lddi @(gr31,#REG_GR(18)),gr18 - lddi @(gr31,#REG_GR(16)),gr16 - lddi @(gr31,#REG_GR(14)),gr14 - lddi @(gr31,#REG_GR(12)),gr12 - lddi @(gr31,#REG_GR(10)),gr10 - lddi @(gr31,#REG_GR(8)) ,gr8 - lddi @(gr31,#REG_GR(6)) ,gr6 - lddi @(gr31,#REG_GR(4)) ,gr4 - lddi @(gr31,#REG_GR(2)) ,gr2 - ldi.p @(gr31,#REG_SP) ,sp - - xor gr31,gr31,gr31 - movgs gr0,brr -#ifdef CONFIG_MMU - movsg scr3,gr31 -#endif - rett #1 - -################################################################################################### -# -# GDB stub "system calls" -# -################################################################################################### - -#ifdef CONFIG_GDBSTUB - # void gdbstub_console_write(struct console *con, const char *p, unsigned n) - .globl gdbstub_console_write -gdbstub_console_write: - break - bralr -#endif - - # GDB stub BUG() trap - # GR8 is the proposed signal number - .globl __debug_bug_trap -__debug_bug_trap: - break - bralr - - # transfer kernel exeception to GDB for handling - .globl __break_hijack_kernel_event -__break_hijack_kernel_event: - break - .globl __break_hijack_kernel_event_breaks_here -__break_hijack_kernel_event_breaks_here: - nop - -#ifdef CONFIG_MMU - # handle a return from TLB-miss that requires single-step reactivation - .globl __break_tlb_miss_return_break -__break_tlb_miss_return_break: - break -__break_tlb_miss_return_breaks_here: - nop -#endif - - # guard the first .text label in the next file from confusion - nop diff --git a/arch/frv/kernel/cmode.S b/arch/frv/kernel/cmode.S deleted file mode 100644 index 53deeb5d7e87..000000000000 --- a/arch/frv/kernel/cmode.S +++ /dev/null @@ -1,189 +0,0 @@ -/* cmode.S: clock mode management - * - * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. - * Written by David Woodhouse (dwmw2@infradead.org) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define __addr_MASK 0xfeff9820 /* interrupt controller mask */ - -#define __addr_SDRAMC 0xfe000400 /* SDRAM controller regs */ -#define SDRAMC_DSTS 0x28 /* SDRAM status */ -#define SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is in self-refresh mode */ -#define SDRAMC_DRCN 0x30 /* SDRAM refresh control */ -#define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh mode */ -#define __addr_CLKC 0xfeff9a00 -#define CLKC_SWCMODE 0x00000008 -#define __addr_LEDS 0xe1200004 - -.macro li v r - sethi.p %hi(\v),\r - setlo %lo(\v),\r -.endm - - .text - .balign 4 - - -############################################################################### -# -# Change CMODE -# - void frv_change_cmode(int cmode) -# -############################################################################### - .globl frv_change_cmode - .type frv_change_cmode,@function - -.macro LEDS v -#ifdef DEBUG_CMODE - setlos #~\v,gr10 - sti gr10,@(gr11,#0) - membar -#endif -.endm - -frv_change_cmode: - movsg lr,gr9 -#ifdef DEBUG_CMODE - li __addr_LEDS,gr11 -#endif - dcef @(gr0,gr0),#1 - - # Shift argument left by 24 bits to fit in SWCMODE register later. - slli gr8,#24,gr8 - - # (1) Set '0' in the PSR.ET bit, and prohibit interrupts. - movsg psr,gr14 - andi gr14,#~PSR_ET,gr3 - movgs gr3,psr - -#if 0 // Fujitsu recommend to skip this and will update docs. - # (2) Set '0' to all bits of the MASK register of the interrupt - # controller, and mask interrupts. - li __addr_MASK,gr12 - ldi @(gr12,#0),gr13 - li 0xffff0000,gr4 - sti gr4,@(gr12,#0) -#endif - - # (3) Stop the transfer function of DMAC. Stop all the bus masters - # to access SDRAM and the internal resources. - - # (already done by caller) - - # (4) Preload a series of following instructions to the instruction - # cache. - li #__cmode_icache_lock_start,gr3 - li #__cmode_icache_lock_end,gr4 - -1: icpl gr3,gr0,#1 - addi gr3,#L1_CACHE_BYTES,gr3 - cmp gr4,gr3,icc0 - bhi icc0,#0,1b - - # Set up addresses in regs for later steps. - setlos SDRAMC_DRCN_SR,gr3 - li __addr_SDRAMC,gr4 - li __addr_CLKC,gr5 - ldi @(gr5,#0),gr6 - li #0x80000000,gr7 - or gr6,gr7,gr6 - - bra __cmode_icache_lock_start - - .balign L1_CACHE_BYTES -__cmode_icache_lock_start: - - # (5) Flush the content of all caches by the DCEF instruction. - dcef @(gr0,gr0),#1 - - # (6) Execute loading the dummy for SDRAM. - ldi @(gr9,#0),gr0 - - # (7) Set '1' to the DRCN.SR bit, and change SDRAM to the - # self-refresh mode. Execute the dummy load to all memory - # devices set to cacheable on the external bus side in parallel - # with this. - sti gr3,@(gr4,#SDRAMC_DRCN) - - # (8) Execute memory barrier instruction (MEMBAR). - membar - - # (9) Read the DSTS register repeatedly until '1' stands in the - # DSTS.SSI field. -1: ldi @(gr4,#SDRAMC_DSTS),gr3 - andicc gr3,#SDRAMC_DSTS_SSI,gr3,icc0 - beq icc0,#0,1b - - # (10) Execute memory barrier instruction (MEMBAR). - membar - -#if 1 - # (11) Set the value of CMODE that you want to change to - # SWCMODE.SWCM[3:0]. - sti gr8,@(gr5,#CLKC_SWCMODE) - - # (12) Set '1' to the CLKC.SWEN bit. In that case, do not change - # fields other than SWEN of the CLKC register. - sti gr6,@(gr5,#0) -#endif - # (13) Execute the instruction just after the memory barrier - # instruction that executes the self-loop 256 times. (Meanwhile, - # the CMODE switch is done.) - membar - setlos #256,gr7 -2: subicc gr7,#1,gr7,icc0 - bne icc0,#2,2b - - LEDS 0x36 - - # (14) Release the self-refresh of SDRAM. - sti gr0,@(gr4,#SDRAMC_DRCN) - - # Wait for it... -3: ldi @(gr4,#SDRAMC_DSTS),gr3 - andicc gr3,#SDRAMC_DSTS_SSI,gr3,icc0 - bne icc0,#2,3b - -#if 0 - li 0x0100000,gr10 -4: subicc gr10,#1,gr10,icc0 - - bne icc0,#0,4b -#endif - -__cmode_icache_lock_end: - - li #__cmode_icache_lock_start,gr3 - li #__cmode_icache_lock_end,gr4 - -4: icul gr3 - addi gr3,#L1_CACHE_BYTES,gr3 - cmp gr4,gr3,icc0 - bhi icc0,#0,4b - -#if 0 // Fujitsu recommend to skip this and will update docs. - # (15) Release the interrupt mask setting of the MASK register of - # the interrupt controller if necessary. - sti gr13,@(gr12,#0) -#endif - # (16) Set 1' in the PSR.ET bit, and permit interrupt. - movgs gr14,psr - - bralr - - .size frv_change_cmode, .-frv_change_cmode diff --git a/arch/frv/kernel/debug-stub.c b/arch/frv/kernel/debug-stub.c deleted file mode 100644 index a0228f717ef2..000000000000 --- a/arch/frv/kernel/debug-stub.c +++ /dev/null @@ -1,258 +0,0 @@ -/* debug-stub.c: debug-mode stub - * - * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include "gdb-io.h" - -/* CPU board CON5 */ -#define __UART0(X) (*(volatile uint8_t *)(UART0_BASE + (UART_##X))) - -#define LSR_WAIT_FOR0(STATE) \ -do { \ -} while (!(__UART0(LSR) & UART_LSR_##STATE)) - -#define FLOWCTL_QUERY0(LINE) ({ __UART0(MSR) & UART_MSR_##LINE; }) -#define FLOWCTL_CLEAR0(LINE) do { __UART0(MCR) &= ~UART_MCR_##LINE; } while (0) -#define FLOWCTL_SET0(LINE) do { __UART0(MCR) |= UART_MCR_##LINE; } while (0) - -#define FLOWCTL_WAIT_FOR0(LINE) \ -do { \ - gdbstub_do_rx(); \ -} while(!FLOWCTL_QUERY(LINE)) - -struct frv_debug_status __debug_status; - -static void __init debug_stub_init(void); - -/*****************************************************************************/ -/* - * debug mode handler stub - * - we come here with the CPU in debug mode and with exceptions disabled - * - handle debugging services for userspace - */ -asmlinkage void debug_stub(void) -{ - unsigned long hsr0; - int type = 0; - - static u8 inited = 0; - if (!inited) { - debug_stub_init(); - type = -1; - inited = 1; - } - - hsr0 = __get_HSR(0); - if (hsr0 & HSR0_ETMD) - __set_HSR(0, hsr0 & ~HSR0_ETMD); - - /* disable single stepping */ - __debug_status.dcr &= ~DCR_SE; - - /* kernel mode can propose an exception be handled in debug mode by jumping to a special - * location */ - if (__debug_frame->pc == (unsigned long) __break_hijack_kernel_event_breaks_here) { - /* replace the debug frame with the kernel frame and discard - * the top kernel context */ - *__debug_frame = *__frame; - __frame = __debug_frame->next_frame; - __debug_status.brr = (__debug_frame->tbr & TBR_TT) << 12; - __debug_status.brr |= BRR_EB; - } - - if (__debug_frame->pc == (unsigned long) __debug_bug_trap + 4) { - __debug_frame->pc = __debug_frame->lr; - type = __debug_frame->gr8; - } - -#ifdef CONFIG_GDBSTUB - gdbstub(type); -#endif - - if (hsr0 & HSR0_ETMD) - __set_HSR(0, __get_HSR(0) | HSR0_ETMD); - -} /* end debug_stub() */ - -/*****************************************************************************/ -/* - * debug stub initialisation - */ -static void __init debug_stub_init(void) -{ - __set_IRR(6, 0xff000000); /* map ERRs to NMI */ - __set_IITMR(1, 0x20000000); /* ERR0/1, UART0/1 IRQ detect levels */ - - asm volatile(" movgs gr0,ibar0 \n" - " movgs gr0,ibar1 \n" - " movgs gr0,ibar2 \n" - " movgs gr0,ibar3 \n" - " movgs gr0,dbar0 \n" - " movgs gr0,dbmr00 \n" - " movgs gr0,dbmr01 \n" - " movgs gr0,dbdr00 \n" - " movgs gr0,dbdr01 \n" - " movgs gr0,dbar1 \n" - " movgs gr0,dbmr10 \n" - " movgs gr0,dbmr11 \n" - " movgs gr0,dbdr10 \n" - " movgs gr0,dbdr11 \n" - ); - - /* deal with debugging stub initialisation and initial pause */ - if (__debug_frame->pc == (unsigned long) __debug_stub_init_break) - __debug_frame->pc = (unsigned long) start_kernel; - - /* enable the debug events we want to trap */ - __debug_status.dcr = DCR_EBE; - -#ifdef CONFIG_GDBSTUB - gdbstub_init(); -#endif - - __clr_MASK_all(); - __clr_MASK(15); - __clr_RC(15); - -} /* end debug_stub_init() */ - -/*****************************************************************************/ -/* - * kernel "exit" trap for gdb stub - */ -void debug_stub_exit(int status) -{ - -#ifdef CONFIG_GDBSTUB - gdbstub_exit(status); -#endif - -} /* end debug_stub_exit() */ - -/*****************************************************************************/ -/* - * send string to serial port - */ -void debug_to_serial(const char *p, int n) -{ - char ch; - - for (; n > 0; n--) { - ch = *p++; - FLOWCTL_SET0(DTR); - LSR_WAIT_FOR0(THRE); - // FLOWCTL_WAIT_FOR(CTS); - - if (ch == 0x0a) { - __UART0(TX) = 0x0d; - mb(); - LSR_WAIT_FOR0(THRE); - // FLOWCTL_WAIT_FOR(CTS); - } - __UART0(TX) = ch; - mb(); - - FLOWCTL_CLEAR0(DTR); - } - -} /* end debug_to_serial() */ - -/*****************************************************************************/ -/* - * send string to serial port - */ -void debug_to_serial2(const char *fmt, ...) -{ - va_list va; - char buf[64]; - int n; - - va_start(va, fmt); - n = vsprintf(buf, fmt, va); - va_end(va); - - debug_to_serial(buf, n); - -} /* end debug_to_serial2() */ - -/*****************************************************************************/ -/* - * set up the ttyS0 serial port baud rate timers - */ -void __init console_set_baud(unsigned baud) -{ - unsigned value, high, low; - u8 lcr; - - /* work out the divisor to give us the nearest higher baud rate */ - value = __serial_clock_speed_HZ / 16 / baud; - - /* determine the baud rate range */ - high = __serial_clock_speed_HZ / 16 / value; - low = __serial_clock_speed_HZ / 16 / (value + 1); - - /* pick the nearest bound */ - if (low + (high - low) / 2 > baud) - value++; - - lcr = __UART0(LCR); - __UART0(LCR) |= UART_LCR_DLAB; - mb(); - __UART0(DLL) = value & 0xff; - __UART0(DLM) = (value >> 8) & 0xff; - mb(); - __UART0(LCR) = lcr; - mb(); - -} /* end console_set_baud() */ - -/*****************************************************************************/ -/* - * - */ -int __init console_get_baud(void) -{ - unsigned value; - u8 lcr; - - lcr = __UART0(LCR); - __UART0(LCR) |= UART_LCR_DLAB; - mb(); - value = __UART0(DLM) << 8; - value |= __UART0(DLL); - __UART0(LCR) = lcr; - mb(); - - return value; -} /* end console_get_baud() */ - -/*****************************************************************************/ -/* - * display BUG() info - */ -#ifndef CONFIG_NO_KERNEL_MSG -void __debug_bug_printk(const char *file, unsigned line) -{ - printk("kernel BUG at %s:%d!\n", file, line); - -} /* end __debug_bug_printk() */ -#endif diff --git a/arch/frv/kernel/dma.c b/arch/frv/kernel/dma.c deleted file mode 100644 index 370dc9fa0b11..000000000000 --- a/arch/frv/kernel/dma.c +++ /dev/null @@ -1,463 +0,0 @@ -/* dma.c: DMA controller management on FR401 and the like - * - * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -struct frv_dma_channel { - uint8_t flags; -#define FRV_DMA_FLAGS_RESERVED 0x01 -#define FRV_DMA_FLAGS_INUSE 0x02 -#define FRV_DMA_FLAGS_PAUSED 0x04 - uint8_t cap; /* capabilities available */ - int irq; /* completion IRQ */ - uint32_t dreqbit; - uint32_t dackbit; - uint32_t donebit; - const unsigned long ioaddr; /* DMA controller regs addr */ - const char *devname; - dma_irq_handler_t handler; - void *data; -}; - - -#define __get_DMAC(IO,X) ({ *(volatile unsigned long *)((IO) + DMAC_##X##x); }) - -#define __set_DMAC(IO,X,V) \ -do { \ - *(volatile unsigned long *)((IO) + DMAC_##X##x) = (V); \ - mb(); \ -} while(0) - -#define ___set_DMAC(IO,X,V) \ -do { \ - *(volatile unsigned long *)((IO) + DMAC_##X##x) = (V); \ -} while(0) - - -static struct frv_dma_channel frv_dma_channels[FRV_DMA_NCHANS] = { - [0] = { - .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK | FRV_DMA_CAP_DONE, - .irq = IRQ_CPU_DMA0, - .dreqbit = SIR_DREQ0_INPUT, - .dackbit = SOR_DACK0_OUTPUT, - .donebit = SOR_DONE0_OUTPUT, - .ioaddr = 0xfe000900, - }, - [1] = { - .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK | FRV_DMA_CAP_DONE, - .irq = IRQ_CPU_DMA1, - .dreqbit = SIR_DREQ1_INPUT, - .dackbit = SOR_DACK1_OUTPUT, - .donebit = SOR_DONE1_OUTPUT, - .ioaddr = 0xfe000980, - }, - [2] = { - .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK, - .irq = IRQ_CPU_DMA2, - .dreqbit = SIR_DREQ2_INPUT, - .dackbit = SOR_DACK2_OUTPUT, - .ioaddr = 0xfe000a00, - }, - [3] = { - .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK, - .irq = IRQ_CPU_DMA3, - .dreqbit = SIR_DREQ3_INPUT, - .dackbit = SOR_DACK3_OUTPUT, - .ioaddr = 0xfe000a80, - }, - [4] = { - .cap = FRV_DMA_CAP_DREQ, - .irq = IRQ_CPU_DMA4, - .dreqbit = SIR_DREQ4_INPUT, - .ioaddr = 0xfe001000, - }, - [5] = { - .cap = FRV_DMA_CAP_DREQ, - .irq = IRQ_CPU_DMA5, - .dreqbit = SIR_DREQ5_INPUT, - .ioaddr = 0xfe001080, - }, - [6] = { - .cap = FRV_DMA_CAP_DREQ, - .irq = IRQ_CPU_DMA6, - .dreqbit = SIR_DREQ6_INPUT, - .ioaddr = 0xfe001100, - }, - [7] = { - .cap = FRV_DMA_CAP_DREQ, - .irq = IRQ_CPU_DMA7, - .dreqbit = SIR_DREQ7_INPUT, - .ioaddr = 0xfe001180, - }, -}; - -static DEFINE_RWLOCK(frv_dma_channels_lock); - -unsigned int frv_dma_inprogress; - -#define frv_clear_dma_inprogress(channel) \ - (void)__atomic32_fetch_and(~(1 << (channel)), &frv_dma_inprogress); - -#define frv_set_dma_inprogress(channel) \ - (void)__atomic32_fetch_or(1 << (channel), &frv_dma_inprogress); - -/*****************************************************************************/ -/* - * DMA irq handler - determine channel involved, grab status and call real handler - */ -static irqreturn_t dma_irq_handler(int irq, void *_channel) -{ - struct frv_dma_channel *channel = _channel; - - frv_clear_dma_inprogress(channel - frv_dma_channels); - return channel->handler(channel - frv_dma_channels, - __get_DMAC(channel->ioaddr, CSTR), - channel->data); - -} /* end dma_irq_handler() */ - -/*****************************************************************************/ -/* - * Determine which DMA controllers are present on this CPU - */ -void __init frv_dma_init(void) -{ - unsigned long psr = __get_PSR(); - int num_dma, i; - - /* First, determine how many DMA channels are available */ - switch (PSR_IMPLE(psr)) { - case PSR_IMPLE_FR405: - case PSR_IMPLE_FR451: - case PSR_IMPLE_FR501: - case PSR_IMPLE_FR551: - num_dma = FRV_DMA_8CHANS; - break; - - case PSR_IMPLE_FR401: - default: - num_dma = FRV_DMA_4CHANS; - break; - } - - /* Now mark all of the non-existent channels as reserved */ - for(i = num_dma; i < FRV_DMA_NCHANS; i++) - frv_dma_channels[i].flags = FRV_DMA_FLAGS_RESERVED; - -} /* end frv_dma_init() */ - -/*****************************************************************************/ -/* - * allocate a DMA controller channel and the IRQ associated with it - */ -int frv_dma_open(const char *devname, - unsigned long dmamask, - int dmacap, - dma_irq_handler_t handler, - unsigned long irq_flags, - void *data) -{ - struct frv_dma_channel *channel; - int dma, ret; - uint32_t val; - - write_lock(&frv_dma_channels_lock); - - ret = -ENOSPC; - - for (dma = FRV_DMA_NCHANS - 1; dma >= 0; dma--) { - channel = &frv_dma_channels[dma]; - - if (!test_bit(dma, &dmamask)) - continue; - - if ((channel->cap & dmacap) != dmacap) - continue; - - if (!frv_dma_channels[dma].flags) - goto found; - } - - goto out; - - found: - ret = request_irq(channel->irq, dma_irq_handler, irq_flags, devname, channel); - if (ret < 0) - goto out; - - /* okay, we've allocated all the resources */ - channel = &frv_dma_channels[dma]; - - channel->flags |= FRV_DMA_FLAGS_INUSE; - channel->devname = devname; - channel->handler = handler; - channel->data = data; - - /* Now make sure we are set up for DMA and not GPIO */ - /* SIR bit must be set for DMA to work */ - __set_SIR(channel->dreqbit | __get_SIR()); - /* SOR bits depend on what the caller requests */ - val = __get_SOR(); - if(dmacap & FRV_DMA_CAP_DACK) - val |= channel->dackbit; - else - val &= ~channel->dackbit; - if(dmacap & FRV_DMA_CAP_DONE) - val |= channel->donebit; - else - val &= ~channel->donebit; - __set_SOR(val); - - ret = dma; - out: - write_unlock(&frv_dma_channels_lock); - return ret; -} /* end frv_dma_open() */ - -EXPORT_SYMBOL(frv_dma_open); - -/*****************************************************************************/ -/* - * close a DMA channel and its associated interrupt - */ -void frv_dma_close(int dma) -{ - struct frv_dma_channel *channel = &frv_dma_channels[dma]; - unsigned long flags; - - write_lock_irqsave(&frv_dma_channels_lock, flags); - - free_irq(channel->irq, channel); - frv_dma_stop(dma); - - channel->flags &= ~FRV_DMA_FLAGS_INUSE; - - write_unlock_irqrestore(&frv_dma_channels_lock, flags); -} /* end frv_dma_close() */ - -EXPORT_SYMBOL(frv_dma_close); - -/*****************************************************************************/ -/* - * set static configuration on a DMA channel - */ -void frv_dma_config(int dma, unsigned long ccfr, unsigned long cctr, unsigned long apr) -{ - unsigned long ioaddr = frv_dma_channels[dma].ioaddr; - - ___set_DMAC(ioaddr, CCFR, ccfr); - ___set_DMAC(ioaddr, CCTR, cctr); - ___set_DMAC(ioaddr, APR, apr); - mb(); - -} /* end frv_dma_config() */ - -EXPORT_SYMBOL(frv_dma_config); - -/*****************************************************************************/ -/* - * start a DMA channel - */ -void frv_dma_start(int dma, - unsigned long sba, unsigned long dba, - unsigned long pix, unsigned long six, unsigned long bcl) -{ - unsigned long ioaddr = frv_dma_channels[dma].ioaddr; - - ___set_DMAC(ioaddr, SBA, sba); - ___set_DMAC(ioaddr, DBA, dba); - ___set_DMAC(ioaddr, PIX, pix); - ___set_DMAC(ioaddr, SIX, six); - ___set_DMAC(ioaddr, BCL, bcl); - ___set_DMAC(ioaddr, CSTR, 0); - mb(); - - __set_DMAC(ioaddr, CCTR, __get_DMAC(ioaddr, CCTR) | DMAC_CCTRx_ACT); - frv_set_dma_inprogress(dma); - -} /* end frv_dma_start() */ - -EXPORT_SYMBOL(frv_dma_start); - -/*****************************************************************************/ -/* - * restart a DMA channel that's been stopped in circular addressing mode by comparison-end - */ -void frv_dma_restart_circular(int dma, unsigned long six) -{ - unsigned long ioaddr = frv_dma_channels[dma].ioaddr; - - ___set_DMAC(ioaddr, SIX, six); - ___set_DMAC(ioaddr, CSTR, __get_DMAC(ioaddr, CSTR) & ~DMAC_CSTRx_CE); - mb(); - - __set_DMAC(ioaddr, CCTR, __get_DMAC(ioaddr, CCTR) | DMAC_CCTRx_ACT); - frv_set_dma_inprogress(dma); - -} /* end frv_dma_restart_circular() */ - -EXPORT_SYMBOL(frv_dma_restart_circular); - -/*****************************************************************************/ -/* - * stop a DMA channel - */ -void frv_dma_stop(int dma) -{ - unsigned long ioaddr = frv_dma_channels[dma].ioaddr; - uint32_t cctr; - - ___set_DMAC(ioaddr, CSTR, 0); - cctr = __get_DMAC(ioaddr, CCTR); - cctr &= ~(DMAC_CCTRx_IE | DMAC_CCTRx_ACT); - cctr |= DMAC_CCTRx_FC; /* fifo clear */ - __set_DMAC(ioaddr, CCTR, cctr); - __set_DMAC(ioaddr, BCL, 0); - frv_clear_dma_inprogress(dma); -} /* end frv_dma_stop() */ - -EXPORT_SYMBOL(frv_dma_stop); - -/*****************************************************************************/ -/* - * test interrupt status of DMA channel - */ -int is_frv_dma_interrupting(int dma) -{ - unsigned long ioaddr = frv_dma_channels[dma].ioaddr; - - return __get_DMAC(ioaddr, CSTR) & (1 << 23); - -} /* end is_frv_dma_interrupting() */ - -EXPORT_SYMBOL(is_frv_dma_interrupting); - -/*****************************************************************************/ -/* - * dump data about a DMA channel - */ -void frv_dma_dump(int dma) -{ - unsigned long ioaddr = frv_dma_channels[dma].ioaddr; - unsigned long cstr, pix, six, bcl; - - cstr = __get_DMAC(ioaddr, CSTR); - pix = __get_DMAC(ioaddr, PIX); - six = __get_DMAC(ioaddr, SIX); - bcl = __get_DMAC(ioaddr, BCL); - - printk("DMA[%d] cstr=%lx pix=%lx six=%lx bcl=%lx\n", dma, cstr, pix, six, bcl); - -} /* end frv_dma_dump() */ - -EXPORT_SYMBOL(frv_dma_dump); - -/*****************************************************************************/ -/* - * pause all DMA controllers - * - called by clock mangling routines - * - caller must be holding interrupts disabled - */ -void frv_dma_pause_all(void) -{ - struct frv_dma_channel *channel; - unsigned long ioaddr; - unsigned long cstr, cctr; - int dma; - - write_lock(&frv_dma_channels_lock); - - for (dma = FRV_DMA_NCHANS - 1; dma >= 0; dma--) { - channel = &frv_dma_channels[dma]; - - if (!(channel->flags & FRV_DMA_FLAGS_INUSE)) - continue; - - ioaddr = channel->ioaddr; - cctr = __get_DMAC(ioaddr, CCTR); - if (cctr & DMAC_CCTRx_ACT) { - cctr &= ~DMAC_CCTRx_ACT; - __set_DMAC(ioaddr, CCTR, cctr); - - do { - cstr = __get_DMAC(ioaddr, CSTR); - } while (cstr & DMAC_CSTRx_BUSY); - - if (cstr & DMAC_CSTRx_FED) - channel->flags |= FRV_DMA_FLAGS_PAUSED; - frv_clear_dma_inprogress(dma); - } - } - -} /* end frv_dma_pause_all() */ - -EXPORT_SYMBOL(frv_dma_pause_all); - -/*****************************************************************************/ -/* - * resume paused DMA controllers - * - called by clock mangling routines - * - caller must be holding interrupts disabled - */ -void frv_dma_resume_all(void) -{ - struct frv_dma_channel *channel; - unsigned long ioaddr; - unsigned long cstr, cctr; - int dma; - - for (dma = FRV_DMA_NCHANS - 1; dma >= 0; dma--) { - channel = &frv_dma_channels[dma]; - - if (!(channel->flags & FRV_DMA_FLAGS_PAUSED)) - continue; - - ioaddr = channel->ioaddr; - cstr = __get_DMAC(ioaddr, CSTR); - cstr &= ~(DMAC_CSTRx_FED | DMAC_CSTRx_INT); - __set_DMAC(ioaddr, CSTR, cstr); - - cctr = __get_DMAC(ioaddr, CCTR); - cctr |= DMAC_CCTRx_ACT; - __set_DMAC(ioaddr, CCTR, cctr); - - channel->flags &= ~FRV_DMA_FLAGS_PAUSED; - frv_set_dma_inprogress(dma); - } - - write_unlock(&frv_dma_channels_lock); - -} /* end frv_dma_resume_all() */ - -EXPORT_SYMBOL(frv_dma_resume_all); - -/*****************************************************************************/ -/* - * dma status clear - */ -void frv_dma_status_clear(int dma) -{ - unsigned long ioaddr = frv_dma_channels[dma].ioaddr; - uint32_t cctr; - ___set_DMAC(ioaddr, CSTR, 0); - - cctr = __get_DMAC(ioaddr, CCTR); -} /* end frv_dma_status_clear() */ - -EXPORT_SYMBOL(frv_dma_status_clear); diff --git a/arch/frv/kernel/entry-table.S b/arch/frv/kernel/entry-table.S deleted file mode 100644 index 06c5ae191e59..000000000000 --- a/arch/frv/kernel/entry-table.S +++ /dev/null @@ -1,329 +0,0 @@ -/* entry-table.S: main trap vector tables and exception jump table - * - * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include - -############################################################################### -# -# Declare the main trap and vector tables -# -# There are six tables: -# -# (1) The trap table for debug mode -# (2) The trap table for kernel mode -# (3) The trap table for user mode -# -# The CPU jumps to an appropriate slot in the appropriate table to perform -# exception processing. We have three different tables for the three -# different CPU modes because there is no hardware differentiation between -# stack pointers for these three modes, and so we have to invent one when -# crossing mode boundaries. -# -# (4) The exception handler vector table -# -# The user and kernel trap tables use the same prologue for normal -# exception processing. The prologue then jumps to the handler in this -# table, as indexed by the exception ID from the TBR. -# -# (5) The fixup table for kernel-trap single-step -# (6) The fixup table for user-trap single-step -# -# Due to the way single-stepping works on this CPU (single-step is not -# disabled when crossing exception boundaries, only when in debug mode), -# we have to catch the single-step event in break.S and jump to the fixup -# routine pointed to by this table. -# -# The linker script places the user mode and kernel mode trap tables on to -# the same 8Kb page, so that break.S can be more efficient when performing -# single-step bypass management -# -############################################################################### - - # trap table for entry from debug mode - .section .trap.break,"ax" - .balign 256*16 - .globl __entry_breaktrap_table -__entry_breaktrap_table: - - # trap table for entry from user mode - .section .trap.user,"ax" - .balign 256*16 - .globl __entry_usertrap_table -__entry_usertrap_table: - - # trap table for entry from kernel mode - .section .trap.kernel,"ax" - .balign 256*16 - .globl __entry_kerneltrap_table -__entry_kerneltrap_table: - - # exception handler jump table - .section .trap.vector,"ax" - .balign 256*4 - .globl __entry_vector_table -__entry_vector_table: - - # trap fixup table for single-stepping in user mode - .section .trap.fixup.user,"a" - .balign 256*4 - .globl __break_usertrap_fixup_table -__break_usertrap_fixup_table: - - # trap fixup table for single-stepping in user mode - .section .trap.fixup.kernel,"a" - .balign 256*4 - .globl __break_kerneltrap_fixup_table -__break_kerneltrap_fixup_table: - - # handler declaration for a software or program interrupt -.macro VECTOR_SOFTPROG tbr_tt, vec - .section .trap.user - .org \tbr_tt - bra __entry_uspace_softprog_interrupt - .section .trap.fixup.user - .org \tbr_tt >> 2 - .long __break_step_uspace_softprog_interrupt - .section .trap.kernel - .org \tbr_tt - bra __entry_kernel_softprog_interrupt - .section .trap.fixup.kernel - .org \tbr_tt >> 2 - .long __break_step_kernel_softprog_interrupt - .section .trap.vector - .org \tbr_tt >> 2 - .long \vec -.endm - - # handler declaration for a maskable external interrupt -.macro VECTOR_IRQ tbr_tt, vec - .section .trap.user - .org \tbr_tt - bra __entry_uspace_external_interrupt - .section .trap.fixup.user - .org \tbr_tt >> 2 - .long __break_step_uspace_external_interrupt - .section .trap.kernel - .org \tbr_tt - # deal with virtual interrupt disablement - beq icc2,#0,__entry_kernel_external_interrupt_virtually_disabled - bra __entry_kernel_external_interrupt - .section .trap.fixup.kernel - .org \tbr_tt >> 2 - .long __break_step_kernel_external_interrupt - .section .trap.vector - .org \tbr_tt >> 2 - .long \vec -.endm - - # handler declaration for an NMI external interrupt -.macro VECTOR_NMI tbr_tt, vec - .section .trap.user - .org \tbr_tt - break - break - break - break - .section .trap.kernel - .org \tbr_tt - break - break - break - break - .section .trap.vector - .org \tbr_tt >> 2 - .long \vec -.endm - - # handler declaration for an MMU only software or program interrupt -.macro VECTOR_SP_MMU tbr_tt, vec -#ifdef CONFIG_MMU - VECTOR_SOFTPROG \tbr_tt, \vec -#else - VECTOR_NMI \tbr_tt, 0 -#endif -.endm - - -############################################################################### -# -# specification of the vectors -# - note: each macro inserts code into multiple sections -# -############################################################################### - VECTOR_SP_MMU TBR_TT_INSTR_MMU_MISS, __entry_insn_mmu_miss - VECTOR_SOFTPROG TBR_TT_INSTR_ACC_ERROR, __entry_insn_access_error - VECTOR_SOFTPROG TBR_TT_INSTR_ACC_EXCEP, __entry_insn_access_exception - VECTOR_SOFTPROG TBR_TT_PRIV_INSTR, __entry_privileged_instruction - VECTOR_SOFTPROG TBR_TT_ILLEGAL_INSTR, __entry_illegal_instruction - VECTOR_SOFTPROG TBR_TT_FP_EXCEPTION, __entry_media_exception - VECTOR_SOFTPROG TBR_TT_MP_EXCEPTION, __entry_media_exception - VECTOR_SOFTPROG TBR_TT_DATA_ACC_ERROR, __entry_data_access_error - VECTOR_SP_MMU TBR_TT_DATA_MMU_MISS, __entry_data_mmu_miss - VECTOR_SOFTPROG TBR_TT_DATA_ACC_EXCEP, __entry_data_access_exception - VECTOR_SOFTPROG TBR_TT_DATA_STR_ERROR, __entry_data_store_error - VECTOR_SOFTPROG TBR_TT_DIVISION_EXCEP, __entry_division_exception - -#ifdef CONFIG_MMU - .section .trap.user - .org TBR_TT_INSTR_TLB_MISS - .globl __trap_user_insn_tlb_miss -__trap_user_insn_tlb_miss: - movsg ear0,gr28 /* faulting address */ - movsg scr0,gr31 /* get mapped PTD coverage start address */ - xor.p gr28,gr31,gr31 /* compare addresses */ - bra __entry_user_insn_tlb_miss - - .org TBR_TT_DATA_TLB_MISS - .globl __trap_user_data_tlb_miss -__trap_user_data_tlb_miss: - movsg ear0,gr28 /* faulting address */ - movsg scr1,gr31 /* get mapped PTD coverage start address */ - xor.p gr28,gr31,gr31 /* compare addresses */ - bra __entry_user_data_tlb_miss - - .section .trap.kernel - .org TBR_TT_INSTR_TLB_MISS - .globl __trap_kernel_insn_tlb_miss -__trap_kernel_insn_tlb_miss: - movsg ear0,gr29 /* faulting address */ - movsg scr0,gr31 /* get mapped PTD coverage start address */ - xor.p gr29,gr31,gr31 /* compare addresses */ - bra __entry_kernel_insn_tlb_miss - - .org TBR_TT_DATA_TLB_MISS - .globl __trap_kernel_data_tlb_miss -__trap_kernel_data_tlb_miss: - movsg ear0,gr29 /* faulting address */ - movsg scr1,gr31 /* get mapped PTD coverage start address */ - xor.p gr29,gr31,gr31 /* compare addresses */ - bra __entry_kernel_data_tlb_miss - - .section .trap.fixup.user - .org TBR_TT_INSTR_TLB_MISS >> 2 - .globl __trap_fixup_user_insn_tlb_miss -__trap_fixup_user_insn_tlb_miss: - .long __break_user_insn_tlb_miss - .org TBR_TT_DATA_TLB_MISS >> 2 - .globl __trap_fixup_user_data_tlb_miss -__trap_fixup_user_data_tlb_miss: - .long __break_user_data_tlb_miss - - .section .trap.fixup.kernel - .org TBR_TT_INSTR_TLB_MISS >> 2 - .globl __trap_fixup_kernel_insn_tlb_miss -__trap_fixup_kernel_insn_tlb_miss: - .long __break_kernel_insn_tlb_miss - .org TBR_TT_DATA_TLB_MISS >> 2 - .globl __trap_fixup_kernel_data_tlb_miss -__trap_fixup_kernel_data_tlb_miss: - .long __break_kernel_data_tlb_miss - - .section .trap.vector - .org TBR_TT_INSTR_TLB_MISS >> 2 - .long __entry_insn_mmu_fault - .org TBR_TT_DATA_TLB_MISS >> 2 - .long __entry_data_mmu_fault -#endif - - VECTOR_SP_MMU TBR_TT_DATA_DAT_EXCEP, __entry_data_dat_fault - VECTOR_NMI TBR_TT_DECREMENT_TIMER, __entry_do_NMI - VECTOR_SOFTPROG TBR_TT_COMPOUND_EXCEP, __entry_compound_exception - VECTOR_IRQ TBR_TT_INTERRUPT_1, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_2, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_3, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_4, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_5, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_6, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_7, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_8, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_9, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_10, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_11, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_12, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_13, __entry_do_IRQ - VECTOR_IRQ TBR_TT_INTERRUPT_14, __entry_do_IRQ - VECTOR_NMI TBR_TT_INTERRUPT_15, __entry_do_NMI - - # miscellaneous user mode entry points - .section .trap.user - .org TBR_TT_TRAP0 - .rept 127 - bra __entry_uspace_softprog_interrupt - .long 0,0,0 - .endr - .org TBR_TT_BREAK - bra __entry_break - .long 0,0,0 - - .section .trap.fixup.user - .org TBR_TT_TRAP0 >> 2 - .rept 127 - .long __break_step_uspace_softprog_interrupt - .endr - .org TBR_TT_BREAK >> 2 - .long 0 - - # miscellaneous kernel mode entry points - .section .trap.kernel - .org TBR_TT_TRAP0 - bra __entry_kernel_softprog_interrupt - .org TBR_TT_TRAP1 - bra __entry_kernel_softprog_interrupt - - # trap #2 in kernel - reenable interrupts - .org TBR_TT_TRAP2 - bra __entry_kernel_external_interrupt_virtual_reenable - - # miscellaneous kernel traps - .org TBR_TT_TRAP3 - .rept 124 - bra __entry_kernel_softprog_interrupt - .long 0,0,0 - .endr - .org TBR_TT_BREAK - bra __entry_break - .long 0,0,0 - - .section .trap.fixup.kernel - .org TBR_TT_TRAP0 >> 2 - .long __break_step_kernel_softprog_interrupt - .long __break_step_kernel_softprog_interrupt - .long __break_step_kernel_external_interrupt_virtual_reenable - .rept 124 - .long __break_step_kernel_softprog_interrupt - .endr - .org TBR_TT_BREAK >> 2 - .long 0 - - # miscellaneous debug mode entry points - .section .trap.break - .org TBR_TT_BREAK - movsg bpcsr,gr30 - jmpl @(gr30,gr0) - - # miscellaneous vectors - .section .trap.vector - .org TBR_TT_TRAP0 >> 2 - .long system_call - .rept 119 - .long __entry_unsupported_trap - .endr - - #