From 1e924e2f1e073684b845c95886183bac6a992fb0 Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Fri, 19 Mar 2010 08:01:27 +0000 Subject: Blackfin: SMP: flush CoreB cache when shutting down When CoreB wakes up, it needs to read variables that CoreA might have modified, and might be in CoreB's cache. So kill CoreB's cache before going to sleep so that when we wake up, we are in a coherent state. Signed-off-by: Graf Yang Signed-off-by: Mike Frysinger --- arch/blackfin/mach-bf561/hotplug.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-bf561/hotplug.c b/arch/blackfin/mach-bf561/hotplug.c index 42fc085629c7..0123117b8ff2 100644 --- a/arch/blackfin/mach-bf561/hotplug.c +++ b/arch/blackfin/mach-bf561/hotplug.c @@ -7,6 +7,7 @@ #include #include +#include #include int hotplug_coreb; @@ -14,8 +15,16 @@ int hotplug_coreb; void platform_cpu_die(void) { unsigned long iwr; + hotplug_coreb = 1; + /* + * When CoreB wakes up, the code in _coreb_trampoline_start cannot + * turn off the data cache. This causes the CoreB failed to boot. + * As a workaround, we invalidate all the data cache before sleep. + */ + blackfin_invalidate_entire_dcache(); + /* disable core timer */ bfin_write_TCNTL(0); -- cgit v1.2.3