From d784e2988a3e70a6f1047e80e01465a903ea2eba Mon Sep 17 00:00:00 2001 From: Punit Agrawal Date: Tue, 18 Nov 2014 11:41:27 +0000 Subject: arm64: Trace emulation of AArch32 legacy instructions Introduce an event to trace the usage of emulated instructions. The trace event is intended to help identify and encourage the migration of legacy software using the emulation features. Use this event to trace usage of swp and CP15 barrier emulation. Acked-by: Steven Rostedt Acked-by: Catalin Marinas Signed-off-by: Punit Agrawal Signed-off-by: Will Deacon --- arch/arm64/kernel/armv8_deprecated.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) (limited to 'arch/arm64/kernel/armv8_deprecated.c') diff --git a/arch/arm64/kernel/armv8_deprecated.c b/arch/arm64/kernel/armv8_deprecated.c index 401c2e544ede..529aad93336f 100644 --- a/arch/arm64/kernel/armv8_deprecated.c +++ b/arch/arm64/kernel/armv8_deprecated.c @@ -20,6 +20,9 @@ #include #include +#define CREATE_TRACE_POINTS +#include "trace-events-emulation.h" + /* * The runtime support for deprecated instruction support can be in one of * following three states - @@ -358,6 +361,11 @@ static int swp_handler(struct pt_regs *regs, u32 instr) regs->user_regs.regs[destreg] = data; ret: + if (type == TYPE_SWPB) + trace_instruction_emulation("swpb", regs->pc); + else + trace_instruction_emulation("swp", regs->pc); + pr_warn_ratelimited("\"%s\" (%ld) uses obsolete SWP{B} instruction at 0x%llx\n", current->comm, (unsigned long)current->pid, regs->pc); @@ -415,10 +423,15 @@ static int cp15barrier_handler(struct pt_regs *regs, u32 instr) * dmb - mcr p15, 0, Rt, c7, c10, 5 * dsb - mcr p15, 0, Rt, c7, c10, 4 */ - if (aarch32_insn_mcr_extract_opc2(instr) == 5) + if (aarch32_insn_mcr_extract_opc2(instr) == 5) { dmb(sy); - else + trace_instruction_emulation( + "mcr p15, 0, Rt, c7, c10, 5 ; dmb", regs->pc); + } else { dsb(sy); + trace_instruction_emulation( + "mcr p15, 0, Rt, c7, c10, 4 ; dsb", regs->pc); + } break; case 5: /* @@ -427,6 +440,8 @@ static int cp15barrier_handler(struct pt_regs *regs, u32 instr) * Taking an exception or returning from one acts as an * instruction barrier. So no explicit barrier needed here. */ + trace_instruction_emulation( + "mcr p15, 0, Rt, c7, c5, 4 ; isb", regs->pc); break; } -- cgit v1.2.3