From f977ec94f7f2d1211305ac0c79b8e79155c236ef Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 20 Nov 2012 06:39:09 +0000 Subject: ARM: shmobile: Remove duplicate inclusion of dma-mapping.h in setup-r8a7740.c linux/dma-mapping.h was included twice. Signed-off-by: Sachin Kamat Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7740.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 03c69f9979aa..9ef397d41158 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.3 From e67d7afc567437246ec425f1989ea38b372571df Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 12 Dec 2012 02:08:09 -0800 Subject: ARM: shmobile: r8a7740: add TMU timer support This patch enabled TMU0 timer on r8a7740. But TMU1 timer is not supported yet Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7740.c | 6 ++- arch/arm/mach-shmobile/setup-r8a7740.c | 94 ++++++++++++++++++++++++++++++++++ 2 files changed, 99 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index eac49d59782f..19ce885a3b43 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -581,10 +581,14 @@ static struct clk_lookup lookups[] = { /* MSTP32 clocks */ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), - CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP111]), + CLKDEV_DEV_ID("sh_tmu.3", &mstp_clks[MSTP111]), + CLKDEV_DEV_ID("sh_tmu.4", &mstp_clks[MSTP111]), + CLKDEV_DEV_ID("sh_tmu.5", &mstp_clks[MSTP111]), CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), + CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), + CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP125]), CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]), diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 9ef397d41158..847567d55487 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -261,6 +261,97 @@ static struct platform_device cmt10_device = { .num_resources = ARRAY_SIZE(cmt10_resources), }; +/* TMU */ +static struct sh_timer_config tmu00_platform_data = { + .name = "TMU00", + .channel_offset = 0x4, + .timer_bit = 0, + .clockevent_rating = 200, +}; + +static struct resource tmu00_resources[] = { + [0] = { + .name = "TMU00", + .start = 0xfff80008, + .end = 0xfff80014 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = intcs_evt2irq(0xe80), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu00_device = { + .name = "sh_tmu", + .id = 0, + .dev = { + .platform_data = &tmu00_platform_data, + }, + .resource = tmu00_resources, + .num_resources = ARRAY_SIZE(tmu00_resources), +}; + +static struct sh_timer_config tmu01_platform_data = { + .name = "TMU01", + .channel_offset = 0x10, + .timer_bit = 1, + .clocksource_rating = 200, +}; + +static struct resource tmu01_resources[] = { + [0] = { + .name = "TMU01", + .start = 0xfff80014, + .end = 0xfff80020 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = intcs_evt2irq(0xea0), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu01_device = { + .name = "sh_tmu", + .id = 1, + .dev = { + .platform_data = &tmu01_platform_data, + }, + .resource = tmu01_resources, + .num_resources = ARRAY_SIZE(tmu01_resources), +}; + +static struct sh_timer_config tmu02_platform_data = { + .name = "TMU02", + .channel_offset = 0x1C, + .timer_bit = 2, + .clocksource_rating = 200, +}; + +static struct resource tmu02_resources[] = { + [0] = { + .name = "TMU02", + .start = 0xfff80020, + .end = 0xfff8002C - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = intcs_evt2irq(0xec0), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu02_device = { + .name = "sh_tmu", + .id = 2, + .dev = { + .platform_data = &tmu02_platform_data, + }, + .resource = tmu02_resources, + .num_resources = ARRAY_SIZE(tmu02_resources), +}; + static struct platform_device *r8a7740_early_devices[] __initdata = { &scif0_device, &scif1_device, @@ -272,6 +363,9 @@ static struct platform_device *r8a7740_early_devices[] __initdata = { &scif7_device, &scifb_device, &cmt10_device, + &tmu00_device, + &tmu01_device, + &tmu02_device, }; /* DMA */ -- cgit v1.2.3 From bf519bfb66019c06fc44413a90715f3f5b1d7e9f Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Tue, 4 Dec 2012 17:43:29 -0800 Subject: ARM: shmobile: sh73a0: fixup div4_clks bitmap div4_clks's bitmap of sh73a0 was wrong. This patch is based on v2.0 datasheet. Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-sh73a0.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 516ff7f3e434..5f57701da16e 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -264,17 +264,17 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2, SH_CLK_DIV4(&pll1_clk, _reg, _bit, _mask, _flags) static struct clk div4_clks[DIV4_NR] = { - [DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT), - [DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT), - [DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT), - [DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT), - [DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0), - [DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0), - [DIV4_Z] = DIV4(FRQCRB, 24, 0xbff, 0), - [DIV4_ZTR] = DIV4(FRQCRB, 20, 0xfff, 0), - [DIV4_ZT] = DIV4(FRQCRB, 16, 0xfff, 0), - [DIV4_ZX] = DIV4(FRQCRB, 12, 0xfff, 0), - [DIV4_HP] = DIV4(FRQCRB, 4, 0xfff, 0), + [DIV4_I] = DIV4(FRQCRA, 20, 0xdff, CLK_ENABLE_ON_INIT), + [DIV4_ZG] = DIV4(FRQCRA, 16, 0xd7f, CLK_ENABLE_ON_INIT), + [DIV4_M3] = DIV4(FRQCRA, 12, 0x1dff, CLK_ENABLE_ON_INIT), + [DIV4_B] = DIV4(FRQCRA, 8, 0xdff, CLK_ENABLE_ON_INIT), + [DIV4_M1] = DIV4(FRQCRA, 4, 0x1dff, 0), + [DIV4_M2] = DIV4(FRQCRA, 0, 0x1dff, 0), + [DIV4_Z] = DIV4(FRQCRB, 24, 0x97f, 0), + [DIV4_ZTR] = DIV4(FRQCRB, 20, 0xdff, 0), + [DIV4_ZT] = DIV4(FRQCRB, 16, 0xdff, 0), + [DIV4_ZX] = DIV4(FRQCRB, 12, 0xdff, 0), + [DIV4_HP] = DIV4(FRQCRB, 4, 0xdff, 0), }; enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1, -- cgit v1.2.3 From 6333ae1432039003c4d9c76f0ecec41bb982898a Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 14 Dec 2012 12:43:12 +0900 Subject: ARM: mach-shmobile: sh73a0 external IRQ wake update Use sh73a0_set_wake() for external IRQ signals on sh73a0. The sh73a0 IRQ hardware for external IRQ pins consists of the INTCA interrupt controller and the GIC together doing their best to limp along. These external IRQ pins are treated as a special case where interrupts need to be managed in both interrupt controllers in parallel. The ->irq_set_wake() callback for the external IRQ pins can be dealt with in the same way as INTCA-only without involving the GIC. So this patch updates the external IRQ pin code for sh73a0 to no longer involve the GIC. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/intc-sh73a0.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c index 978369973be4..45973b59dd58 100644 --- a/arch/arm/mach-shmobile/intc-sh73a0.c +++ b/arch/arm/mach-shmobile/intc-sh73a0.c @@ -315,11 +315,6 @@ static int intca_gic_set_type(struct irq_data *data, unsigned int type) return irq_cbp(irq_set_type, to_intca_reloc_irq(data), type); } -static int intca_gic_set_wake(struct irq_data *data, unsigned int on) -{ - return irq_cbp(irq_set_wake, to_intca_reloc_irq(data), on); -} - #ifdef CONFIG_SMP static int intca_gic_set_affinity(struct irq_data *data, const struct cpumask *cpumask, @@ -339,7 +334,7 @@ struct irq_chip intca_gic_irq_chip = { .irq_disable = intca_gic_disable, .irq_shutdown = intca_gic_disable, .irq_set_type = intca_gic_set_type, - .irq_set_wake = intca_gic_set_wake, + .irq_set_wake = sh73a0_set_wake, #ifdef CONFIG_SMP .irq_set_affinity = intca_gic_set_affinity, #endif -- cgit v1.2.3 From 529a7b323507c1aa0873066d84487b1ca7c28af5 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Fri, 14 Dec 2012 17:45:28 +0100 Subject: ARM: sh7372: add clock lookup entries for DT-based devices When booting with DT, devices are named differently. To get their clocks additional entries have to be added to the lookup table. Signed-off-by: Guennadi Liakhovetski Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-sh7372.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index 3ca6757b129a..45d21fe317f4 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c @@ -544,6 +544,7 @@ static struct clk_lookup lookups[] = { /* MSTP32 clocks */ CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */ + CLKDEV_DEV_ID("fff30000.i2c", &mstp_clks[MSTP001]), /* IIC2 */ CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */ CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */ CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ @@ -556,6 +557,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */ CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ + CLKDEV_DEV_ID("fff20000.i2c", &mstp_clks[MSTP116]), /* IIC0 */ CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[MSTP113]), /* MERAM */ CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */ CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */ @@ -577,18 +579,25 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ + CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]), /* IIC1 */ CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */ CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */ CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP322]), /* USB0 */ CLKDEV_DEV_ID("sh_flctl.0", &mstp_clks[MSTP315]), /* FLCTL */ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ + CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ + CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */ CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ + CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMC */ CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */ + CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]), /* SDHI2 */ CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */ CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */ + CLKDEV_DEV_ID("e6d20000.i2c", &mstp_clks[MSTP411]), /* IIC3 */ CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */ + CLKDEV_DEV_ID("e6d30000.i2c", &mstp_clks[MSTP410]), /* IIC4 */ CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */ CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */ CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */ -- cgit v1.2.3 From 9916152438a99b15c009e26f0f9cb38efba086d3 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Fri, 28 Dec 2012 12:32:54 +0100 Subject: ARM: sh7372: fix cache clean / invalidate order According to the Cortex A8 TRM the L2 cache should be first cleaned and then disabled. Fix the swapped order on sh7372. Signed-off-by: Guennadi Liakhovetski Reviewed-by: Santosh Shilimkar Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/sleep-sh7372.S | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S index 1d564674451d..a9df53b69ab8 100644 --- a/arch/arm/mach-shmobile/sleep-sh7372.S +++ b/arch/arm/mach-shmobile/sleep-sh7372.S @@ -59,16 +59,18 @@ sh7372_do_idle_sysc: mcr p15, 0, r0, c1, c0, 0 isb + /* + * Clean and invalidate data cache again. + */ + ldr r1, kernel_flush + blx r1 + /* disable L2 cache in the aux control register */ mrc p15, 0, r10, c1, c0, 1 bic r10, r10, #2 mcr p15, 0, r10, c1, c0, 1 + isb - /* - * Invalidate data cache again. - */ - ldr r1, kernel_flush - blx r1 /* * The kernel doesn't interwork: v7_flush_dcache_all in particluar will * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled. -- cgit v1.2.3 From 8a21cdaee85e28489a6fe606b8eb0fef32ebf635 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Mon, 31 Dec 2012 11:23:50 +0000 Subject: ARM: shmobile: add function declarations for sh7372 DT helper functions sh7372_add_early_devices_dt() and sh7372_add_standard_devices_dt() are defined as global functions in arch/arm/mach-shmobile/setup-sh7372.c, but their declarations are missing. Add them to common.h, where similar functions for this and other SoC types are already declared. Signed-off-by: Guennadi Liakhovetski Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/include/mach/common.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index a57439eec11a..2d1686becdd5 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -23,6 +23,8 @@ extern void sh7372_map_io(void); extern void sh7372_earlytimer_init(void); extern void sh7372_add_early_devices(void); extern void sh7372_add_standard_devices(void); +extern void sh7372_add_early_devices_dt(void); +extern void sh7372_add_standard_devices_dt(void); extern void sh7372_clock_init(void); extern void sh7372_pinmux_init(void); extern void sh7372_pm_init(void); -- cgit v1.2.3 From 13baf88bd69ed3cf7e2374eec4a7128f62ae9c1f Mon Sep 17 00:00:00 2001 From: Bastian Hecht Date: Wed, 5 Dec 2012 12:13:06 +0000 Subject: ARM: shmobile: sh73a0: Add CPU sleep suspend Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As just clocks are stopped there is no need to save or restore any state of the system. Signed-off-by: Bastian Hecht Acked-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 1 + arch/arm/mach-shmobile/board-kzm9g.c | 2 ++ arch/arm/mach-shmobile/include/mach/common.h | 1 + arch/arm/mach-shmobile/pm-sh73a0.c | 32 ++++++++++++++++++++++++++++ 4 files changed, 36 insertions(+) create mode 100644 arch/arm/mach-shmobile/pm-sh73a0.c (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 0b7147928aa3..f6aba6d61d89 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o +obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o # Board objects obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c index ac9428530d7b..363c6edfa3cd 100644 --- a/arch/arm/mach-shmobile/board-kzm9g.c +++ b/arch/arm/mach-shmobile/board-kzm9g.c @@ -772,6 +772,8 @@ static void __init kzm_init(void) sh73a0_add_standard_devices(); platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices)); + + sh73a0_pm_init(); } static void kzm9g_restart(char mode, const char *cmd) diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 2d1686becdd5..f221c116e968 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -40,6 +40,7 @@ extern void sh73a0_add_early_devices(void); extern void sh73a0_add_standard_devices(void); extern void sh73a0_clock_init(void); extern void sh73a0_pinmux_init(void); +extern void sh73a0_pm_init(void); extern struct clk sh73a0_extal1_clk; extern struct clk sh73a0_extal2_clk; extern struct clk sh73a0_extcki_clk; diff --git a/arch/arm/mach-shmobile/pm-sh73a0.c b/arch/arm/mach-shmobile/pm-sh73a0.c new file mode 100644 index 000000000000..99086e98fbbc --- /dev/null +++ b/arch/arm/mach-shmobile/pm-sh73a0.c @@ -0,0 +1,32 @@ +/* + * sh73a0 Power management support + * + * Copyright (C) 2012 Bastian Hecht + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include + +#ifdef CONFIG_SUSPEND +static int sh73a0_enter_suspend(suspend_state_t suspend_state) +{ + cpu_do_idle(); + return 0; +} + +static void sh73a0_suspend_init(void) +{ + shmobile_suspend_ops.enter = sh73a0_enter_suspend; +} +#else +static void sh73a0_suspend_init(void) {} +#endif + +void __init sh73a0_pm_init(void) +{ + sh73a0_suspend_init(); +} -- cgit v1.2.3 From 895d3b53fd910f78c52cba89243107fb132538f3 Mon Sep 17 00:00:00 2001 From: Bastian Hecht Date: Wed, 5 Dec 2012 12:13:07 +0000 Subject: ARM: shmobile: r8a7740: Add CPU sleep suspend Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As just clocks are stopped there is no need to save or restore any state of the system. Signed-off-by: Bastian Hecht Acked-by: Magnus Damm [ horms@verge.net.au: Added missing includes ] Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-armadillo800eva.c | 2 ++ arch/arm/mach-shmobile/include/mach/common.h | 1 + arch/arm/mach-shmobile/pm-r8a7740.c | 22 ++++++++++++++++++++++ 3 files changed, 25 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index e7912447ad50..65731370da81 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -1181,6 +1181,8 @@ static void __init eva_init(void) rmobile_add_device_to_domain("A4LC", &hdmi_lcdc_device); if (usb) rmobile_add_device_to_domain("A3SP", usb); + + r8a7740_pm_init(); } static void __init eva_earlytimer_init(void) diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index f221c116e968..c0ab595bc18f 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -52,6 +52,7 @@ extern void r8a7740_add_early_devices(void); extern void r8a7740_add_standard_devices(void); extern void r8a7740_clock_init(u8 md_ck); extern void r8a7740_pinmux_init(void); +extern void r8a7740_pm_init(void); extern void r8a7779_init_irq(void); extern void r8a7779_map_io(void); diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c index 21e5316d2d88..40b87aa1d448 100644 --- a/arch/arm/mach-shmobile/pm-r8a7740.c +++ b/arch/arm/mach-shmobile/pm-r8a7740.c @@ -9,7 +9,9 @@ * for more details. */ #include +#include #include +#include #ifdef CONFIG_PM static int r8a7740_pd_a4s_suspend(void) @@ -58,3 +60,23 @@ void __init r8a7740_init_pm_domains(void) } #endif /* CONFIG_PM */ + +#ifdef CONFIG_SUSPEND +static int r8a7740_enter_suspend(suspend_state_t suspend_state) +{ + cpu_do_idle(); + return 0; +} + +static void r8a7740_suspend_init(void) +{ + shmobile_suspend_ops.enter = r8a7740_enter_suspend; +} +#else +static void r8a7740_suspend_init(void) {} +#endif + +void __init r8a7740_pm_init(void) +{ + r8a7740_suspend_init(); +} -- cgit v1.2.3 From 33419a69a56436dda8e9187cf09ff0bde74d8a01 Mon Sep 17 00:00:00 2001 From: Bastian Hecht Date: Wed, 9 Jan 2013 19:41:51 +0000 Subject: ARM: SH-Mobile: sh73a0: Secondary CPUs handle own SCU flags When booting secondary CPUs we have used the main CPU to set up the Snoop Control Unit flags of these CPUs. It is a cleaner approach if every CPU takes care of its own flags. We avoid the need for locking and the program logic is more concise. With this patch the file headsmp-sh73a0.S is added that contains a startup vector for secondary CPUs that sets up its own SCU flags. Further in sh73a0_smp_prepare_cpus() we can rely on the generic ARM helper scu_power_mode(). This is possible as we don't cross borders anymore (every CPU handles its own flags) and need no locking. So we can throw out the needless function modify_scu_cpu_psr(). Signed-off-by: Bastian Hecht Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 2 +- arch/arm/mach-shmobile/headsmp-sh73a0.S | 50 ++++++++++++++++++++++++++++ arch/arm/mach-shmobile/include/mach/common.h | 1 + arch/arm/mach-shmobile/smp-sh73a0.c | 30 +++-------------- 4 files changed, 56 insertions(+), 27 deletions(-) create mode 100644 arch/arm/mach-shmobile/headsmp-sh73a0.S (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index f6aba6d61d89..700e6623aa86 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o # SMP objects smp-y := platsmp.o headsmp.o smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o -smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o +smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-sh73a0.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o diff --git a/arch/arm/mach-shmobile/headsmp-sh73a0.S b/arch/arm/mach-shmobile/headsmp-sh73a0.S new file mode 100644 index 000000000000..bec4c0d9b713 --- /dev/null +++ b/arch/arm/mach-shmobile/headsmp-sh73a0.S @@ -0,0 +1,50 @@ +/* + * SMP support for SoC sh73a0 + * + * Copyright (C) 2012 Bastian Hecht + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + + __CPUINIT +/* + * Reset vector for secondary CPUs. + * + * First we turn on L1 cache coherency for our CPU. Then we jump to + * shmobile_invalidate_start that invalidates the cache and hands over control + * to the common ARM startup code. + * This function will be mapped to address 0 by the SBAR register. + * A normal branch is out of range here so we need a long jump. We jump to + * the physical address as the MMU is still turned off. + */ + .align 12 +ENTRY(sh73a0_secondary_vector) + mrc p15, 0, r0, c0, c0, 5 @ read MIPDR + and r0, r0, #3 @ mask out cpu ID + lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits + mov r1, #0xf0000000 @ SCU base address + ldr r2, [r1, #8] @ SCU Power Status Register + mov r3, #3 + bic r2, r2, r3, lsl r0 @ Clear bits of our CPU (Run Mode) + str r2, [r1, #8] @ write back + + ldr pc, 1f +1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET +ENDPROC(sh73a0_secondary_vector) diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index c0ab595bc18f..4b1af936fae9 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -41,6 +41,7 @@ extern void sh73a0_add_standard_devices(void); extern void sh73a0_clock_init(void); extern void sh73a0_pinmux_init(void); extern void sh73a0_pm_init(void); +extern void sh73a0_secondary_vector(void); extern struct clk sh73a0_extal1_clk; extern struct clk sh73a0_extal2_clk; extern struct clk sh73a0_extcki_clk; diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 5c5bcb595350..430b44ea85f2 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -41,9 +41,6 @@ static void __iomem *scu_base_addr(void) return (void __iomem *)0xf0000000; } -static DEFINE_SPINLOCK(scu_lock); -static unsigned long tmp; - #ifdef CONFIG_HAVE_ARM_TWD static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); void __init sh73a0_register_twd(void) @@ -52,20 +49,6 @@ void __init sh73a0_register_twd(void) } #endif -static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) -{ - void __iomem *scu_base = scu_base_addr(); - - spin_lock(&scu_lock); - tmp = __raw_readl(scu_base + 8); - tmp &= ~clr; - tmp |= set; - spin_unlock(&scu_lock); - - /* disable cache coherency after releasing the lock */ - __raw_writel(tmp, scu_base + 8); -} - static unsigned int __init sh73a0_get_core_count(void) { void __iomem *scu_base = scu_base_addr(); @@ -82,9 +65,6 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct { cpu = cpu_logical_map(cpu); - /* enable cache coherency */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); - if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3) __raw_writel(1 << cpu, WUPCR); /* wake up */ else @@ -95,16 +75,14 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) { - int cpu = cpu_logical_map(0); - scu_enable(scu_base_addr()); - /* Map the reset vector (in headsmp.S) */ + /* Map the reset vector (in headsmp-sh73a0.S) */ __raw_writel(0, APARMBAREA); /* 4k */ - __raw_writel(__pa(shmobile_secondary_vector), SBAR); + __raw_writel(__pa(sh73a0_secondary_vector), SBAR); - /* enable cache coherency on CPU0 */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); + /* enable cache coherency on booting CPU */ + scu_power_mode(scu_base_addr(), SCU_PM_NORMAL); } static void __init sh73a0_smp_init_cpus(void) -- cgit v1.2.3 From 20aa11358d52e1a3fc037d601ffe704e6f55c5fb Mon Sep 17 00:00:00 2001 From: Bastian Hecht Date: Wed, 9 Jan 2013 19:41:52 +0000 Subject: ARM: SH-Mobile: sh73a0: Add CPU Hotplug Add the capability to add and remove CPUs on the fly. The Cortex-A9 offers the possibility to take single cores out of the MP Core. We add this capabilty taking care that caches are kept coherent. For verifying the shutdown we rely on the internal SH73A0 Power Status Register PSTR. Signed-off-by: Bastian Hecht Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-sh73a0.c | 36 ++++++++++++++++++++++++++++++------ 1 file changed, 30 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 430b44ea85f2..9812ea3255c9 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -36,6 +37,8 @@ #define SBAR IOMEM(0xe6180020) #define APARMBAREA IOMEM(0xe6f10020) +#define PSTR_SHUTDOWN_MODE 3 + static void __iomem *scu_base_addr(void) { return (void __iomem *)0xf0000000; @@ -92,16 +95,20 @@ static void __init sh73a0_smp_init_cpus(void) shmobile_smp_init_cpus(ncores); } -static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu) +#ifdef CONFIG_HOTPLUG_CPU +static int sh73a0_cpu_kill(unsigned int cpu) { + int k; + u32 pstr; - /* this function is running on another CPU than the offline target, - * here we need wait for shutdown code in platform_cpu_die() to - * finish before asking SoC-specific code to power off the CPU core. + /* + * wait until the power status register confirms the shutdown of the + * offline target */ for (k = 0; k < 1000; k++) { - if (shmobile_cpu_is_dead(cpu)) + pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3; + if (pstr == PSTR_SHUTDOWN_MODE) return 1; mdelay(1); @@ -110,6 +117,23 @@ static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu) return 0; } +static void sh73a0_cpu_die(unsigned int cpu) +{ + /* + * The ARM MPcore does not issue a cache coherency request for the L1 + * cache when powering off single CPUs. We must take care of this and + * further caches. + */ + dsb(); + flush_cache_all(); + + /* Set power off mode. This takes the CPU out of the MP cluster */ + scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF); + + /* Enter shutdown mode */ + cpu_do_idle(); +} +#endif /* CONFIG_HOTPLUG_CPU */ struct smp_operations sh73a0_smp_ops __initdata = { .smp_init_cpus = sh73a0_smp_init_cpus, @@ -118,7 +142,7 @@ struct smp_operations sh73a0_smp_ops __initdata = { .smp_boot_secondary = sh73a0_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = sh73a0_cpu_kill, - .cpu_die = shmobile_cpu_die, + .cpu_die = sh73a0_cpu_die, .cpu_disable = shmobile_cpu_disable, #endif }; -- cgit v1.2.3 From a3f22db5102238197d5f6bbcad2f720ec7f09e10 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 21 Nov 2012 21:12:43 +0900 Subject: ARM: mach-shmobile: sh73a0: Allow initialisation of GIC by DT This allows the GIC interrupt controller of the sh73a0 SoC to be initialised using a flattened device tree blob. It does not allow the INTC interrupt controller which is also present on the sh73a0 SoC to be enabled via device tree. Nor does it handle sharing of interrupts between the GIC and INTC interrupt controllers. This limits the usefulness of this code to applications which only wish to access devices which use interrupts that can be handled by the GIC interrupt controller. Other applications should, for now, continue using non-device tree initialisation of the sh72a0 interrupt controllers. Includes update to use irqchip_init() by Thierry Reding Cc: Thierry Reding Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/include/mach/common.h | 1 + arch/arm/mach-shmobile/intc-sh73a0.c | 9 +++++++++ 2 files changed, 10 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 4b1af936fae9..e2ba16b6ae8e 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -34,6 +34,7 @@ extern struct clk sh7372_extal1_clk; extern struct clk sh7372_extal2_clk; extern void sh73a0_init_irq(void); +extern void sh73a0_init_irq_dt(void); extern void sh73a0_map_io(void); extern void sh73a0_earlytimer_init(void); extern void sh73a0_add_early_devices(void); diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c index 45973b59dd58..91faba666d46 100644 --- a/arch/arm/mach-shmobile/intc-sh73a0.c +++ b/arch/arm/mach-shmobile/intc-sh73a0.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -459,3 +460,11 @@ void __init sh73a0_init_irq(void) sh73a0_pint1_cascade.handler = sh73a0_pint1_demux; setup_irq(gic_spi(34), &sh73a0_pint1_cascade); } + +#ifdef CONFIG_OF +void __init sh73a0_init_irq_dt(void) +{ + irqchip_init(); + gic_arch_extn.irq_set_wake = sh73a0_set_wake; +} +#endif -- cgit v1.2.3 From 486095331af0ab4582879aa1421757f51a92d4e7 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 21 Nov 2012 22:00:15 +0900 Subject: ARM: mach-shmobile: sh73a0: Minimal setup using DT Allow a minimal setup of the sh73a0 SoC using a flattened device tree. In particular, Configure the i2c controllers using a flattened device tree. SCI serial controller and CMT clock source, whose drivers do not yet support configuration using a flattened device tree, are still configured using C code in order to allow booting of a board with this SoC. *** Please note that the clock initialisation scheme used in this patch does not currently work with SMP as there is a yet to be resolved lock-up in workqueue initialisation. CONFIG_SMP must be disabled when using this code. *** Includes update from Thierry Reding to no longer use gic_handle_irq() Cc: Thierry Reding Signed-off-by: Simon Horman fix --- arch/arm/mach-shmobile/clock-sh73a0.c | 12 ++++++ arch/arm/mach-shmobile/include/mach/common.h | 2 + arch/arm/mach-shmobile/setup-sh73a0.c | 62 +++++++++++++++++++++++++++- 3 files changed, 75 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 5f57701da16e..eab26675c852 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -525,6 +525,13 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ }; +/* The lookups structure below includes duplicate entries for some clocks + * with alternate names. + * - The traditional name used when a device is initialised with platform data + * - The name used when a device is initialised using device tree + * The longer-term aim is to remove these duplicates, and indeed the + * lookups table entirely, by describing clocks using device tree. + */ static struct clk_lookup lookups[] = { /* main clocks */ CLKDEV_CON_ID("r_clk", &r_clk), @@ -545,6 +552,7 @@ static struct clk_lookup lookups[] = { /* MSTP32 clocks */ CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ + CLKDEV_DEV_ID("e6824000.i2c", &mstp_clks[MSTP001]), /* I2C2 */ CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */ CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */ CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */ @@ -553,6 +561,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ + CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */ @@ -569,6 +578,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */ CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ + CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ @@ -579,7 +589,9 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */ CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */ CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ + CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */ CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ + CLKDEV_DEV_ID("e6828000.i2c", &mstp_clks[MSTP410]), /* I2C4 */ CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ }; diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index e2ba16b6ae8e..64c0622ae7d6 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -38,7 +38,9 @@ extern void sh73a0_init_irq_dt(void); extern void sh73a0_map_io(void); extern void sh73a0_earlytimer_init(void); extern void sh73a0_add_early_devices(void); +extern void sh73a0_add_early_devices_dt(void); extern void sh73a0_add_standard_devices(void); +extern void sh73a0_add_standard_devices_dt(void); extern void sh73a0_clock_init(void); extern void sh73a0_pinmux_init(void); extern void sh73a0_pm_init(void); diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 8c2d6424f470..f7ecb0bc1bec 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -754,7 +755,7 @@ static struct platform_device pmu_device = { .resource = pmu_resources, }; -static struct platform_device *sh73a0_early_devices[] __initdata = { +static struct platform_device *sh73a0_early_devices_dt[] __initdata = { &scif0_device, &scif1_device, &scif2_device, @@ -765,6 +766,9 @@ static struct platform_device *sh73a0_early_devices[] __initdata = { &scif7_device, &scif8_device, &cmt10_device, +}; + +static struct platform_device *sh73a0_early_devices[] __initdata = { &tmu00_device, &tmu01_device, }; @@ -787,6 +791,8 @@ void __init sh73a0_add_standard_devices(void) /* Clear software reset bit on SY-DMAC module */ __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); + platform_add_devices(sh73a0_early_devices_dt, + ARRAY_SIZE(sh73a0_early_devices_dt)); platform_add_devices(sh73a0_early_devices, ARRAY_SIZE(sh73a0_early_devices)); platform_add_devices(sh73a0_late_devices, @@ -805,9 +811,63 @@ void __init sh73a0_earlytimer_init(void) void __init sh73a0_add_early_devices(void) { + early_platform_add_devices(sh73a0_early_devices_dt, + ARRAY_SIZE(sh73a0_early_devices_dt)); early_platform_add_devices(sh73a0_early_devices, ARRAY_SIZE(sh73a0_early_devices)); /* setup early console here as well */ shmobile_setup_console(); } + +#ifdef CONFIG_USE_OF + +/* Please note that the clock initialisation shcheme used in + * sh73a0_add_early_devices_dt() and sh73a0_add_standard_devices_dt() + * does not work with SMP as there is a yet to be resolved lock-up in + * workqueue initialisation. + * + * CONFIG_SMP should be disabled when using this code. + */ + +void __init sh73a0_add_early_devices_dt(void) +{ + shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ + + early_platform_add_devices(sh73a0_early_devices_dt, + ARRAY_SIZE(sh73a0_early_devices_dt)); + + /* setup early console here as well */ + shmobile_setup_console(); +} + +static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = { + {}, +}; + +void __init sh73a0_add_standard_devices_dt(void) +{ + /* clocks are setup late during boot in the case of DT */ + sh73a0_clock_init(); + + platform_add_devices(sh73a0_early_devices_dt, + ARRAY_SIZE(sh73a0_early_devices_dt)); + of_platform_populate(NULL, of_default_bus_match_table, + sh73a0_auxdata_lookup, NULL); +} + +static const char *sh73a0_boards_compat_dt[] __initdata = { + "renesas,sh73a0", + NULL, +}; + +DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") + .map_io = sh73a0_map_io, + .init_early = sh73a0_add_early_devices_dt, + .nr_irqs = NR_IRQS_LEGACY, + .init_irq = sh73a0_init_irq_dt, + .init_machine = sh73a0_add_standard_devices_dt, + .init_time = shmobile_timer_init, + .dt_compat = sh73a0_boards_compat_dt, +MACHINE_END +#endif /* CONFIG_USE_OF */ -- cgit v1.2.3 From 93301f5dbd72bd60882f88b4d04cafa3db4c85ed Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 26 Nov 2012 18:26:17 +0900 Subject: ARM: mach-shmobile: sh73a0: Initialise MMCIF using DT This device also requires a voltage regulator which should be defined in a board-specific maner. An example dts snipped follows. / { fixedregulator1v8: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; }; &mmcif { vmmc-supply = <&fixedregulator1v8>; vqmmc-supply = <&fixedregulator1v8>; }; Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-sh73a0.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index eab26675c852..afa5423a0f93 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -583,6 +583,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ + CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */ CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */ -- cgit v1.2.3 From ff8de98d50e551057978ea90d09255c528fde1ac Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Fri, 18 Jan 2013 01:40:42 -0800 Subject: ARM: shmobile: r8a7779: scif .irqs used SCIx_IRQ_MUXED() This patch tidyup scif .irqs settings by using SCIx_IRQ_MUXED() macro. Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7779.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index a181ced09e45..7e87ab3eb8d3 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -66,8 +66,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = { gic_spi(88), gic_spi(88), - gic_spi(88), gic_spi(88) }, + .irqs = SCIx_IRQ_MUXED(gic_spi(88)), }; static struct platform_device scif0_device = { @@ -84,8 +83,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = { gic_spi(89), gic_spi(89), - gic_spi(89), gic_spi(89) }, + .irqs = SCIx_IRQ_MUXED(gic_spi(89)), }; static struct platform_device scif1_device = { @@ -102,8 +100,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = { gic_spi(90), gic_spi(90), - gic_spi(90), gic_spi(90) }, + .irqs = SCIx_IRQ_MUXED(gic_spi(90)), }; static struct platform_device scif2_device = { @@ -120,8 +117,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = { gic_spi(91), gic_spi(91), - gic_spi(91), gic_spi(91) }, + .irqs = SCIx_IRQ_MUXED(gic_spi(91)), }; static struct platform_device scif3_device = { @@ -138,8 +134,7 @@ static struct plat_sci_port scif4_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = { gic_spi(92), gic_spi(92), - gic_spi(92), gic_spi(92) }, + .irqs = SCIx_IRQ_MUXED(gic_spi(92)), }; static struct platform_device scif4_device = { @@ -156,8 +151,7 @@ static struct plat_sci_port scif5_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = { gic_spi(93), gic_spi(93), - gic_spi(93), gic_spi(93) }, + .irqs = SCIx_IRQ_MUXED(gic_spi(93)), }; static struct platform_device scif5_device = { -- cgit v1.2.3 From 0f234d91b8f50119c4c921db9d9dc0dac24db383 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Thu, 10 Jan 2013 11:16:43 +0100 Subject: ARM: mach-shmobile: add shmobile_cpu_disable_any() Method to disable any core to be used on platforms where CPU0 does not need special treatment. Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/hotplug.c | 6 ++++++ arch/arm/mach-shmobile/include/mach/common.h | 1 + 2 files changed, 7 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/hotplug.c b/arch/arm/mach-shmobile/hotplug.c index b09a0bdbf813..a1524e3367b0 100644 --- a/arch/arm/mach-shmobile/hotplug.c +++ b/arch/arm/mach-shmobile/hotplug.c @@ -56,6 +56,12 @@ int shmobile_cpu_disable(unsigned int cpu) return cpu == 0 ? -EPERM : 0; } +int shmobile_cpu_disable_any(unsigned int cpu) +{ + cpumask_clear_cpu(cpu, &dead_cpus); + return 0; +} + int shmobile_cpu_is_dead(unsigned int cpu) { return cpumask_test_cpu(cpu, &dead_cpus); diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 64c0622ae7d6..e48606d8a2be 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -84,6 +84,7 @@ static inline int shmobile_cpuidle_init(void) { return 0; } extern void shmobile_cpu_die(unsigned int cpu); extern int shmobile_cpu_disable(unsigned int cpu); +extern int shmobile_cpu_disable_any(unsigned int cpu); #ifdef CONFIG_HOTPLUG_CPU extern int shmobile_cpu_is_dead(unsigned int cpu); -- cgit v1.2.3 From dc784e73b45dc055f9dcb174ea5753ea020516fc Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Thu, 10 Jan 2013 11:16:44 +0100 Subject: ARM: mach-shmobile: sh73a0: allow unplugging of CPU0 sh73a0 deals fine with disabling any core, so we should permit it. Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-sh73a0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 9812ea3255c9..acb46a94ccdf 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -143,6 +143,6 @@ struct smp_operations sh73a0_smp_ops __initdata = { #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = sh73a0_cpu_kill, .cpu_die = sh73a0_cpu_die, - .cpu_disable = shmobile_cpu_disable, + .cpu_disable = shmobile_cpu_disable_any, #endif }; -- cgit v1.2.3 From 58079fa7d54a0929d304054ee759187a2ccd3cdf Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 5 Feb 2013 12:24:59 +0900 Subject: ARM: shmobile: r8a7779: Correct TMU clock support During code review it was noticed that the clock value for TMU01 was incorrect and the value for TMU02 was missing. For reference: As of 3.8-rc6 there are no in-tree consumes of these clocks. Reported-by: Denis Oliver Kropp Reviewed-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7779.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index c019609da660..202370de32f0 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -161,7 +161,8 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */ CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ - CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ + CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ + CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP014]), /* TMU02 */ CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */ CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */ -- cgit v1.2.3 From dbe1c3defb3844772634446492ea6c13882596ec Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 5 Feb 2013 16:30:49 +0900 Subject: ARM: shmobile: Register ARM architected timer Register ARM architected timer by default for all mach-shmobile systems using late timer. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/timer.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c index fdbe54a11555..3d16d4dff01b 100644 --- a/arch/arm/mach-shmobile/timer.c +++ b/arch/arm/mach-shmobile/timer.c @@ -20,6 +20,7 @@ */ #include #include +#include #include #include @@ -62,4 +63,6 @@ void __init shmobile_earlytimer_init(void) void __init shmobile_timer_init(void) { + arch_timer_of_register(); + arch_timer_sched_clock_init(); } -- cgit v1.2.3 From c08e20d246ded319fc77616c64dcbf69456cb4be Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 11 Feb 2013 17:30:32 -0600 Subject: arm: Add v7_invalidate_l1 to cache-v7.S mach-socfpga is another platform that needs to use v7_invalidate_l1 to bringup additional cores. There was a comment that the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S Signed-off-by: Dinh Nguyen Acked-by: Simon Horman Acked-by: Stephen Warren Reviewed-by: Pavel Machek Reviewed-by: Santosh Shilimkar Tested-by: Pavel Machek Tested-by: Stephen Warren Cc: Arnd Bergmann Cc: Russell King Cc: Olof Johansson Cc: Thomas Gleixner Cc: Rob Herring Cc: Sascha Hauer Cc: Magnus Damm Signed-off-by: Olof Johansson --- arch/arm/mach-shmobile/headsmp.S | 48 ---------------------------------------- 1 file changed, 48 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S index b202c1272526..96001fd49b6c 100644 --- a/arch/arm/mach-shmobile/headsmp.S +++ b/arch/arm/mach-shmobile/headsmp.S @@ -16,54 +16,6 @@ __CPUINIT -/* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks! - * - * The secondary kernel init calls v7_flush_dcache_all before it enables - * the L1; however, the L1 comes out of reset in an undefined state, so - * the clean + invalidate performed by v7_flush_dcache_all causes a bunch - * of cache lines with uninitialized data and uninitialized tags to get - * written out to memory, which does really unpleasant things to the main - * processor. We fix this by performing an invalidate, rather than a - * clean + invalidate, before jumping into the kernel. - * - * This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs - * to be called for both secondary cores startup and primary core resume - * procedures. Ideally, it should be moved into arch/arm/mm/cache-v7.S. - */ -ENTRY(v7_invalidate_l1) - mov r0, #0 - mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache - mcr p15, 2, r0, c0, c0, 0 - mrc p15, 1, r0, c0, c0, 0 - - ldr r1, =0x7fff - and r2, r1, r0, lsr #13 - - ldr r1, =0x3ff - - and r3, r1, r0, lsr #3 @ NumWays - 1 - add r2, r2, #1 @ NumSets - - and r0, r0, #0x7 - add r0, r0, #4 @ SetShift - - clz r1, r3 @ WayShift - add r4, r3, #1 @ NumWays -1: sub r2, r2, #1 @ NumSets-- - mov r3, r4 @ Temp = NumWays -2: subs r3, r3, #1 @ Temp-- - mov r5, r3, lsl r1 - mov r6, r2, lsl r0 - orr r5, r5, r6 @ Reg = (Temp< Date: Fri, 15 Feb 2013 22:32:02 +0900 Subject: ARM: shmobile: r8a7779: Correct TMU clock support again After discussion on the linux-sh mailing list and reference to the hardware documentation it appears that 'TMU00', 'TMU01' and 'TMU02' use a common clock. The sh_tmu.1 portion of this change resolves a regression introduced in 58079fa7d54a0929d304054ee759187a2ccd3cdf (ARM: shmobile: r8a7779: Correct TMU clock support) and fixes a regression introduced by that patch. That patch is queued up for v3.9. ... hub 4-0:1.0: USB hub found hub 4-0:1.0: 2 ports detected INFO: rcu_sched self-detected stall on CPUINFO: rcu_sched detected stalls on +CPUs/tasks: { 1} (detected by 2, t=279640 jiffies, g=4294967052, c=4294967051, +q=38) Task dump for CPU 1: swapper/0 R running 0 1 0 0x00000002 [] (__schedule+0x1b0/0x4c0) from [] (__loop_delay+0x4/0xc) { 1} (t=279640 jiffies g=4294967052 c=4294967052 q=37) [] (unwind_backtrace+0x0/0xf8) from [] +(rcu_check_callbacks+0x218/0x6b8) [] (rcu_check_callbacks+0x218/0x6b8) from [] +(update_process_times+0x38/0x4c) [] (update_process_times+0x38/0x4c) from [] +(tick_nohz_handler+0xb4/0x11c) [] (tick_nohz_handler+0xb4/0x11c) from [] +(twd_handler+0x34/0x44) [] (twd_handler+0x34/0x44) from [] +(handle_percpu_devid_irq+0x68/0x80) [] (handle_percpu_devid_irq+0x68/0x80) from [] +(generic_handle_irq+0x20/0x30) [] (generic_handle_irq+0x20/0x30) from [] +(handle_IRQ+0x40/0x90) [] (handle_IRQ+0x40/0x90) from [] (gic_handle_irq+0x2c/0x5c) [] (gic_handle_irq+0x2c/0x5c) from [] (__irq_svc+0x40/0x50) Exception stack(0xef03ddf8 to 0xef03de40) dde0: 000001c1 ffffffff de00: 000001d8 01bf01bf ef35ec40 ef35e800 ef35ec6c 0000002b ef35ec68 c013c560 de20: c0392994 60000113 00000000 ef03de40 c01a5d40 c013c590 20000113 ffffffff [] (__irq_svc+0x40/0x50) from [] (__loop_delay+0x4/0xc) Cc: Denis Oliver Kropp Cc: Magnus Damm Cc: Kuninori Morimoto Cc: Paul Mundt Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7779.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 202370de32f0..1db36537255c 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -161,8 +161,8 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */ CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ - CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ - CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP014]), /* TMU02 */ + CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ + CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */ CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */ CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */ -- cgit v1.2.3