From 0798af5451b8a8f4dab3a43f710b1e80a81e0b8c Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Wed, 7 Jun 2017 15:07:42 +0530 Subject: ARM: dts: dra72-evm-common: Correct vmmc-supply for mmc2 On dra72/dra71 evms, mmc2 vdd/ios are connected to a common 1.8V supply not 3.3V. Also the regulator that supplies 1.8V is different on dra71-evm so move the supply property from common dtsi to evm specific dts files. Fixes: a4240d3af677 ("ARM: dts: Add support for dra72-evm rev C (SR2.0)") Signed-off-by: Ravikumar Kattekola Signed-off-by: Sekhar Nori Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra71-evm.dts | 14 ++++++++++++++ arch/arm/boot/dts/dra72-evm-common.dtsi | 2 -- arch/arm/boot/dts/dra72-evm-revc.dts | 14 ++++++++++++++ arch/arm/boot/dts/dra72-evm.dts | 14 ++++++++++++++ 4 files changed, 42 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts index 4d57a55473af..c7a56b6263a6 100644 --- a/arch/arm/boot/dts/dra71-evm.dts +++ b/arch/arm/boot/dts/dra71-evm.dts @@ -32,6 +32,16 @@ 3000000 0x1>; }; + evm_1v8_sw: fixedregulator-evm_1v8 { + compatible = "regulator-fixed"; + regulator-name = "evm_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&lp8732_buck0_reg>; + regulator-always-on; + regulator-boot-on; + }; + poweroff: gpio-poweroff { compatible = "gpio-poweroff"; gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>; @@ -165,6 +175,10 @@ vmmc_aux-supply = <&vpo_sd_1v8_3v3>; }; +&mmc2 { + vmmc-supply = <&evm_1v8_sw>; +}; + &mac { mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 85780549bc26..4ef2d67b3914 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -419,8 +419,6 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins_default>; - - vmmc-supply = <&evm_3v3_sw>; bus-width = <8>; ti,non-removable; max-frequency = <192000000>; diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts index 3ecac56bf504..47dcd527ec58 100644 --- a/arch/arm/boot/dts/dra72-evm-revc.dts +++ b/arch/arm/boot/dts/dra72-evm-revc.dts @@ -15,6 +15,16 @@ device_type = "memory"; reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ }; + + evm_1v8_sw: fixedregulator-evm_1v8 { + compatible = "regulator-fixed"; + regulator-name = "evm_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&smps4_reg>; + regulator-always-on; + regulator-boot-on; + }; }; &i2c1 { @@ -82,3 +92,7 @@ interrupts = <16 IRQ_TYPE_EDGE_FALLING>; }; }; + +&mmc2 { + vmmc-supply = <&evm_1v8_sw>; +}; diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index cd9c4ff12654..adbcc570eba9 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -13,6 +13,16 @@ device_type = "memory"; reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */ }; + + evm_1v8_sw: fixedregulator-evm_1v8 { + compatible = "regulator-fixed"; + regulator-name = "evm_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&smps4_reg>; + regulator-always-on; + regulator-boot-on; + }; }; &i2c1 { @@ -43,3 +53,7 @@ phy_id = <&davinci_mdio>, <3>; phy-mode = "rgmii"; }; + +&mmc2 { + vmmc-supply = <&evm_1v8_sw>; +}; -- cgit v1.2.3 From e9a46399519462eecaa21e158249a27635d49ee6 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Wed, 7 Jun 2017 15:07:43 +0530 Subject: ARM: dts: dra72-evm: Add vqmmc supply to mmc1 Add vqmmc-supply property to mmc1 dt node and populate it with ldo1_reg to reflect ldo1_out is connected to mmc1 IO lines. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra72-evm.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index adbcc570eba9..99fdb3d8445b 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -54,6 +54,10 @@ phy-mode = "rgmii"; }; +&mmc1 { + vqmmc-supply = <&ldo1_reg>; +}; + &mmc2 { vmmc-supply = <&evm_1v8_sw>; }; -- cgit v1.2.3 From eb86fb6ea4c4d3e6a983cef67578d713b78d6244 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Wed, 7 Jun 2017 15:07:44 +0530 Subject: ARM: dts: dra72-evm-revc: Add vqmmc supply to mmc1 Add vqmmc-supply property to mmc1 dt node and populate it with ldo1_reg to reflect ldo1_out is connected to mmc1 IO lines. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra72-evm-revc.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts index 47dcd527ec58..5532309971ae 100644 --- a/arch/arm/boot/dts/dra72-evm-revc.dts +++ b/arch/arm/boot/dts/dra72-evm-revc.dts @@ -93,6 +93,10 @@ }; }; +&mmc1 { + vqmmc-supply = <&ldo1_reg>; +}; + &mmc2 { vmmc-supply = <&evm_1v8_sw>; }; -- cgit v1.2.3 From 8f323f8d8332455b633acabddb15483d64757965 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Wed, 7 Jun 2017 15:07:45 +0530 Subject: ARM: dts: am57xx-beagle-x15-revb1: Fix supply name used for MMC1 IO lines The dt binding documentation of omap-hsmmc recommends using "vmmc_aux" for IO supply lines. However commit 0af28cc92690d8c ("ARM: dts: am57xx-beagle-x15: Add support for rev B1") added it as "vmmc-aux". Now that anyways it needs to be fixed, use the generic "vqmmc" binding instead of the deprecated "vmmc_aux". Fixes: commit 0af28cc92690d8c ("ARM: dts: am57xx-beagle-x15: Add support for rev B1") Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts index 39a92aff0a0d..578398c781b1 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts @@ -20,7 +20,7 @@ &mmc1 { vmmc-supply = <&vdd_3v3>; - vmmc-aux-supply = <&ldo1_reg>; + vqmmc-supply = <&ldo1_reg>; }; /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */ -- cgit v1.2.3 From b5ca62a53d2df30432118edeff61acc8717d2515 Mon Sep 17 00:00:00 2001 From: Ravikumar Kattekola Date: Wed, 7 Jun 2017 15:07:46 +0530 Subject: ARM: dts: dra7-evm: Correct the vmmc-supply for mmc2 On DRA75x EVM, MMC2 vdd/ios are connected to a common supply fixed at 1.8V not 3.3V Fixes: 6cf02dbb4b71 ("ARM: dts: dra7-evm: Add mmc2 node for eMMC support") Signed-off-by: Ravikumar Kattekola Signed-off-by: Sekhar Nori Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7-evm.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index c408aaa1992b..f9c28bf127a5 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -25,6 +25,14 @@ stdout-path = &uart1; }; + evm_1v8_sw: fixedregulator-evm_1v8 { + compatible = "regulator-fixed"; + regulator-name = "evm_1v8"; + vin-supply = <&smps9_reg>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + evm_3v3_sd: fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sd"; @@ -449,7 +457,7 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins_default>; - vmmc-supply = <&evm_3v3_sw>; + vmmc-supply = <&evm_1v8_sw>; bus-width = <8>; }; -- cgit v1.2.3 From 866b5e447f1ad3a0d72c139fabe3dd71f351f361 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Wed, 7 Jun 2017 15:07:47 +0530 Subject: ARM: dts: dra7: Add "max-frequency" property to MMC dt nodes Add "max-frequency" property to MMC dt nodes and set the maximum frequency to 192MHz for MMC1/MMC2, 64MHz for MMC3 and 192MHz for MMC4. pdata quirks must be utilized to detect presence of rev 1.1/1.0 of silicon and adjust maximum frequencies as per restrictions documented in i843. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sekhar Nori Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 25908dd338ee..abb1fa1acb42 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1037,6 +1037,7 @@ dma-names = "tx", "rx"; status = "disabled"; pbias-supply = <&pbias_mmc_reg>; + max-frequency = <192000000>; }; mmc2: mmc@480b4000 { @@ -1048,6 +1049,7 @@ dmas = <&sdma_xbar 47>, <&sdma_xbar 48>; dma-names = "tx", "rx"; status = "disabled"; + max-frequency = <192000000>; }; mmc3: mmc@480ad000 { @@ -1059,6 +1061,8 @@ dmas = <&sdma_xbar 77>, <&sdma_xbar 78>; dma-names = "tx", "rx"; status = "disabled"; + /* Errata i887 limits max-frequency of MMC3 to 64 MHz */ + max-frequency = <64000000>; }; mmc4: mmc@480d1000 { @@ -1070,6 +1074,7 @@ dmas = <&sdma_xbar 57>, <&sdma_xbar 58>; dma-names = "tx", "rx"; status = "disabled"; + max-frequency = <192000000>; }; mmu0_dsp1: mmu@40d01000 { -- cgit v1.2.3 From 8cb46bd224a0ecfc759b685d4bb0538d8e7d51a7 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Tue, 4 Jul 2017 17:31:17 +0800 Subject: ARM: dts: zte: remove num-slots from zx296702-ad1 dwmmc driver deprecated num-slots and plan to get rid of it finally. Just move a step to cleanup it from DT. Signed-off-by: Shawn Lin Reviewed-by: Jun Nie Reviewed-by: Jaehoon Chung Signed-off-by: Shawn Guo --- arch/arm/boot/dts/zx296702-ad1.dts | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/zx296702-ad1.dts b/arch/arm/boot/dts/zx296702-ad1.dts index 081f980cfbe6..b0183c3a1d7c 100644 --- a/arch/arm/boot/dts/zx296702-ad1.dts +++ b/arch/arm/boot/dts/zx296702-ad1.dts @@ -18,7 +18,6 @@ }; &mmc0 { - num-slots = <1>; supports-highspeed; non-removable; disable-wp; @@ -31,7 +30,6 @@ }; &mmc1 { - num-slots = <1>; supports-highspeed; non-removable; disable-wp; -- cgit v1.2.3 From 85bb29cf092d2efb724e49cff9b3bc6db8bc5d79 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 15 Jun 2017 17:33:37 +0530 Subject: ARM: dts: imx6ul-isiot: Move common nodes in imx6ul-isiot.dtsi Maintaining separate dtsi file with common nodes make unclear and confusing since -isiot.dtsi is available for adding common nodes. If the nodes are common between the dts files then mark status as "okay" otherwise mark it "disabled" so-that respective dts can mark status "okay" Signed-off-by: Jagan Teki Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul-isiot-common.dtsi | 141 ----------------------------- arch/arm/boot/dts/imx6ul-isiot-emmc.dts | 1 - arch/arm/boot/dts/imx6ul-isiot-nand.dts | 1 - arch/arm/boot/dts/imx6ul-isiot.dtsi | 96 ++++++++++++++++++++ 4 files changed, 96 insertions(+), 143 deletions(-) delete mode 100644 arch/arm/boot/dts/imx6ul-isiot-common.dtsi (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul-isiot-common.dtsi b/arch/arm/boot/dts/imx6ul-isiot-common.dtsi deleted file mode 100644 index 2beaab6e272e..000000000000 --- a/arch/arm/boot/dts/imx6ul-isiot-common.dtsi +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -&i2c1 { - stmpe811: gpio-expander@44 { - compatible = "st,stmpe811"; - reg = <0x44>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_stmpe>; - interrupt-parent = <&gpio1>; - interrupts = <18 IRQ_TYPE_EDGE_FALLING>; - interrupt-controller; - #interrupt-cells = <2>; - - stmpe: touchscreen { - compatible = "st,stmpe-ts"; - st,sample-time = <4>; - st,mod-12b = <1>; - st,ref-sel = <0>; - st,adc-freq = <1>; - st,ave-ctrl = <1>; - st,touch-det-delay = <2>; - st,settling = <2>; - st,fraction-z = <7>; - st,i-drive = <1>; - }; - }; -}; - -&lcdif { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcdif_dat - &pinctrl_lcdif_ctrl>; - display = <&display0>; - status = "okay"; - - display0: display { - bits-per-pixel = <16>; - bus-width = <18>; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <28000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <30>; - hback-porch = <30>; - hsync-len = <64>; - vback-porch = <5>; - vfront-porch = <5>; - vsync-len = <20>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <0>; - }; - }; - }; -}; - -&iomuxc { - pinctrl_lcdif_ctrl: lcdifctrlgrp { - fsl,pins = < - MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 - MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 - MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 - MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 - >; - }; - - pinctrl_lcdif_dat: lcdifdatgrp { - fsl,pins = < - MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 - MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 - MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 - MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 - MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 - MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 - MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 - MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 - MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 - MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 - MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 - MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 - MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 - MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 - MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 - MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 - MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 - MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 - >; - }; - - pinctrl_stmpe: stmpegrp { - fsl,pins = < - MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0 - >; - }; -}; diff --git a/arch/arm/boot/dts/imx6ul-isiot-emmc.dts b/arch/arm/boot/dts/imx6ul-isiot-emmc.dts index 73a1d0f0b9d5..f5b422898e61 100644 --- a/arch/arm/boot/dts/imx6ul-isiot-emmc.dts +++ b/arch/arm/boot/dts/imx6ul-isiot-emmc.dts @@ -43,7 +43,6 @@ /dts-v1/; #include "imx6ul-isiot.dtsi" -#include "imx6ul-isiot-common.dtsi" / { model = "Engicam Is.IoT MX6UL eMMC Starter kit"; diff --git a/arch/arm/boot/dts/imx6ul-isiot-nand.dts b/arch/arm/boot/dts/imx6ul-isiot-nand.dts index da29a86eb6a8..de15e1c75dd1 100644 --- a/arch/arm/boot/dts/imx6ul-isiot-nand.dts +++ b/arch/arm/boot/dts/imx6ul-isiot-nand.dts @@ -43,7 +43,6 @@ /dts-v1/; #include "imx6ul-isiot.dtsi" -#include "imx6ul-isiot-common.dtsi" / { model = "Engicam Is.IoT MX6UL NAND Starter kit"; diff --git a/arch/arm/boot/dts/imx6ul-isiot.dtsi b/arch/arm/boot/dts/imx6ul-isiot.dtsi index ea30380ad7a4..3c442f6fed67 100644 --- a/arch/arm/boot/dts/imx6ul-isiot.dtsi +++ b/arch/arm/boot/dts/imx6ul-isiot.dtsi @@ -76,6 +76,32 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; + + stmpe811: gpio-expander@44 { + compatible = "st,stmpe811"; + reg = <0x44>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_stmpe>; + interrupt-parent = <&gpio1>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + + stmpe: touchscreen { + compatible = "st,stmpe-ts"; + st,sample-time = <4>; + st,mod-12b = <1>; + st,ref-sel = <0>; + st,adc-freq = <1>; + st,ave-ctrl = <1>; + st,touch-det-delay = <2>; + st,settling = <2>; + st,fraction-z = <7>; + st,i-drive = <1>; + }; + }; }; &i2c2 { @@ -85,6 +111,38 @@ status = "okay"; }; +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl>; + display = <&display0>; + status = "okay"; + + display0: display { + bits-per-pixel = <16>; + bus-width = <18>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <28000000>; + hactive = <800>; + vactive = <480>; + hfront-porch = <30>; + hback-porch = <30>; + hsync-len = <64>; + vback-porch = <5>; + vfront-porch = <5>; + vsync-len = <20>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + }; +}; + &pwm8 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm8>; @@ -129,6 +187,38 @@ >; }; + pinctrl_lcdif_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + + pinctrl_lcdif_dat: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + pinctrl_pwm8: pwm8grp { fsl,pins = < MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0 @@ -145,6 +235,12 @@ >; }; + pinctrl_stmpe: stmpegrp { + fsl,pins = < + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 -- cgit v1.2.3 From ddab367d4cf6608ba84aa57583d52ffa8ee878d2 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 15 Jun 2017 17:33:38 +0530 Subject: ARM: dts: imx6ul-isiot: Add Sound card with codec node Add support for Sound card and related codec(via i2c1) nodes on Engicam Is.IoT MX6UL variant module boards. Signed-off-by: Jagan Teki Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul-isiot.dtsi | 54 +++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul-isiot.dtsi b/arch/arm/boot/dts/imx6ul-isiot.dtsi index 3c442f6fed67..e2dacdcef39a 100644 --- a/arch/arm/boot/dts/imx6ul-isiot.dtsi +++ b/arch/arm/boot/dts/imx6ul-isiot.dtsi @@ -69,6 +69,50 @@ 100>; default-brightness-level = <100>; }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "imx6ul-isiot-sgtl5000"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Line", "Line In", + "Line", "Line Out", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + + simple-audio-card,cpu { + sound-dai = <&sai2>; + }; + + dailink_master: simple-audio-card,codec { + sound-dai = <&sgtl5000>; + clocks = <&clks IMX6UL_CLK_SAI2>; + }; + }; }; &i2c1 { @@ -77,6 +121,16 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; + sgtl5000: codec@a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks IMX6UL_CLK_OSC>; + clock-names = "mclk"; + VDDA-supply = <®_3p3v>; + VDDIO-supply = <®_3p3v>; + VDDD-supply = <®_1p8v>; + }; + stmpe811: gpio-expander@44 { compatible = "st,stmpe811"; reg = <0x44>; -- cgit v1.2.3 From 4cfad559da170508f96879bc12d039765befcf3e Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 15 Jun 2017 17:33:39 +0530 Subject: ARM: dts: imx6ul-isiot: Add FEC node support Add support for fec1 node on Engicam Is.IoT variant boards. Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul-isiot.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul-isiot.dtsi b/arch/arm/boot/dts/imx6ul-isiot.dtsi index e2dacdcef39a..950fb28b630a 100644 --- a/arch/arm/boot/dts/imx6ul-isiot.dtsi +++ b/arch/arm/boot/dts/imx6ul-isiot.dtsi @@ -115,6 +115,24 @@ }; }; +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + }; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -227,6 +245,21 @@ }; &iomuxc { + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x1b0b0 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 -- cgit v1.2.3 From d8d0f350d3e4d0026f9387f81f6e8cd36db71444 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 16 Jun 2017 12:34:37 +0530 Subject: ARM: dts: imx6ul-geam-kit: Remove re-enabled usdhc1 usdhc1 is enabled and assigned pinctrl-0 on imx6ul-geam.dtsi but same thing done on imx6ul-geam-kit.dts, so remove this re-enabled node from the same. Signed-off-by: Jagan Teki Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul-geam-kit.dts | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts index 142e60cab65f..40de2d7473ba 100644 --- a/arch/arm/boot/dts/imx6ul-geam-kit.dts +++ b/arch/arm/boot/dts/imx6ul-geam-kit.dts @@ -88,12 +88,6 @@ }; }; -&usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1>; - status = "okay"; -}; - &tsc { measure-delay-time = <0x1ffff>; pre-charge-time = <0x1fff>; -- cgit v1.2.3 From 440fc30986302721c4303bbfc28eb967af7f5b49 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 16 Jun 2017 12:34:38 +0530 Subject: ARM: dts: imx6ul-geam: Drop imx6ul-geam.dtsi GEAM6UL SOM does have single module, it doesn't come with any variants. Maintaining imx6ul-geam.dtsi make no sense so move all devices from .dtsi into dts file and drop the same. Signed-off-by: Jagan Teki Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul-geam-kit.dts | 353 ++++++++++++++++++++++++++++- arch/arm/boot/dts/imx6ul-geam.dtsi | 406 ---------------------------------- 2 files changed, 351 insertions(+), 408 deletions(-) delete mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts index 40de2d7473ba..d7092522d95b 100644 --- a/arch/arm/boot/dts/imx6ul-geam-kit.dts +++ b/arch/arm/boot/dts/imx6ul-geam-kit.dts @@ -43,29 +43,133 @@ /dts-v1/; #include -#include "imx6ul-geam.dtsi" +#include +#include "imx6ul.dtsi" / { model = "Engicam GEAM6UL"; compatible = "engicam,imx6ul-geam", "fsl,imx6ul"; + + memory { + reg = <0x80000000 0x08000000>; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm8 0 100000>; + brightness-levels = < 0 1 2 3 4 5 6 7 8 9 + 10 11 12 13 14 15 16 17 18 19 + 20 21 22 23 24 25 26 27 28 29 + 30 31 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 48 49 + 50 51 52 53 54 55 56 57 58 59 + 60 61 62 63 64 65 66 67 68 69 + 70 71 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 88 89 + 90 91 92 93 94 95 96 97 98 99 + 100>; + default-brightness-level = <100>; + }; + + chosen { + stdout-path = &uart1; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; }; &can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_3p3v>; status = "okay"; }; &can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_3p3v>; + status = "okay"; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; }; &lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl>; display = <&display0>; status = "okay"; display0: display { bits-per-pixel = <16>; bus-width = <18>; - status = "okay"; display-timings { native-mode = <&timing0>; @@ -88,8 +192,253 @@ }; }; +&pwm8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm8>; + status = "okay"; +}; + +&tsc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + status = "okay"; +}; + &tsc { measure-delay-time = <0x1ffff>; pre-charge-time = <0x1fff>; status = "okay"; }; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usbotg1 { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + bus-width = <4>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + no-1-8-v; + status = "okay"; +}; + +&iomuxc { + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */ + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031 + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 + MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 + >; + }; + + pinctrl_gpmi_nand: gpmi-nand { + fsl,pins = < + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1 + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_lcdif_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + + pinctrl_lcdif_dat: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + + pinctrl_pwm8: pwm8grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0 + >; + }; + + pinctrl_tsc: tscgrp { + fsl,pin = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 + >; + }; + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0 + MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031 + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 + MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070 + MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070 + MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070 + MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070 + MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070 + MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070 + >; + }; +}; diff --git a/arch/arm/boot/dts/imx6ul-geam.dtsi b/arch/arm/boot/dts/imx6ul-geam.dtsi deleted file mode 100644 index eb94d956808b..000000000000 --- a/arch/arm/boot/dts/imx6ul-geam.dtsi +++ /dev/null @@ -1,406 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include -#include -#include "imx6ul.dtsi" - -/ { - memory { - reg = <0x80000000 0x08000000>; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm8 0 100000>; - brightness-levels = < 0 1 2 3 4 5 6 7 8 9 - 10 11 12 13 14 15 16 17 18 19 - 20 21 22 23 24 25 26 27 28 29 - 30 31 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 48 49 - 50 51 52 53 54 55 56 57 58 59 - 60 61 62 63 64 65 66 67 68 69 - 70 71 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 88 89 - 90 91 92 93 94 95 96 97 98 99 - 100>; - default-brightness-level = <100>; - }; - - chosen { - stdout-path = &uart1; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "1P8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; -}; - -&can1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1>; - xceiver-supply = <®_3p3v>; -}; - -&can2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan2>; - xceiver-supply = <®_3p3v>; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet1>; - phy-mode = "rmii"; - phy-handle = <ðphy0>; - status = "okay"; -}; - -&fec2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet2>; - phy-mode = "rmii"; - phy-handle = <ðphy1>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; - - ethphy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; - }; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - nand-on-flash-bbt; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; -}; - -&i2c2 { - clock_frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; -}; - -&lcdif { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcdif_dat - &pinctrl_lcdif_ctrl>; - display = <&display0>; -}; - -&pwm8 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm8>; - status = "okay"; -}; - -&tsc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; -}; - -&sai2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai2>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&usbotg1 { - dr_mode = "peripheral"; - status = "okay"; -}; - -&usbotg2 { - dr_mode = "host"; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - bus-width = <4>; - cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; - no-1-8-v; - status = "okay"; -}; - -&iomuxc { - pinctrl_enet1: enet1grp { - fsl,pins = < - MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 - MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 - MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 - MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 - MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 - MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 - MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 - >; - }; - - pinctrl_enet2: enet2grp { - fsl,pins = < - MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 - MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 - MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 - MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */ - MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 - MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 - MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 - MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031 - >; - }; - - pinctrl_flexcan1: flexcan1grp { - fsl,pins = < - MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 - MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 - >; - }; - - pinctrl_flexcan2: flexcan2grp { - fsl,pins = < - MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 - MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 - >; - }; - - pinctrl_gpmi_nand: gpmi-nand { - fsl,pins = < - MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 - MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 - MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 - MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 - MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1 - MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 - MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 - MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 - MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 - MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 - MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 - MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 - MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 - MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 - MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 - MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 - >; - }; - - pinctrl_lcdif_ctrl: lcdifctrlgrp { - fsl,pins = < - MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 - MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 - MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 - MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 - >; - }; - - pinctrl_lcdif_dat: lcdifdatgrp { - fsl,pins = < - MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 - MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 - MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 - MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 - MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 - MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 - MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 - MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 - MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 - MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 - MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 - MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 - MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 - MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 - MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 - MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 - MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 - MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 - >; - }; - - pinctrl_pwm8: pwm8grp { - fsl,pins = < - MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0 - >; - }; - - pinctrl_tsc: tscgrp { - fsl,pin = < - MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 - MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 - MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 - MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 - >; - }; - - pinctrl_sai2: sai2grp { - fsl,pins = < - MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0 - MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031 - MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 - MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 - MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 - MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 - MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 - MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 - MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070 - MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070 - MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070 - MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070 - MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070 - MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070 - >; - }; -}; -- cgit v1.2.3 From 182de5ebce71e469cfa686fcdf08c9cbe11ece97 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 16 Jun 2017 12:34:39 +0530 Subject: ARM: dts: imx6ul-geam: Skip suffix -kit from dts name Engicam SOM's with mounted on starter kits like icorem6(rqs), isiot usually not explicitly named with -kit in dts file names and instead Model has mentioned 'Starter kit' So apply the same rule for geam SOM as well. Signed-off-by: Jagan Teki Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 2 +- arch/arm/boot/dts/imx6ul-geam-kit.dts | 444 ---------------------------------- arch/arm/boot/dts/imx6ul-geam.dts | 444 ++++++++++++++++++++++++++++++++++ 3 files changed, 445 insertions(+), 445 deletions(-) delete mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts create mode 100644 arch/arm/boot/dts/imx6ul-geam.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 4b17f35dc9a7..d6007a95dad7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -466,7 +466,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \ imx6sx-udoo-neo-full.dtb dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ul-14x14-evk.dtb \ - imx6ul-geam-kit.dtb \ + imx6ul-geam.dtb \ imx6ul-isiot-emmc.dtb \ imx6ul-isiot-nand.dtb \ imx6ul-liteboard.dtb \ diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts deleted file mode 100644 index d7092522d95b..000000000000 --- a/arch/arm/boot/dts/imx6ul-geam-kit.dts +++ /dev/null @@ -1,444 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; - -#include -#include -#include "imx6ul.dtsi" - -/ { - model = "Engicam GEAM6UL"; - compatible = "engicam,imx6ul-geam", "fsl,imx6ul"; - - memory { - reg = <0x80000000 0x08000000>; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm8 0 100000>; - brightness-levels = < 0 1 2 3 4 5 6 7 8 9 - 10 11 12 13 14 15 16 17 18 19 - 20 21 22 23 24 25 26 27 28 29 - 30 31 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 48 49 - 50 51 52 53 54 55 56 57 58 59 - 60 61 62 63 64 65 66 67 68 69 - 70 71 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 88 89 - 90 91 92 93 94 95 96 97 98 99 - 100>; - default-brightness-level = <100>; - }; - - chosen { - stdout-path = &uart1; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "1P8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; -}; - -&can1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1>; - xceiver-supply = <®_3p3v>; - status = "okay"; -}; - -&can2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan2>; - xceiver-supply = <®_3p3v>; - status = "okay"; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet1>; - phy-mode = "rmii"; - phy-handle = <ðphy0>; - status = "okay"; -}; - -&fec2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet2>; - phy-mode = "rmii"; - phy-handle = <ðphy1>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; - - ethphy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; - }; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - nand-on-flash-bbt; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; -}; - -&i2c2 { - clock_frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; -}; - -&lcdif { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcdif_dat - &pinctrl_lcdif_ctrl>; - display = <&display0>; - status = "okay"; - - display0: display { - bits-per-pixel = <16>; - bus-width = <18>; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <28000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <30>; - hback-porch = <30>; - hsync-len = <64>; - vback-porch = <5>; - vfront-porch = <5>; - vsync-len = <20>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <0>; - }; - }; - }; -}; - -&pwm8 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm8>; - status = "okay"; -}; - -&tsc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; -}; - -&sai2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai2>; - status = "okay"; -}; - -&tsc { - measure-delay-time = <0x1ffff>; - pre-charge-time = <0x1fff>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&usbotg1 { - dr_mode = "peripheral"; - status = "okay"; -}; - -&usbotg2 { - dr_mode = "host"; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - bus-width = <4>; - cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; - no-1-8-v; - status = "okay"; -}; - -&iomuxc { - pinctrl_enet1: enet1grp { - fsl,pins = < - MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 - MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 - MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 - MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 - MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 - MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 - MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 - >; - }; - - pinctrl_enet2: enet2grp { - fsl,pins = < - MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 - MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 - MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 - MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */ - MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 - MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 - MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 - MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031 - >; - }; - - pinctrl_flexcan1: flexcan1grp { - fsl,pins = < - MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 - MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 - >; - }; - - pinctrl_flexcan2: flexcan2grp { - fsl,pins = < - MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 - MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 - >; - }; - - pinctrl_gpmi_nand: gpmi-nand { - fsl,pins = < - MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 - MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 - MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 - MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 - MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1 - MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 - MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 - MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 - MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 - MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 - MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 - MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 - MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 - MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 - MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 - MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 - >; - }; - - pinctrl_lcdif_ctrl: lcdifctrlgrp { - fsl,pins = < - MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 - MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 - MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 - MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 - >; - }; - - pinctrl_lcdif_dat: lcdifdatgrp { - fsl,pins = < - MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 - MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 - MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 - MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 - MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 - MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 - MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 - MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 - MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 - MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 - MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 - MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 - MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 - MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 - MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 - MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 - MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 - MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 - >; - }; - - pinctrl_pwm8: pwm8grp { - fsl,pins = < - MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0 - >; - }; - - pinctrl_tsc: tscgrp { - fsl,pin = < - MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 - MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 - MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 - MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 - >; - }; - - pinctrl_sai2: sai2grp { - fsl,pins = < - MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0 - MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031 - MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 - MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 - MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 - MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 - MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 - MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 - MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070 - MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070 - MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070 - MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070 - MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070 - MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070 - >; - }; -}; diff --git a/arch/arm/boot/dts/imx6ul-geam.dts b/arch/arm/boot/dts/imx6ul-geam.dts new file mode 100644 index 000000000000..e251ad29fb29 --- /dev/null +++ b/arch/arm/boot/dts/imx6ul-geam.dts @@ -0,0 +1,444 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include +#include +#include "imx6ul.dtsi" + +/ { + model = "Engicam GEAM6UL Starter Kit"; + compatible = "engicam,imx6ul-geam", "fsl,imx6ul"; + + memory { + reg = <0x80000000 0x08000000>; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm8 0 100000>; + brightness-levels = < 0 1 2 3 4 5 6 7 8 9 + 10 11 12 13 14 15 16 17 18 19 + 20 21 22 23 24 25 26 27 28 29 + 30 31 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 48 49 + 50 51 52 53 54 55 56 57 58 59 + 60 61 62 63 64 65 66 67 68 69 + 70 71 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 88 89 + 90 91 92 93 94 95 96 97 98 99 + 100>; + defau