From 094536003e06b315105d72ef321f3f87f6780c6b Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 27 May 2020 17:47:36 +0200 Subject: dt-bindings: display: Convert VC4 bindings to schemas The BCM283x SoCs have a display pipeline composed of several controllers with device tree bindings that are supported by Linux. Now that we have the DT validation in place, let's split into separate files and convert the device tree bindings for those controllers to schemas. This is just a 1:1 conversion though, and some bindings were incomplete so it results in example validation warnings that are going to be addressed in the following patches. Acked-by: Eric Anholt Reviewed: Rob Herring Signed-off-by: Maxime Ripard Link: https://patchwork.freedesktop.org/patch/msgid/2dc6384c945c7d35ab4f75464d3a77046dc125b3.1590594512.git-series.maxime@cerno.tech --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 938316092634..d59c5d34d3b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5754,7 +5754,7 @@ M: Eric Anholt S: Supported T: git git://github.com/anholt/linux T: git git://anongit.freedesktop.org/drm/drm-misc -F: Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt +F: Documentation/devicetree/bindings/display/brcm,bcm2835-*.yaml F: drivers/gpu/drm/vc4/ F: include/uapi/drm/vc4_drm.h -- cgit v1.2.3 From 0fb8125635e8eb5483fb095f98dcf0651206a7b8 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 9 Jun 2020 22:04:44 +0200 Subject: video: fbdev: amba-clcd: Retire elder CLCD driver All the functionality in this driver has been reimplemented in the new DRM driver in drivers/gpu/drm/pl111/* and all the boards using it have been migrated to use the DRM driver with all configuration coming from the device tree. I started the work to migrate the CLCD driver to DRM in april 2017 and it took a little more than 3 years to do this properly without leaving any platforms behind. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij Cc: Russell King Link: https://patchwork.freedesktop.org/patch/msgid/20200609200446.153209-2-linus.walleij@linaro.org --- MAINTAINERS | 5 ----- 1 file changed, 5 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index dad5a62d21a7..40474982a21d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1448,11 +1448,6 @@ S: Odd Fixes F: drivers/amba/ F: include/linux/amba/bus.h -ARM PRIMECELL CLCD PL110 DRIVER -M: Russell King -S: Odd Fixes -F: drivers/video/fbdev/amba-clcd.* - ARM PRIMECELL KMI PL050 DRIVER M: Russell King S: Odd Fixes -- cgit v1.2.3 From 55dd37e52d122277192e7d0aa5530c59c646426b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Christian=20K=C3=B6nig?= Date: Wed, 1 Jul 2020 13:24:12 +0200 Subject: MAINTAINERS: Add myself as DMA-buf maintainer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As discussed on the list. Signed-off-by: Christian König Acked-by: Sumit Semwal Acked-by: Daniel Vetter Link: https://patchwork.freedesktop.org/patch/373539/ --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 40474982a21d..5d7130f8d342 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5089,6 +5089,7 @@ F: fs/dlm/ DMA BUFFER SHARING FRAMEWORK M: Sumit Semwal +M: Christian König L: linux-media@vger.kernel.org L: dri-devel@lists.freedesktop.org L: linaro-mm-sig@lists.linaro.org (moderated for non-subscribers) -- cgit v1.2.3 From ef9303fdf46f770e8534ab6f72bad946e70ddfc3 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 17 Jul 2020 04:33:33 +0300 Subject: dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA The ZynqMP includes the DisplayPort subsystem with its own DMA engine called DPDMA. The DPDMA IP comes with 6 individual channels (4 for display, 2 for audio). This documentation describes DT bindings of DPDMA. Signed-off-by: Hyun Kwon Signed-off-by: Michal Simek Signed-off-by: Laurent Pinchart Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200717013337.24122-2-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 68f21d46614c..fa52d4f9f8c8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18852,6 +18852,14 @@ F: Documentation/devicetree/bindings/media/xilinx/ F: drivers/media/platform/xilinx/ F: include/uapi/linux/xilinx-v4l2-controls.h +XILINX ZYNQMP DPDMA DRIVER +M: Hyun Kwon +M: Laurent Pinchart +L: dmaengine@vger.kernel.org +S: Supported +F: Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml +F: include/dt-bindings/dma/xlnx-zynqmp-dpdma.h + XILLYBUS DRIVER M: Eli Billauer L: linux-kernel@vger.kernel.org -- cgit v1.2.3 From 7cbb0c63de3fc218fd06ecfedb477772a4d12f76 Mon Sep 17 00:00:00 2001 From: Hyun Kwon Date: Fri, 17 Jul 2020 04:33:35 +0300 Subject: dmaengine: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver The ZynqMP DisplayPort subsystem includes a DMA engine called DPDMA with 6 DMa channels (4 for display and 2 for audio). This driver exposes the DPDMA through the dmaengine API, to be used by audio (ALSA) and display (DRM) drivers for the DisplayPort subsystem. Signed-off-by: Hyun Kwon Signed-off-by: Tejas Upadhyay Signed-off-by: Michal Simek Signed-off-by: Laurent Pinchart Link: https://lore.kernel.org/r/20200717013337.24122-4-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index fa52d4f9f8c8..6c20a6d338f0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18858,6 +18858,7 @@ M: Laurent Pinchart L: dmaengine@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml +F: drivers/dma/xilinx/xilinx_dpdma.c F: include/dt-bindings/dma/xlnx-zynqmp-dpdma.h XILLYBUS DRIVER -- cgit v1.2.3 From d76271d22694e874ed70791702db9252ffe96a4c Mon Sep 17 00:00:00 2001 From: Hyun Kwon Date: Sat, 7 Jul 2018 19:05:34 -0700 Subject: drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort Subsystem. It includes a buffer manager, a video pipeline renderer (blender), an audio mixer and a DisplayPort source controller (transmitter). The DMA engine the provide data to the buffer manager, as well as the DisplayPort PHYs that drive the lanes, are external to the subsystem and interfaced using the DMA engine and PHY APIs respectively. This driver supports the DisplayPort Subsystem and implements - Two planes, for graphics and video - One CRTC that supports alpha blending - One encoder for the DisplayPort transmitter - One connector for an external monitor It currently doesn't support - Color keying - Test pattern generation - Audio - Live input from the Programmable Logic (FPGA) - Output to the Programmable Logic (FPGA) Signed-off-by: Hyun Kwon Signed-off-by: Laurent Pinchart --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 6c20a6d338f0..67094ea529ba 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5843,6 +5843,15 @@ T: git git://anongit.freedesktop.org/drm/drm-misc F: Documentation/gpu/xen-front.rst F: drivers/gpu/drm/xen/ +DRM DRIVERS FOR XILINX +M: Hyun Kwon +M: Laurent Pinchart +L: dri-devel@lists.freedesktop.org +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: Documentation/devicetree/bindings/display/xlnx/ +F: drivers/gpu/drm/xlnx/ + DRM DRIVERS FOR ZTE ZX M: Shawn Guo L: dri-devel@lists.freedesktop.org -- cgit v1.2.3