From 894db164260c39870ea79e473e1307b4aa5e4257 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Thu, 13 Jun 2013 11:23:38 +0200 Subject: irqchip: renesas-intc-irqpin: DT binding for sense bitfield width Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values. Signed-off-by: Guennadi Liakhovetski Acked-by: Arnd Bergmann Signed-off-by: Simon Horman --- .../bindings/interrupt-controller/renesas,intc-irqpin.txt | 14 ++++++++++++++ drivers/irqchip/irq-renesas-intc-irqpin.c | 4 ++++ 2 files changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt new file mode 100644 index 000000000000..66fcaf5b09ff --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt @@ -0,0 +1,14 @@ +DT bindings for the R-/SH-Mobile irqpin controller + +Required properties: + +- compatible: has to be "renesas,intc-irqpin" +- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in + interrupts.txt in this directory + +Optional properties: + +- any properties, listed in interrupts.txt, and any standard resource allocation + properties +- sense-bitfield-width: width of a single sense bitfield in the SENSE register, + if different from the default 4 bits diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index 5a68e5accec1..4aca1b2bcc48 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include @@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev) /* deal with driver instance configuration */ if (pdata) memcpy(&p->config, pdata, sizeof(*pdata)); + else + of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width", + &p->config.sense_bitfield_width); if (!p->config.sense_bitfield_width) p->config.sense_bitfield_width = 4; /* default to 4 bits */ -- cgit v1.2.3