From 4bf04fc458dfd2a3301a1b76b0dfa4741f7e59fe Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Wed, 3 Oct 2018 17:11:03 +0200 Subject: ARM: dts: stm32: Add dmas to timer on stm32mp157c Add DMAs to enable PWM input capture using STM32 timers on stm32mp157c. Signed-off-by: Fabrice Gasnier Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp157c.dtsi | 58 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index 8bf1c17f8cef..2e9df63f9997 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -98,6 +98,12 @@ reg = <0x40000000 0x400>; clocks = <&rcc TIM2_K>; clock-names = "int"; + dmas = <&dmamux1 18 0x400 0x1>, + <&dmamux1 19 0x400 0x1>, + <&dmamux1 20 0x400 0x1>, + <&dmamux1 21 0x400 0x1>, + <&dmamux1 22 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up"; status = "disabled"; pwm { @@ -119,6 +125,13 @@ reg = <0x40001000 0x400>; clocks = <&rcc TIM3_K>; clock-names = "int"; + dmas = <&dmamux1 23 0x400 0x1>, + <&dmamux1 24 0x400 0x1>, + <&dmamux1 25 0x400 0x1>, + <&dmamux1 26 0x400 0x1>, + <&dmamux1 27 0x400 0x1>, + <&dmamux1 28 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; status = "disabled"; pwm { @@ -140,6 +153,11 @@ reg = <0x40002000 0x400>; clocks = <&rcc TIM4_K>; clock-names = "int"; + dmas = <&dmamux1 29 0x400 0x1>, + <&dmamux1 30 0x400 0x1>, + <&dmamux1 31 0x400 0x1>, + <&dmamux1 32 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4"; status = "disabled"; pwm { @@ -161,6 +179,13 @@ reg = <0x40003000 0x400>; clocks = <&rcc TIM5_K>; clock-names = "int"; + dmas = <&dmamux1 55 0x400 0x1>, + <&dmamux1 56 0x400 0x1>, + <&dmamux1 57 0x400 0x1>, + <&dmamux1 58 0x400 0x1>, + <&dmamux1 59 0x400 0x1>, + <&dmamux1 60 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; status = "disabled"; pwm { @@ -182,6 +207,8 @@ reg = <0x40004000 0x400>; clocks = <&rcc TIM6_K>; clock-names = "int"; + dmas = <&dmamux1 69 0x400 0x1>; + dma-names = "up"; status = "disabled"; timer@5 { @@ -198,6 +225,8 @@ reg = <0x40005000 0x400>; clocks = <&rcc TIM7_K>; clock-names = "int"; + dmas = <&dmamux1 70 0x400 0x1>; + dma-names = "up"; status = "disabled"; timer@6 { @@ -465,6 +494,15 @@ reg = <0x44000000 0x400>; clocks = <&rcc TIM1_K>; clock-names = "int"; + dmas = <&dmamux1 11 0x400 0x1>, + <&dmamux1 12 0x400 0x1>, + <&dmamux1 13 0x400 0x1>, + <&dmamux1 14 0x400 0x1>, + <&dmamux1 15 0x400 0x1>, + <&dmamux1 16 0x400 0x1>, + <&dmamux1 17 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", + "up", "trig", "com"; status = "disabled"; pwm { @@ -486,6 +524,15 @@ reg = <0x44001000 0x400>; clocks = <&rcc TIM8_K>; clock-names = "int"; + dmas = <&dmamux1 47 0x400 0x1>, + <&dmamux1 48 0x400 0x1>, + <&dmamux1 49 0x400 0x1>, + <&dmamux1 50 0x400 0x1>, + <&dmamux1 51 0x400 0x1>, + <&dmamux1 52 0x400 0x1>, + <&dmamux1 53 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", + "up", "trig", "com"; status = "disabled"; pwm { @@ -543,6 +590,11 @@ reg = <0x44006000 0x400>; clocks = <&rcc TIM15_K>; clock-names = "int"; + dmas = <&dmamux1 105 0x400 0x1>, + <&dmamux1 106 0x400 0x1>, + <&dmamux1 107 0x400 0x1>, + <&dmamux1 108 0x400 0x1>; + dma-names = "ch1", "up", "trig", "com"; status = "disabled"; pwm { @@ -564,6 +616,9 @@ reg = <0x44007000 0x400>; clocks = <&rcc TIM16_K>; clock-names = "int"; + dmas = <&dmamux1 109 0x400 0x1>, + <&dmamux1 110 0x400 0x1>; + dma-names = "ch1", "up"; status = "disabled"; pwm { @@ -584,6 +639,9 @@ reg = <0x44008000 0x400>; clocks = <&rcc TIM17_K>; clock-names = "int"; + dmas = <&dmamux1 111 0x400 0x1>, + <&dmamux1 112 0x400 0x1>; + dma-names = "ch1", "up"; status = "disabled"; pwm { -- cgit v1.2.3 From 1f3250f397f683e713439d4ff6a524386646a328 Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Wed, 3 Oct 2018 17:11:04 +0200 Subject: ARM: dts: stm32: don't use timers dmas on stm32mp157c-ed1 Spare dmas when using timer6 on stm32mp157c-ed1. Signed-off-by: Fabrice Gasnier Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp157c-ed1.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts index f77bea49c079..c3ecb1e10d94 100644 --- a/arch/arm/boot/dts/stm32mp157c-ed1.dts +++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts @@ -72,6 +72,9 @@ &timers6 { status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; timer@5 { status = "okay"; }; -- cgit v1.2.3 From 5ae71cea1aec476a115dcf931807548cd26160ec Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Wed, 3 Oct 2018 17:11:05 +0200 Subject: ARM: dts: stm32: don't use timers dmas on stm32mp157c-ev1 Spare dmas when using timers on stm32mp157c-ev1. Signed-off-by: Fabrice Gasnier Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp157c-ev1.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts index 063ee8ac5dcb..e911527c80d0 100644 --- a/arch/arm/boot/dts/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts @@ -161,6 +161,9 @@ }; &timers2 { + /* spare dmas for other usage (un-delete to enable pwm capture) */ + /delete-property/dmas; + /delete-property/dma-names; status = "disabled"; pwm { pinctrl-0 = <&pwm2_pins_a>; @@ -173,6 +176,8 @@ }; &timers8 { + /delete-property/dmas; + /delete-property/dma-names; status = "disabled"; pwm { pinctrl-0 = <&pwm8_pins_a>; @@ -185,6 +190,8 @@ }; &timers12 { + /delete-property/dmas; + /delete-property/dma-names; status = "disabled"; pwm { pinctrl-0 = <&pwm12_pins_a>; -- cgit v1.2.3 From d44d6e021301b6a8d95bf6a92e8aae640de2770a Mon Sep 17 00:00:00 2001 From: Bich HEMON Date: Thu, 15 Nov 2018 08:52:29 +0000 Subject: ARM: dts: stm32: change CAN RAM mapping on stm32mp157c Split the 10Kbytes CAN message RAM to be able to use simultaneously FDCAN1 and FDCAN2 instances. First 5Kbytes are allocated to FDCAN1 and last 5Kbytes are used for FDCAN2. To do so, set the offset to 0x1400 in mram-cfg for FDCAN2. Signed-off-by: Bich Hemon Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp157c.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index 2e9df63f9997..b0961cccfd14 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -742,14 +742,14 @@ m_can1: can@4400e000 { compatible = "bosch,m_can"; - reg = <0x4400e000 0x400>, <0x44011000 0x2800>; + reg = <0x4400e000 0x400>, <0x44011000 0x1400>; reg-names = "m_can", "message_ram"; interrupts = , ; interrupt-names = "int0", "int1"; clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; clock-names = "hclk", "cclk"; - bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; + bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; status = "disabled"; }; -- cgit v1.2.3 From bb4857cd0060b16cb3e84ad258c334717db94acd Mon Sep 17 00:00:00 2001 From: Bich HEMON Date: Thu, 15 Nov 2018 08:52:29 +0000 Subject: ARM: dts: stm32: add can1 sleep pins muxing Add can1 pinctrl definition for low-power mode Signed-off-by: Bich Hemon Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi index c4851271e810..9ec4694e93a7 100644 --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi @@ -246,6 +246,13 @@ }; }; + m_can1_sleep_pins_a: m_can1-sleep@0 { + pins { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + pwm2_pins_a: pwm2-0 { pins { pinmux = ; /* TIM2_CH4 */ -- cgit v1.2.3 From e3b3d0b19bd7b1eb7e5ab1c5d2b12c96fe0f5500 Mon Sep 17 00:00:00 2001 From: Bich HEMON Date: Thu, 15 Nov 2018 08:52:29 +0000 Subject: ARM: dts: stm32: add can1 sleep pins muxing on stm32mp157c-ev1 board Add pinctrl sleep state for can1 on stm32mp157c-ev1. Signed-off-by: Bich Hemon Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp157c-ev1.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts index e911527c80d0..b6aca40b9b90 100644 --- a/arch/arm/boot/dts/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts @@ -124,8 +124,9 @@ }; &m_can1 { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep"; pinctrl-0 = <&m_can1_pins_a>; + pinctrl-1 = <&m_can1_sleep_pins_a>; status = "okay"; }; -- cgit v1.2.3 From 8914b63bab3c43a529316ba2858137bc57b74fa1 Mon Sep 17 00:00:00 2001 From: David Hernandez Sanchez Date: Mon, 3 Dec 2018 10:42:24 +0100 Subject: ARM: dts: stm32: add thermal sensor support on STM32MP157c Add configuration on DT for thermal sensor driver. Signed-off-by: David Hernandez Sanchez Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp157c.dtsi | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index b0961cccfd14..f8bbfff5950b 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -84,6 +84,31 @@ }; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&dts>; + + trips { + cpu_alert1: cpu-alert1 { + temperature = <85000>; + hysteresis = <0>; + type = "passive"; + }; + + cpu-crit { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -966,6 +991,16 @@ status = "disabled"; }; + dts: thermal@50028000 { + compatible = "st,stm32-thermal"; + reg = <0x50028000 0x100>; + interrupts = ; + clocks = <&rcc TMPSENS>; + clock-names = "pclk"; + #thermal-sensor-cells = <0>; + status = "disabled"; + }; + cryp1: cryp@54001000 { compatible = "st,stm32mp1-cryp"; reg = <0x54001000 0x400>; -- cgit v1.2.3 From e3b382c1075e967cf1a95db881f575eef3a8f007 Mon Sep 17 00:00:00 2001 From: Marcin Niestroj Date: Wed, 21 Nov 2018 22:05:15 +0100 Subject: ARM: dts: am335x-chiliboard: Add stdout-path property Add stdout-path property in /chosen node so that earlycon can be used by just adding earlycon in bootargs. Signed-off-by: Marcin Niestroj Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am335x-chiliboard.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-chiliboard.dts b/arch/arm/boot/dts/am335x-chiliboard.dts index 9c2a947aacf5..b50d5d2e71ff 100644 --- a/arch/arm/boot/dts/am335x-chiliboard.dts +++ b/arch/arm/boot/dts/am335x-chiliboard.dts @@ -14,6 +14,10 @@ compatible = "grinn,am335x-chiliboard", "grinn,am335x-chilisom", "ti,am33xx"; + chosen { + stdout-path = &uart0; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; -- cgit v1.2.3 From c6e967ad5a04d307836c927ae6300f62e7603dd7 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 13 Dec 2018 15:02:45 -0800 Subject: ARM: dts: Add wlcore wakeirq for omap3-evm With wlcore supporting optional wakeirqs, let's configure it for omap3-evm and update the related pin muxing as some pins are left unmuxed. Let's configure a wakeirq both for the wlcore GPIO and the SDIO dat1 pin in case wlcore starts supporting SDIO dat1 interrupt at some point. Note that for off-mode, the wlcore reset GPIO will have a glitch meaning wlcore will reset. The only way to workaround for this currently is to configure the reset pin with SAFE_MODE + PULL. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-evm-common.dtsi | 7 +++++-- arch/arm/boot/dts/omap3-evm-processor-common.dtsi | 10 +++++++++- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi index 4c1227d1e79b..17c89df6ce6b 100644 --- a/arch/arm/boot/dts/omap3-evm-common.dtsi +++ b/arch/arm/boot/dts/omap3-evm-common.dtsi @@ -122,6 +122,7 @@ }; &mmc2 { + interrupts-extended = <&intc 86 &omap3_pmx_core 0x12e>; vmmc-supply = <&wl12xx_vmmc>; non-removable; bus-width = <4>; @@ -132,8 +133,10 @@ wlcore: wlcore@2 { compatible = "ti,wl1271"; reg = <2>; - interrupt-parent = <&gpio5>; - interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 149 */ + /* gpio_149 with uart1_rts pad as wakeirq */ + interrupts-extended = <&gpio5 21 IRQ_TYPE_EDGE_RISING>, + <&omap3_pmx_core 0x14e>; + interrupt-names = "irq", "wakeup"; ref-clock-frequency = <38400000>; }; }; diff --git a/arch/arm/boot/dts/omap3-evm-processor-common.dtsi b/arch/arm/boot/dts/omap3-evm-processor-common.dtsi index ce7f42f9448c..b4109f48ec18 100644 --- a/arch/arm/boot/dts/omap3-evm-processor-common.dtsi +++ b/arch/arm/boot/dts/omap3-evm-processor-common.dtsi @@ -86,6 +86,10 @@ OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ + OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */ + OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */ + OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */ + OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */ >; }; @@ -127,9 +131,13 @@ >; }; + /* + * Note that gpio_150 pulled high with internal pull to prevent wlcore + * reset on return from off mode in idle. + */ wl12xx_gpio: pinmux_wl12xx_gpio { pinctrl-single,pins = < - OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */ + OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_cts.gpio_150 */ OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */ >; }; -- cgit v1.2.3 From 2f60f258e0f533013042f624fb8af4fca165b646 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 13 Dec 2018 15:03:04 -0800 Subject: ARM: dts: Configure wlcore wakeirq for pandaboard With wlcore supporting optional wakeirqs, we can configure it for pandaboard. This makes ssh connection usable with the SoC entering deeper idle states. Note that pandaboard already has a wakeirq configured for SDIO dat1 pin although that is not currently used by wlcore. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4-panda-common.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 27895c1604b9..926f018823a4 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -485,8 +485,10 @@ wlcore: wlcore@2 { compatible = "ti,wl1271"; reg = <2>; - interrupt-parent = <&gpio2>; - interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 53 */ + /* gpio_53 with gpmc_ncs3 pad as wakeup */ + interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_RISING>, + <&omap4_pmx_core 0x3a>; + interrupt-names = "irq", "wakeup"; ref-clock-frequency = <38400000>; }; }; -- cgit v1.2.3 From 7c695e87bd7a88298d2c00b5e14cf71d0a2a8663 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 13 Dec 2018 15:03:21 -0800 Subject: ARM: dts: omap4-droid4: Configure wlcore wakeirq With wlcore supporting optional wakeirqs, we can configure it for droid 4. This makes ssh connection usable with the SoC entering deeper idle states. Let's configure a wakeirq both for the wlcore GPIO and the SDIO dat1 pin in case wlcore starts supporting SDIO dat1 interrupt at some point. And let's also add the missing keep-power-in-suspend while at it. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4-droid4-xt894.dts | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/omap4-droid4-xt894.dts b/arch/arm/boot/dts/omap4-droid4-xt894.dts index 04758a2a87f0..838aa3445fbe 100644 --- a/arch/arm/boot/dts/omap4-droid4-xt894.dts +++ b/arch/arm/boot/dts/omap4-droid4-xt894.dts @@ -359,20 +359,24 @@ &mmc3 { vmmc-supply = <&wl12xx_vmmc>; + /* uart2_tx.sdmmc3_dat1 pad as wakeirq */ interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH &omap4_pmx_core 0xde>; - + interrupt-names = "irq", "wakeup"; non-removable; bus-width = <4>; cap-power-off-card; + keep-power-in-suspend; #address-cells = <1>; #size-cells = <0>; wlcore: wlcore@2 { compatible = "ti,wl1285", "ti,wl1283"; reg = <2>; - interrupt-parent = <&gpio4>; - interrupts = <4 IRQ_TYPE_EDGE_RISING>; /* gpio100 */ + /* gpio_100 with gpmc_wait2 pad as wakeirq */ + interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>, + <&omap4_pmx_core 0x4e>; + interrupt-names = "irq", "wakeup"; ref-clock-frequency = <26000000>; tcxo-clock-frequency = <26000000>; }; -- cgit v1.2.3 From 78720aceacf0932d8475ba249535ce8e4fbbdfda Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 24 Dec 2018 09:17:45 +0100 Subject: ARM: dts: rockchip: move rk3036 i2s sound-dail-cells into soc dtsi The Rockchip i2s controller always only has one output connection hence #sound-dai-cells is always 0. Therefore define it in the soc dtsi itself instead of in individual boards. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036-kylin.dts | 1 - arch/arm/boot/dts/rk3036.dtsi | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts index 0fd19f9723df..0173eb11ec28 100644 --- a/arch/arm/boot/dts/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rk3036-kylin.dts @@ -310,7 +310,6 @@ }; &i2s { - #sound-dai-cells = <0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index d560fc4051c5..59c90863b0e7 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -289,6 +289,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&i2s_bus>; + #sound-dai-cells = <0>; status = "disabled"; }; -- cgit v1.2.3 From 5286abda83afeed717971724365245fb1f42f50d Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 29 Dec 2018 14:33:12 +0100 Subject: ARM: dts: rockchip: add HCLK_HDMI to rk3066 vio power-domain A MK808 TV stick with rk3066 processor boots normal with logo and console, but after booting the monitor remains black. This patch fixes a vblank wait time out by adding HCLK_HDMI to the vio power-domain node. The HCLK_HDMI clock is now part of the logic that enables the RK3066_PD_VIO power domain. Signed-off-by: Johan Jonker Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 30dc8af0bdcb..b6b3a77da50a 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -669,6 +669,7 @@ <&cru SCLK_CIF0>, <&cru ACLK_CIF0>, <&cru HCLK_CIF0>, + <&cru HCLK_HDMI>, <&cru ACLK_IPP>, <&cru HCLK_IPP>, <&cru ACLK_RGA>, -- cgit v1.2.3 From 95e50af34d47f7496fee72d35aaefe25e23878db Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 2 Jan 2019 20:41:02 +0100 Subject: ARM: dts: rockchip: fix cif1_pdn pin on rk3188-bqedison2qc The powerdown pin for the second camera is gpio3_b5 not b4, so fix that. We don't have a working camera setup yet, so this is not really critical, but nevertheless better to have fixed already. Fixes: 36ead9149916 ("ARM: dts: rockchip: add BQ Edison 2 QC devicetree") Reported-by: Johan Jonker Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188-bqedison2qc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rk3188-bqedison2qc.dts index a7477a09fbe8..2b5abfb48dd0 100644 --- a/arch/arm/boot/dts/rk3188-bqedison2qc.dts +++ b/arch/arm/boot/dts/rk3188-bqedison2qc.dts @@ -526,7 +526,7 @@ }; cif1_pdn: cif1-pdn { - rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; }; cif_avdd_en: cif-avdd-en { -- cgit v1.2.3 From 321514a385fa531b08f8c555e8e63fe66bfeb146 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 21 Dec 2018 17:10:12 +0100 Subject: ARM: dts: rockchip: add focaltech touchscreen to rk3188-bqedison2qc The Edison tablet uses a Focaltech touchscreen, with one speciality that the touchscreen resolution doesn't match the display resolution (1024x768 vs. 1280x600) which userspace will have to compensate for. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188-bqedison2qc.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rk3188-bqedison2qc.dts index 2b5abfb48dd0..887d1aa8d0e1 100644 --- a/arch/arm/boot/dts/rk3188-bqedison2qc.dts +++ b/arch/arm/boot/dts/rk3188-bqedison2qc.dts @@ -408,6 +408,21 @@ &i2c2 { clock-frequency = <400000>; status = "okay"; + + ft5606: touchscreen@3e { + compatible = "edt,edt-ft5506"; + reg = <0x3e>; + interrupt-parent = <&gpio1>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&tp_int &tp_rst>; + reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + touchscreen-inverted-y; + /* hw ts resolution does not match display */ + touchscreen-size-y = <1024>; + touchscreen-size-x = <768>; + touchscreen-swapped-x-y; + }; }; &i2c3 { -- cgit v1.2.3 From c09757064329392dd0569493741729903fdfb4f8 Mon Sep 17 00:00:00 2001 From: Katsuhiro Suzuki Date: Sun, 23 Dec 2018 19:05:30 +0900 Subject: arm64: dts: rockchip: add rk3328 ACODEC node This patch adds audio codec (ACODEC) node that converts to analog audio signal from I2S for rk3328. Signed-off-by: Katsuhiro Suzuki Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index ecd7f19c3542..14ea0053e408 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -672,6 +672,16 @@ }; }; + codec: codec@ff410000 { + compatible = "rockchip,rk3328-codec"; + reg = <0x0 0xff410000 0x0 0x1000>; + clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>; + clock-names = "pclk", "mclk"; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + hdmiphy: phy@ff430000 { compatible = "rockchip,rk3328-hdmi-phy"; reg = <0x0 0xff430000 0x0 0x10000>; -- cgit v1.2.3 From b78442b8a2e96f63a3b5a59f62ea58f23bf67b84 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 24 Dec 2018 07:06:29 +0100 Subject: arm64: dts: rockchip: move rk3328 #sound-dai-cells to the soc dtsi The rk3328 i2s and spdif controllers only ever have one output connection, so as with all implementations of the rk3066 i2s controllers we can keep the #sound-dai-cells in the main dtsi instead of having it repeated in each board. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 1 - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts index bd937d68ca3b..2dc0fad9efa7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts @@ -290,7 +290,6 @@ &spdif { pinctrl-0 = <&spdifm0_tx>; status = "okay"; - #sound-dai-cells = <0>; spdif_p0: port { spdif_p0_0: endpoint { diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 14ea0053e408..81cc3c996e2a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -184,6 +184,7 @@ clock-names = "i2s_clk", "i2s_hclk"; dmas = <&dmac 11>, <&dmac 12>; dma-names = "tx", "rx"; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -195,6 +196,7 @@ clock-names = "i2s_clk", "i2s_hclk"; dmas = <&dmac 14>, <&dmac 15>; dma-names = "tx", "rx"; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -206,6 +208,7 @@ clock-names = "i2s_clk", "i2s_hclk"; dmas = <&dmac 0>, <&dmac 1>; dma-names = "tx", "rx"; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -219,6 +222,7 @@ dma-names = "tx"; pinctrl-names = "default"; pinctrl-0 = <&spdifm2_tx>; + #sound-dai-cells = <0>; status = "disabled"; }; -- cgit v1.2.3 From 87bf7c7fb9fe60d3fbb50a4ea4f46d24606fd626 Mon Sep 17 00:00:00 2001 From: Katsuhiro Suzuki Date: Sun, 23 Dec 2018 19:10:26 +0900 Subject: arm64: dts: rockchip: enable analog audio node for rock64 The Rock64 boards has analog audio jack on it. RK3328 can output analog audio signal using I2S1 and ACODEC core. This patch adds sound node for analog audio for Rock64. Signed-off-by: Katsuhiro Suzuki Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts index 2dc0fad9efa7..77db0dec2fdb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts @@ -66,7 +66,8 @@ sound { compatible = "audio-graph-card"; label = "rockchip,rk3328"; - dais = <&spdif_p0>; + dais = <&i2s1_p0 + &spdif_p0>; }; spdif-dit { @@ -81,6 +82,16 @@ }; }; +&codec { + status = "okay"; + + port@0 { + codec_p0_0: endpoint { + remote-endpoint = <&i2s1_p0_0>; + }; + }; +}; + &cpu0 { cpu-supply = <&vdd_arm>; }; @@ -243,6 +254,18 @@ }; }; +&i2s1 { + status = "okay"; + + i2s1_p0: port { + i2s1_p0_0: endpoint { + dai-format = "i2s"; + mclk-fs = <256>; + remote-endpoint = <&codec_p0_0>; + }; + }; +}; + &io_domains { status = "okay"; -- cgit v1.2.3 From 34a97fcc71c26f492682e839a812e6e44da48cf7 Mon Sep 17 00:00:00 2001 From: Harald Geyer Date: Wed, 19 Dec 2018 15:40:17 +0000 Subject: arm64: dts: allwinner: a64: Add PMU node This is necessary to use 'perf' for cache profiling etc. Tested on Teres I Laptop. Signed-off-by: Harald Geyer Signed-off-by: Maxime Ripard --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 837a03dee875..bf9b719481c4 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -142,6 +142,15 @@ clock-output-names = "ext-osc32k"; }; + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + psci { compatible = "arm,psci-0.2"; method = "smc"; -- cgit v1.2.3 From 7e345d25c796abc8561786baaf59f30bc082ef1f Mon Sep 17 00:00:00 2001 From: Harald Geyer Date: Sun, 16 Dec 2018 09:25:24 +0000 Subject: ARM: dts: sun4i-a10: Add PMU node This is necessary to use 'perf' for cache profiling etc. Tested on cubieboard with 'perf stat echo foo'. Signed-off-by: Harald Geyer Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 5d46bb0139fa..a2fb473cbb9d 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -184,6 +184,11 @@ status = "disabled"; }; + pmu { + compatible = "arm,cortex-a8-pmu"; + interrupts = <3>; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; -- cgit v1.2.3 From 09c6572290f018d73ec2e812e28bada34d41815f Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 6 Dec 2018 15:02:04 +0100 Subject: ARM: dts: sun7i: bananapi: Add GPIO banks regulators The bananapi has all its bank regulators tied to the 3v3 static regulator. Make sure it's properly represented. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts index 556b1b591c5d..81bc85d398c1 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts @@ -191,6 +191,11 @@ }; &pio { + vcc-pa-supply = <®_vcc3v3>; + vcc-pc-supply = <®_vcc3v3>; + vcc-pe-supply = <®_vcc3v3>; + vcc-pf-supply = <®_vcc3v3>; + vcc-pg-supply = <®_vcc3v3>; gpio-line-names = /* PA */ "ERXD3", "ERXD2", "ERXD1", "ERXD0", "ETXD3", -- cgit v1.2.3 From 7aa69a47ecedb5368d862d0d8a2d6537b48e5501 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 3 Dec 2018 16:12:41 +0100 Subject: ARM: dts: stout: Convert to new LVDS DT bindings As of commit 6d2ca85279becdff ("dt-bindings: display: renesas: Deprecate LVDS support in the DU bindings"), the internal LVDS encoder has DT bindings separate from the DU. The Lager device tree was ported over to the new model, but the Stout device tree was forgotten. Fixes: 15a1ff30d8f9bd83 ("ARM: dts: r8a7790: Convert to new LVDS DT bindings") Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Tested-by: Marek Vasut Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-stout.dts | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790-stout.dts b/arch/arm/boot/dts/r8a7790-stout.dts index 629da4cee1b9..7a7d3b84d1a6 100644 --- a/arch/arm/boot/dts/r8a7790-stout.dts +++ b/arch/arm/boot/dts/r8a7790-stout.dts @@ -94,9 +94,8 @@ status = "okay"; clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>, - <&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>, <&osc1_clk>; - clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1", "dclkin.0"; + clock-names = "du.0", "du.1", "du.2", "dclkin.0"; ports { port@0 { @@ -104,11 +103,21 @@ remote-endpoint = <&adv7511_in>; }; }; + }; +}; + +&lvds0 { + ports { port@1 { lvds_connector0: endpoint { }; }; - port@2 { + }; +}; + +&lvds1 { + ports { + port@1 { lvds_connector1: endpoint { }; }; -- cgit v1.2.3 From 55327bff832c9903a9133cdad56783b54bd8596a Mon Sep 17 00:00:00 2001 From: Biju Das Date: Fri, 7 Dec 2018 11:27:46 +0000 Subject: ARM: dts: iwg23s-sbc: Enable RTC Enable NXP pcf85263 real time clock for the iWave SBC based on RZ/G1C. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 40b7f98d6013..77d18242ef59 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -84,12 +84,30 @@ clock-frequency = <20000000>; }; +&i2c3 { + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + rtc@51 { + compatible = "nxp,pcf85263"; + reg = <0x51>; + }; +}; + &pfc { avb_pins: avb { groups = "avb_mdio", "avb_gmii_tx_rx"; function = "avb"; }; + i2c3_pins: i2c3 { + groups = "i2c3_c"; + function = "i2c3"; + }; + mmc_pins_uhs: mmc_uhs { groups = "mmc_data8", "mmc_ctrl"; function = "mmc"; -- cgit v1.2.3 From 35713c782ef7c715eb0bc2f43d9f31cc7ec08063 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 5 Dec 2018 09:06:55 +0000 Subject: ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes This patch fixes sorting of vsp and msiof nodes. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7744.dtsi | 150 ++++++++++++++++++++--------------------- 1 file changed, 75 insertions(+), 75 deletions(-) diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index 04148d608fc4..8d25a0a0594a 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -998,6 +998,54 @@ status = "disabled"; }; + msiof0: spi@e6e20000 { + compatible = "renesas,msiof-r8a7744", + "renesas,rcar-gen2-msiof"; + reg = <0 0xe6e20000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 000>; + dmas = <&dmac0 0x51>, <&dmac0 0x52>, + <&dmac1 0x51>, <&dmac1 0x52>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&cpg 000>; + status = "disabled"; + }; + + msiof1: spi@e6e10000 { + compatible = "renesas,msiof-r8a7744", + "renesas,rcar-gen2-msiof"; + reg = <0 0xe6e10000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 208>; + dmas = <&dmac0 0x55>, <&dmac0 0x56>, + <&dmac1 0x55>, <&dmac1 0x56>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&cpg 208>; + status = "disabled"; + }; + + msiof2: spi@e6e00000 { + compatible = "renesas,msiof-r8a7744", + "renesas,rcar-gen2-msiof"; + reg = <0 0xe6e00000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 205>; + dmas = <&dmac0 0x41>, <&dmac0 0x42>, + <&dmac1 0x41>, <&dmac1 0x42>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&cpg 205>; + status = "disabled"; + }; + pwm0: pwm@e6e30000 { compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; reg = <0 0xe6e30000 0 0x8>; @@ -1068,54 +1116,6 @@ status = "disabled"; }; - msiof0: spi@e6e20000 { - compatible = "renesas,msiof-r8a7744", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e20000 0 0x0064>; - interrupts = ; - clocks = <&cpg CPG_MOD 000>; - dmas = <&dmac0 0x51>, <&dmac0 0x52>, - <&dmac1 0x51>, <&dmac1 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; - #address-cells = <1>; - #size-cells = <0>; - resets = <&cpg 000>; - status = "disabled"; - }; - - msiof1: spi@e6e10000 { - compatible = "renesas,msiof-r8a7744", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e10000 0 0x0064>; - interrupts = ; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x55>, <&dmac0 0x56>, - <&dmac1 0x55>, <&dmac1 0x56>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; - #address-cells = <1>; - #size-cells = <0>; - resets = <&cpg 208>; - status = "disabled"; - }; - - msiof2: spi@e6e00000 { - compatible = "renesas,msiof-r8a7744", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e00000 0 0x0064>; - interrupts = ; - clocks = <&cpg CPG_MOD 205>; - dmas = <&dmac0 0x41>, <&dmac0 0x42>, - <&dmac1 0x41>, <&dmac1 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; - #address-cells = <1>; - #size-cells = <0>; - resets = <&cpg 205>; - status = "disabled"; - }; - can0: can@e6e80000 { compatible = "renesas,can-r8a7744", "renesas,rcar-gen2-can"; @@ -1589,33 +1589,6 @@ resets = <&cpg 408>; }; - vsp@fe928000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe928000 0 0x8000>; - interrupts = ; - clocks = <&cpg CPG_MOD 131>; - power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; - resets = <&cpg 131>; - }; - - vsp@fe930000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe930000 0 0x8000>; - interrupts = ; - clocks = <&cpg CPG_MOD 128>; - power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; - resets = <&cpg 128>; - }; - - vsp@fe938000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe938000 0 0x8000>; - interrupts = ; - clocks = <&cpg CPG_MOD 127>; - power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; - resets = <&cpg 127>; - }; - pciec: pcie@fe000000 { compatible = "renesas,pcie-r8a7744", "renesas,pcie-rcar-gen2"; @@ -1644,6 +1617,33 @@ status = "disabled"; }; + vsp@fe928000 { + compatible = "renesas,vsp1"; + reg = <0 0xfe928000 0 0x8000>; + interrupts = ; + clocks = <&cpg CPG_MOD 131>; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 131>; + }; + + vsp@fe930000 { + compatible = "renesas,vsp1"; + reg = <0 0xfe930000 0 0x8000>; + interrupts = ; + clocks = <&cpg CPG_MOD 128>; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 128>; + }; + + vsp@fe938000 { + compatible = "renesas,vsp1"; + reg = <0 0xfe938000 0 0x8000>; + interrupts = ; + clocks = <&cpg CPG_MOD 127>; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 127>; + }; + du: display@feb00000 { reg = <0 0xfeb00000 0 0x40000>, <0 0xfeb90000 0 0x1c>; -- cgit v1.2.3 From 072b817589b17660ef19c31d89f7b981dbed3fd2 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 10 Dec 2018 11:57:57 +0000 Subject: ARM: dts: r8a7743: Remove generic compatible string from iic3 The iic3 block on RZ/G1M does not support automatic transmission, unlike other R-Car SoC's. So dropping the compatibility with the generic version. Fixes: f523405f2a22cc0c307 ("ARM: dts: r8a7743: Add IIC cores to dtsi") Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 3cc33f7ff7fe..169fddc33229 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -564,9 +564,7 @@ /* doesn't need pinmux */ #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,iic-r8a7743", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a7743"; reg = <0 0xe60b0000 0 0x425>; interrupts = ; clocks = <&cpg CPG_MOD 926>; -- cgit v1.2.3 From aeefe7394ca9a77b264963beaba01b4e85a9142c Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 10 Dec 2018 12:07:03 +0000 Subject: ARM: dts: r8a7743: Remove aliases from SoC dtsi This patch removes aliases from SoC dtsi tree. Device aliases are board-specific, if needed define it in board dts rather than SoC dtsi. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 169fddc33229..19e96e2e2e55 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -15,25 +15,6 @@ #address-cells = <2>; #size-cells = <2>; - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &iic0; - i2c7 = &iic1; - i2c8 = &iic3; - spi0 = &qspi; - spi1 = &msiof0; - spi2 = &msiof1; - spi3 = &msiof2; - vin0 = &vin0; - vin1 = &vin1; - vin2 = &vin2; - }; - /* * The external audio clocks are configured as 0 Hz fixed frequency * clocks by default. -- cgit v1.2.3 From 383f6024981d32425fa453bf2e66b546fdbc1314 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 10 Dec 2018 11:52:30 +0000 Subject: ARM: dts: r8a7743: Fix sorting of rwdt node Watchdog node is incorrectly placed on r8a7743 SoC dtsi. This patch fixes the sorting order. Fixes: b5beb5d4c81c358f50a8310108 ("ARM: dts: r8a7743: Add watchdog support to SoC dtsi") Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 19e96e2e2e55..24e6c2b67473 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -135,6 +135,16 @@ #size-cells = <2>; ranges; + rwdt: watchdog@e6020000 { + compatible = "renesas,r8a7743-wdt", + "renesas,rcar-gen2-wdt"; + reg = <0 0xe6020000 0 0x0c>; + clocks = <&cpg CPG_MOD 402>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 402>; + status = "disabled"; + }; + gpio0: gpio@e6050000 { compatible = "renesas,gpio-r8a7743", "renesas,rcar-gen2-gpio"; @@ -291,16 +301,6 @@ reg = <0 0xe6160000 0 0x100>; }; - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a7743-wdt", - "renesas,rcar-gen2-wdt"; - reg = <0 0xe6020000 0 0x0c>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - sysc: system-controller@e6180000 { compatible = "renesas,r8a7743-sysc"; reg = <0 0xe6180000 0 0x200>; -- cgit v1.2.3 From 9d16c4a10e072e6dd5ec526cd45b37ee7dca06c3 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 16 Dec 2018 13:47:44 +0200 Subject: arm64: dts: renesas: r8a77990: ebisu: Add backlight Add the backlight device for the LVDS1 output, in preparation for panel support. Signed-off-by: Laurent Pinchart Reviewed-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts index 62bdddcbbae7..24beb0e22cb0 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts @@ -39,6 +39,16 @@ clock-frequency = <11289600>; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm3 0 50000>; + + brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>; + default-brightness-level = <10>; + + power-supply = <®_12p0v>; + }; + cvbs-in { compatible = "composite-video-connector"; label = "CVBS IN"; @@ -184,6 +194,15 @@ clock-frequency = <24576000>; }; + reg_12p0v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "D12.0V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-boot-on; + regulator-always-on; + }; + x13_clk: x13 { compatible = "fixed-clock"; #clock-cells = <0>; -- cgit v1.2.3 From a06ad4385f180b476ceca811a60ba00f3f65c12e Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 16 Dec 2018 13:32:17 +0200 Subject: arm64: dts: renesas: r8a77995: draak: Set better backlight levels The backlight levels provided in the Draak DT produce a perceived brightness very biased towards high brightness. Use better brightness levels based on the CIE 1931 formula. Signed-off-by: Laurent Pinchart Reviewed-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index 89df9bc844c0..db2bed1751b8 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -28,8 +28,8 @@ compatible = "pwm-backlight"; pwms = <&pwm1 0 50000>; - brightness-levels = <256 128 64 16 8 4 0>; - default-brightness-level = <6>; + brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>; + default-brightness-level = <10>; power-supply = <®_12p0v>; enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>; -- cgit v1.2.3 From 12749350567c819d8a35a405743313bd869c95c0 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 5 Dec 2018 11:44:19 -0800 Subject: dt-bindings: arm: Convert Renesas board/soc bindings to json-schema Convert Renesas SoC bindings to DT schema format using json-schema. v2.1 [Simon Horman] - rebased on renesas-devel-20181204-v4.20-rc5 + Added r8a7744 development platform and SoM + Correct RZ/G2E part number - Update MAINTAINERS Signed-off-by: Rob Herring Signed-off-by: Simon Horman --- Documentation/devicetree/bindings/arm/renesas.yaml | 228 +++++++++++++++++++++ Documentation/devicetree/bindings/arm/shmobile.txt | 155 -------------- MAINTAINERS | 4 +- 3 files changed, 230 insertions(+), 157 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/renesas.yaml delete mode 100644 Documentation/devicetree/bindings/arm/shmobile.txt diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml new file mode 100644 index 000000000000..5e9d4864a600 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -0,0 +1,228 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/shmobile.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings + +maintainers: + - Geert Uytterhoeven + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Emma Mobile EV2 + items: + - enum: + - renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual + - const: renesas,emev2 + + - description: RZ/A1H (R7S72100) + items: + - enum: + - renesas,genmai # Genmai (RTK772100BC00000BR) + - renesas,gr-peach # GR-Peach (X28A-M01-E/F) + - renesas,rskrza1 # RSKRZA1 (YR0K77210C000BE) + - const: renesas,r7s72100 + + - description: RZ/A2 (R7S9210) + items: + - const: renesas,r7s9210 + + - description: SH-Mobile AG5 (R8A73A00/SH73A0) + items: + - enum: + - renesas,kzm9g # Kyoto Microcomputer Co. KZM-A9-GT + - const: renesas,sh73a0 + + - description: R-Mobile APE6 (R8A73A40) + items: + - enum: + - renesas,ape6evm + - const: renesas,r8a73a4 + + - description: R-Mobile A1 (R8A77400) + items: + - enum: + - renesas,armadillo800eva # Atmark Techno Armadillo-800 EVA + - const: renesas,r8a7740 + + - description: RZ/G1H (R8A77420) + items: + - const: renesas,r8a7742 + + - description: RZ/G1M (R8A77430) + items: + - enum: + # iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven) + - iwave,g20d + - const: iwave,g20m + - const: renesas,r8a7743 + + - items: + - enum: + # iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven) + - iwave,g20m + - renesas,sk-rzg1m # SK-RZG1M (YR8A77430S000BE) + - const: renesas,r8a7743 + + - description: RZ/G1N (R8A77440) + items: + - enum: + # iWave Systems RZ/G1N Qseven Development Platform (iW-RainboW-G20D-Qseven) + - iwave,g20d + - const: iwave,g20m + - const: renesas,r8a7744 + + - items: + - enum: + # iWave Systems RZ/G1N Qseven System On Module (iW-RainboW-G20M-Qseven) + - iwave,g20m + - const: renesas,r8a7744 + + - description: RZ/G1E (R8A77450) + items: + - enum: + - iwave,g22m # iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) + - renesas,sk-rzg1e # SK-RZG1E (YR8A77450S000BE) + - const: renesas,r8a7745 + + - description: iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D) + items: + - const: iwave,g22d + - const: iwave,g22m + - const: renesas,r8a7745 + + - description: RZ/G1C (R8A77470) + items: + - enum: + - iwave,g23s #iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S) + - const: renesas,r8a77470 + + - description: RZ/G2M (R8A774A1) + items: + - const: renesas,r8a774a1 + + - description: RZ/G2E (R8A774C0) + items: + - const: renesas,r8a774c0 + + - description: R-Car M1A (R8A77781) + items: + - enum: + - renesas,bockw + - const: renesas,r8a7778 + + - description: R-Car H1 (R8A77790) + items: + - enum: + - renesas,marzen # Marzen (R0P7779A00010S) + - renesas,stout # Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD) + - const: renesas,r8a7779 + + - description: R-Car H2 (R8A77900) + items: + - enum: + - renesas,lager # Lager (RTP0RC7790SEB00010S) + - const: renesas,r8a7790 + + - description: R-Car M2-W (R8A77910) + items: + - enum: + - renesas,henninger + - renesas,koelsch # Koelsch (RTP0RC7791SEB00010S) + - renesas,porter # Porter (M2-LCDP) + - const: renesas,r8a7791 + + - description: R-Car V2H (R8A77920) + items: + - enum: + - renesas,blanche # Blanche (RTP0RC7792SEB00010S) + - renesas,wheat # Wheat (RTP0RC7792ASKB0000JE) + - const: renesas,r8a7792 + + - description: R-Car M2-N (R8A77930) + items: + - enum: + - renesas,gose # Gose (RTP0RC7793SEB00010S) + - const: renesas,r8a7793 + + - description: R-Car E2 (R8A77940) + items: + - enum: + - renesas,alt # Alt (RTP0RC7794SEB00010S) + - renesas,silk # SILK (RTP0RC7794LCB00011S) + - const: renesas,r8a7794 + + - description: R-Car H3 (R8A77950) + items: + - enum: + # H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1)) + # H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0)) + - renesas,h3ulcb + - renesas,salvator-x # Salvator-X (RTP0RC7795SIPB0010S) + - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S) + - const: renesas,r8a7795 + + - description: R-Car M3-W (R8A77960) + items: + - enum: + - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0)) + - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S) + - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S) + - const: renesas,r8a7796 + + - description: Kingfisher (SBEV-RCAR-KF-M03) + items: + - const: shimafuji,kingfisher + - enum: + - renesas,h3ulcb + - renesas,m3ulcb + - enum: + - renesas,r8a7795 + - renesas,r8a7796 + + - description: R-Car M3-N (R8A77965) + items: + - enum: + - renesas,m3nulcb # M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1)) + - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S (M3-N)) + - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S) + - const: renesas,r8a77965 + + - description: R-Car V3M (R8A77970) + items: + - enum: + - renesas,eagle # Eagle (RTP0RC77970SEB0010S) + - renesas,v3msk # V3MSK (Y-ASK-RCAR-V3M-WS10) + - const: renesas,r8a77970 + + - description: R-Car V3H (R8A77980) + items: + - enum: + - renesas,condor # Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01) + - renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10) + - const: renesas,r8a77980 + + - description: R-Car E3 (R8A77990) + items: + - enum: + - renesas,ebisu # Ebisu (RTP0RC77990SEB0010S) + - const: renesas,r8a77990 + + - description: R-Car D3 (R8A77995) + items: + - enum: + - renesas,draak # Draak (RTP0RC77995SEB0010S) + - const: renesas,r8a77995 + + - description: RZ/N1D (R9A06G032) + items: + - enum: + - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) + - const: renesas,r9a06g032 + +... diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt deleted file mode 100644 index 7f91c2a8b54e..000000000000 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ /dev/null @@ -1,155 +0,0 @@ -Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings --------------------------------------------------------------------- - -SoCs: - - - Emma Mobile EV2 - compatible = "renesas,emev2" - - RZ/A1H (R7S72100) - compatible = "renesas,r7s72100" - - RZ/A2 (R7S9210) - compatible = "renesas,r7s9210" - - SH-Mobile AG5 (R8A73A00/SH73A0) - compatible = "renesas,sh73a0" - - R-Mobile APE6 (R8A73A40) - compatible = "renesas,r8a73a4" - - R-Mobile A1 (R8A77400) - compatible = "renesas,r8a7740" - - RZ/G1H (R8A77420) - compatible = "renesas,r8a7742" - - RZ/G1M (R8A77430) - compatible = "renesas,r8a7743" - - RZ/G1N (R8A77440) - compatible = "renesas,r8a7744" - - RZ/G1E (R8A77450) - compatible = "renesas,r8a7745" - - RZ/G1C (R8A77470) - compatible = "renesas,r8a77470" - - RZ/G2M (R8A774A1) - compatible = "renesas,r8a774a1" - - RZ/G2E (R8A774C0) - compatible = "renesas,r8a774c0" - - R-Car M1A (R8A77781) - compatible = "renesas,r8a7778" - - R-Car H1 (R8A77790) - compatible = "renesas,r8a7779" - - R-Car H2 (R8A77900) - compatible = "renesas,r8a7790" - - R-Car M2-W (R8A77910) - compatible = "renesas,r8a7791" - - R-Car V2H (R8A77920) - compatible = "renesas,r8a7792" - - R-Car M2-N (R8A77930) - compatible = "renesas,r8a7793" - - R-Car E2 (R8A77940) - compatible = "renesas,r8a7794" - - R-Car H3 (R8A77950) - compatible = "renesas,r8a7795" - - R-Car M3-W (R8A77960) - compatible = "renesas,r8a7796" - - R-Car M3-N (R8A77965) - compatible = "renesas,r8a77965" - - R-Car V3M (R8A77970) - compatible = "renesas,r8a77970" - - R-Car V3H (R8A77980) - compatible = "renesas,r8a77980" - - R-Car E3 (R8A77990) - compatible = "renesas,r8a77990" - - R-Car D3 (R8A77995) - compatible = "renesas,r8a77995" - - RZ/N1D (R9A06G032) - compatible = "renesas,r9a06g032" - -Boards: - - - Alt (RTP0RC7794SEB00010S) - compatible = "renesas,alt", "renesas,r8a7794" - - APE6-EVM - compatible = "renesas,ape6evm", "renesas,r8a73a4" - - Atmark Techno Armadillo-800 EVA - compatible = "renesas,armadillo800eva", "renesas,r8a7740" - - Blanche (RTP0RC7792SEB00010S) - compatible = "renesas,blanche", "renesas,r8a7792" - - BOCK-W - compatible = "renesas,bockw", "renesas,r8a7778" - - Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01) - compatible = "renesas,condor", "renesas,r8a77980" - - Draak (RTP0RC77995SEB0010S) - compatible = "renesas,draak", "renesas,r8a77995" - - Eagle (RTP0RC77970SEB0010S) - compatible = "renesas,eagle", "renesas,r8a77970" - - Ebisu (RTP0RC77990SEB0010S) - compatible = "renesas,ebisu", "renesas,r8a77990" - - Genmai (RTK772100BC00000BR) - compatible = "renesas,genmai", "renesas,r7s72100" - - GR-Peach (X28A-M01-E/F) - compatible = "renesas,gr-peach", "renesas,r7s72100" - - Gose (RTP0RC7793SEB00010S) - compatible = "renesas,gose", "renesas,r8a7793" - - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1)) - H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0)) - compatible = "renesas,h3ulcb", "renesas,r8a7795" - - Henninger - compatible = "renesas,henninger", "renesas,r8a7791" - - iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S) - compatible = "iwave,g23s", "renesas,r8a77470" - - iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D) - compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745" - - iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) - compatible = "iwave,g22m", "renesas,r8a7745" - - iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven) - compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743" - - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven) - compatible = "iwave,g20m", "renesas,r8a7743" - - iWave Systems RZ/G1N Qseven Development Platform (iW-RainboW-G20D-Qseven) - compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7744" - - iWave Systems RZ/G1N Qseven System On Module (iW-RainboW-G20M-Qseven) - compatible = "iwave,g20m", "renesas,r8a7744" - - Kingfisher (SBEV-RCAR-KF-M03) - compatible = "shimafuji,kingfisher" - - Koelsch (RTP0RC7791SEB00010S) - compatible = "renesas,koelsch", "renesas,r8a7791" - - Kyoto Microcomputer Co. KZM-A9-Dual - compatible = "renesas,kzm9d", "renesas,emev2" - - Kyoto Microcomputer Co. KZM-A9-GT - compatible = "renesas,kzm9g", "renesas,sh73a0" - - Lager (RTP0RC7790SEB00010S) - compatible = "renesas,lager", "renesas,r8a7790" - - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0)) - compatible = "renesas,m3ulcb", "renesas,r8a7796" - - M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1)) - compatible = "renesas,m3nulcb", "renesas,r8a77965" - - Marzen (R0P7779A00010S) - compatible = "renesas,marzen", "renesas,r8a7779" - - Porter (M2-LCDP) - compatible = "renesas,porter", "renesas,r8a7791" - - RSKRZA1 (YR0K77210C000BE) - compatible = "renesas,rskrza1", "renesas,r7s72100" - - RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) - compatible = "renesas,rzn1d400-db", "renesas,r9a06g032" - - Salvator-X (RTP0RC7795SIPB0010S) - compatible = "renesas,salvator-x", "renesas,r8a7795" - - Salvator-X (RTP0RC7796SIPB0011S) - compatible = "renesas,salvator-x", "renesas,r8a7796" - - Salvator-X (RTP0RC7796SIPB0011S (M3-N)) - compatible = "renesas,salvator-x", "renesas,r8a77965" - - Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S) - compatible = "renesas,salvator-xs", "renesas,r8a7795" - - Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S) - compatible = "renesas,salvator-xs", "renesas,r8a7796" - - Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S) - compatible = "renesas,salvator-xs", "renesas,r8a77965" - - SILK (RTP0RC7794LCB00011S) - compatible = "renesas,silk", "renesas,r8a7794" - - SK-RZG1E (YR8A77450S000BE) - compatible = "renesas,sk-rzg1e", "renesas,r8a7745" - - SK-RZG1M (YR8A77430S000BE) - compatible = "renesas,sk-rzg1m", "renesas,r8a7743" - - Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD) - compatible = "renesas,stout", "renesas,r8a7790" - - V3HSK (Y-ASK-RCAR-V3H-WS10) - compatible = "renesas,v3hsk", "renesas,r8a77980" - - V3MSK (Y-ASK-RCAR-V3M-WS10) - compatible = "renesas,v3msk", "renesas,r8a77970" - - Wheat (RTP0RC7792ASKB0000JE) - compatible = "renesas,wheat", "renesas,r8a7792" diff --git a/MAINTAINERS b/MAINTAINERS index 32d444476a90..df275b4174dc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1997,7 +1997,7 @@ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next S: Supported F: arch/arm64/boot/dts/renesas/ -F: Documentation/devicetree/bindings/arm/shmobile.txt +F: Documentation/devicetree/bindings/arm/renesas.yaml F: drivers/soc/renesas/ F: include/linux/soc/renesas/ @@ -2116,7 +2116,7 @@ F: arch/arm/boot/dts/sh* F: arch/arm/configs/shmobile_defconfig F: arch/arm/include/debug/renesas-scif.S F: arch/arm/mach-shmobile/ -F: Documentation/devicetree/bindings/arm/shmobile.txt +F: Documentation/devicetree/bindings/arm/renesas.yaml F: drivers/soc/renesas/ F: include/linux/soc/renesas/ -- cgit v1.2.3 From ae3f46c8271ba735087ca9251095606788cb4be9 Mon Sep 17 00:00:00 2001 From: Thor Thayer Date: Fri, 4 Jan 2019 13:23:46 -0600 Subject: arm64: dts: stratix10: Add Stratix10 SMMU support Now there are device tree clocks for the ARM64 SMMU, add SMMU support to the Stratix10 Device Tree which includes adding the SMMU node and adding IOMMU stream ids to the SMMU peripherals. Signed-off-by: Thor Thayer Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index b2c9bb664595..e3f5eaa3657d 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -161,6 +161,7 @@ tx-fifo-depth = <16384>; rx-fifo-depth = <16384>; snps,multicast-filter-bins = <256>; + iommus = <&smmu 1>; status = "disabled"; }; @@ -177,6 +178,7 @@ tx-fifo-depth = <16384>; rx-fifo-depth = <16384>; snps,multicast-filter-bins