From 7160fc13e36f2321bf89d05264fd5d97dddf78d3 Mon Sep 17 00:00:00 2001 From: Bob Liu Date: Sat, 25 Sep 2010 10:32:38 +0000 Subject: bfin_sport: add support for ADC/DAC. In order to support ADC/DAC demo, add NDSO_MODE mode to bfin_sport.c. After that userspace apps like ndso/awg can work fine. Signed-off-by: Bob Liu --- arch/blackfin/include/asm/bfin_sport.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h index f8568a31d0ab..0afcfbd54a82 100644 --- a/arch/blackfin/include/asm/bfin_sport.h +++ b/arch/blackfin/include/asm/bfin_sport.h @@ -13,6 +13,7 @@ #define NORM_MODE 0x0 #define TDM_MODE 0x1 #define I2S_MODE 0x2 +#define NDSO_MODE 0x3 /* Data format, normal, a-law or u-law */ #define NORM_FORMAT 0x0 @@ -56,6 +57,8 @@ struct sport_config { /* Userspace interface */ #define SPORT_IOC_MAGIC 'P' #define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config) +#define SPORT_IOC_GET_SYSTEMCLOCK _IOR('P', 0x02, unsigned long) +#define SPORT_IOC_SET_BAUDRATE _IOW('P', 0x03, unsigned long) #ifdef __KERNEL__ -- cgit v1.2.3 From c72df808d6a89f859ae37b9490af04f3dddcd40e Mon Sep 17 00:00:00 2001 From: Steven Miao Date: Tue, 11 Jan 2011 09:18:48 +0000 Subject: BF561 MDMA : fixed BF561 DMA MMRs definition mismatch MDMA io base defined in arch/blackfin/mach-bf561/dma.c do not match the definition of MDMA MMRs in arch/blackfin/mach-bf561/include/mach/defBF561.h Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/mach-bf561/include/mach/defBF561.h | 220 +++++++++++------------ 1 file changed, 110 insertions(+), 110 deletions(-) diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h index 71e805ea74e5..7d712aeb5267 100644 --- a/arch/blackfin/mach-bf561/include/mach/defBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h @@ -479,61 +479,61 @@ #define DMA1_11_PERIPHERAL_MAP 0xFFC01EEC /* DMA1 Channel 11 Peripheral Map Register */ /* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */ -#define MDMA_D2_CONFIG 0xFFC01F08 /*MemDMA1 Stream 0 Destination Configuration */ -#define MDMA_D2_NEXT_DESC_PTR 0xFFC01F00 /*MemDMA1 Stream 0 Destination Next Descriptor Ptr Reg */ -#define MDMA_D2_START_ADDR 0xFFC01F04 /*MemDMA1 Stream 0 Destination Start Address */ -#define MDMA_D2_X_COUNT 0xFFC01F10 /*MemDMA1 Stream 0 Destination Inner-Loop Count */ -#define MDMA_D2_Y_COUNT 0xFFC01F18 /*MemDMA1 Stream 0 Destination Outer-Loop Count */ -#define MDMA_D2_X_MODIFY 0xFFC01F14 /*MemDMA1 Stream 0 Dest Inner-Loop Address-Increment */ -#define MDMA_D2_Y_MODIFY 0xFFC01F1C /*MemDMA1 Stream 0 Dest Outer-Loop Address-Increment */ -#define MDMA_D2_CURR_DESC_PTR 0xFFC01F20 /*MemDMA1 Stream 0 Dest Current Descriptor Ptr reg */ -#define MDMA_D2_CURR_ADDR 0xFFC01F24 /*MemDMA1 Stream 0 Destination Current Address */ -#define MDMA_D2_CURR_X_COUNT 0xFFC01F30 /*MemDMA1 Stream 0 Dest Current Inner-Loop Count */ -#define MDMA_D2_CURR_Y_COUNT 0xFFC01F38 /*MemDMA1 Stream 0 Dest Current Outer-Loop Count */ -#define MDMA_D2_IRQ_STATUS 0xFFC01F28 /*MemDMA1 Stream 0 Destination Interrupt/Status */ -#define MDMA_D2_PERIPHERAL_MAP 0xFFC01F2C /*MemDMA1 Stream 0 Destination Peripheral Map */ - -#define MDMA_S2_CONFIG 0xFFC01F48 /*MemDMA1 Stream 0 Source Configuration */ -#define MDMA_S2_NEXT_DESC_PTR 0xFFC01F40 /*MemDMA1 Stream 0 Source Next Descriptor Ptr Reg */ -#define MDMA_S2_START_ADDR 0xFFC01F44 /*MemDMA1 Stream 0 Source Start Address */ -#define MDMA_S2_X_COUNT 0xFFC01F50 /*MemDMA1 Stream 0 Source Inner-Loop Count */ -#define MDMA_S2_Y_COUNT 0xFFC01F58 /*MemDMA1 Stream 0 Source Outer-Loop Count */ -#define MDMA_S2_X_MODIFY 0xFFC01F54 /*MemDMA1 Stream 0 Source Inner-Loop Address-Increment */ -#define MDMA_S2_Y_MODIFY 0xFFC01F5C /*MemDMA1 Stream 0 Source Outer-Loop Address-Increment */ -#define MDMA_S2_CURR_DESC_PTR 0xFFC01F60 /*MemDMA1 Stream 0 Source Current Descriptor Ptr reg */ -#define MDMA_S2_CURR_ADDR 0xFFC01F64 /*MemDMA1 Stream 0 Source Current Address */ -#define MDMA_S2_CURR_X_COUNT 0xFFC01F70 /*MemDMA1 Stream 0 Source Current Inner-Loop Count */ -#define MDMA_S2_CURR_Y_COUNT 0xFFC01F78 /*MemDMA1 Stream 0 Source Current Outer-Loop Count */ -#define MDMA_S2_IRQ_STATUS 0xFFC01F68 /*MemDMA1 Stream 0 Source Interrupt/Status */ -#define MDMA_S2_PERIPHERAL_MAP 0xFFC01F6C /*MemDMA1 Stream 0 Source Peripheral Map */ - -#define MDMA_D3_CONFIG 0xFFC01F88 /*MemDMA1 Stream 1 Destination Configuration */ -#define MDMA_D3_NEXT_DESC_PTR 0xFFC01F80 /*MemDMA1 Stream 1 Destination Next Descriptor Ptr Reg */ -#define MDMA_D3_START_ADDR 0xFFC01F84 /*MemDMA1 Stream 1 Destination Start Address */ -#define MDMA_D3_X_COUNT 0xFFC01F90 /*MemDMA1 Stream 1 Destination Inner-Loop Count */ -#define MDMA_D3_Y_COUNT 0xFFC01F98 /*MemDMA1 Stream 1 Destination Outer-Loop Count */ -#define MDMA_D3_X_MODIFY 0xFFC01F94 /*MemDMA1 Stream 1 Dest Inner-Loop Address-Increment */ -#define MDMA_D3_Y_MODIFY 0xFFC01F9C /*MemDMA1 Stream 1 Dest Outer-Loop Address-Increment */ -#define MDMA_D3_CURR_DESC_PTR 0xFFC01FA0 /*MemDMA1 Stream 1 Dest Current Descriptor Ptr reg */ -#define MDMA_D3_CURR_ADDR 0xFFC01FA4 /*MemDMA1 Stream 1 Dest Current Address */ -#define MDMA_D3_CURR_X_COUNT 0xFFC01FB0 /*MemDMA1 Stream 1 Dest Current Inner-Loop Count */ -#define MDMA_D3_CURR_Y_COUNT 0xFFC01FB8 /*MemDMA1 Stream 1 Dest Current Outer-Loop Count */ -#define MDMA_D3_IRQ_STATUS 0xFFC01FA8 /*MemDMA1 Stream 1 Dest Interrupt/Status */ -#define MDMA_D3_PERIPHERAL_MAP 0xFFC01FAC /*MemDMA1 Stream 1 Dest Peripheral Map */ - -#define MDMA_S3_CONFIG 0xFFC01FC8 /*MemDMA1 Stream 1 Source Configuration */ -#define MDMA_S3_NEXT_DESC_PTR 0xFFC01FC0 /*MemDMA1 Stream 1 Source Next Descriptor Ptr Reg */ -#define MDMA_S3_START_ADDR 0xFFC01FC4 /*MemDMA1 Stream 1 Source Start Address */ -#define MDMA_S3_X_COUNT 0xFFC01FD0 /*MemDMA1 Stream 1 Source Inner-Loop Count */ -#define MDMA_S3_Y_COUNT 0xFFC01FD8 /*MemDMA1 Stream 1 Source Outer-Loop Count */ -#define MDMA_S3_X_MODIFY 0xFFC01FD4 /*MemDMA1 Stream 1 Source Inner-Loop Address-Increment */ -#define MDMA_S3_Y_MODIFY 0xFFC01FDC /*MemDMA1 Stream 1 Source Outer-Loop Address-Increment */ -#define MDMA_S3_CURR_DESC_PTR 0xFFC01FE0 /*MemDMA1 Stream 1 Source Current Descriptor Ptr reg */ -#define MDMA_S3_CURR_ADDR 0xFFC01FE4 /*MemDMA1 Stream 1 Source Current Address */ -#define MDMA_S3_CURR_X_COUNT 0xFFC01FF0 /*MemDMA1 Stream 1 Source Current Inner-Loop Count */ -#define MDMA_S3_CURR_Y_COUNT 0xFFC01FF8 /*MemDMA1 Stream 1 Source Current Outer-Loop Count */ -#define MDMA_S3_IRQ_STATUS 0xFFC01FE8 /*MemDMA1 Stream 1 Source Interrupt/Status */ -#define MDMA_S3_PERIPHERAL_MAP 0xFFC01FEC /*MemDMA1 Stream 1 Source Peripheral Map */ +#define MDMA_D0_CONFIG 0xFFC01F08 /*MemDMA1 Stream 0 Destination Configuration */ +#define MDMA_D0_NEXT_DESC_PTR 0xFFC01F00 /*MemDMA1 Stream 0 Destination Next Descriptor Ptr Reg */ +#define MDMA_D0_START_ADDR 0xFFC01F04 /*MemDMA1 Stream 0 Destination Start Address */ +#define MDMA_D0_X_COUNT 0xFFC01F10 /*MemDMA1 Stream 0 Destination Inner-Loop Count */ +#define MDMA_D0_Y_COUNT 0xFFC01F18 /*MemDMA1 Stream 0 Destination Outer-Loop Count */ +#define MDMA_D0_X_MODIFY 0xFFC01F14 /*MemDMA1 Stream 0 Dest Inner-Loop Address-Increment */ +#define MDMA_D0_Y_MODIFY 0xFFC01F1C /*MemDMA1 Stream 0 Dest Outer-Loop Address-Increment */ +#define MDMA_D0_CURR_DESC_PTR 0xFFC01F20 /*MemDMA1 Stream 0 Dest Current Descriptor Ptr reg */ +#define MDMA_D0_CURR_ADDR 0xFFC01F24 /*MemDMA1 Stream 0 Destination Current Address */ +#define MDMA_D0_CURR_X_COUNT 0xFFC01F30 /*MemDMA1 Stream 0 Dest Current Inner-Loop Count */ +#define MDMA_D0_CURR_Y_COUNT 0xFFC01F38 /*MemDMA1 Stream 0 Dest Current Outer-Loop Count */ +#define MDMA_D0_IRQ_STATUS 0xFFC01F28 /*MemDMA1 Stream 0 Destination Interrupt/Status */ +#define MDMA_D0_PERIPHERAL_MAP 0xFFC01F2C /*MemDMA1 Stream 0 Destination Peripheral Map */ + +#define MDMA_S0_CONFIG 0xFFC01F48 /*MemDMA1 Stream 0 Source Configuration */ +#define MDMA_S0_NEXT_DESC_PTR 0xFFC01F40 /*MemDMA1 Stream 0 Source Next Descriptor Ptr Reg */ +#define MDMA_S0_START_ADDR 0xFFC01F44 /*MemDMA1 Stream 0 Source Start Address */ +#define MDMA_S0_X_COUNT 0xFFC01F50 /*MemDMA1 Stream 0 Source Inner-Loop Count */ +#define MDMA_S0_Y_COUNT 0xFFC01F58 /*MemDMA1 Stream 0 Source Outer-Loop Count */ +#define MDMA_S0_X_MODIFY 0xFFC01F54 /*MemDMA1 Stream 0 Source Inner-Loop Address-Increment */ +#define MDMA_S0_Y_MODIFY 0xFFC01F5C /*MemDMA1 Stream 0 Source Outer-Loop Address-Increment */ +#define MDMA_S0_CURR_DESC_PTR 0xFFC01F60 /*MemDMA1 Stream 0 Source Current Descriptor Ptr reg */ +#define MDMA_S0_CURR_ADDR 0xFFC01F64 /*MemDMA1 Stream 0 Source Current Address */ +#define MDMA_S0_CURR_X_COUNT 0xFFC01F70 /*MemDMA1 Stream 0 Source Current Inner-Loop Count */ +#define MDMA_S0_CURR_Y_COUNT 0xFFC01F78 /*MemDMA1 Stream 0 Source Current Outer-Loop Count */ +#define MDMA_S0_IRQ_STATUS 0xFFC01F68 /*MemDMA1 Stream 0 Source Interrupt/Status */ +#define MDMA_S0_PERIPHERAL_MAP 0xFFC01F6C /*MemDMA1 Stream 0 Source Peripheral Map */ + +#define MDMA_D1_CONFIG 0xFFC01F88 /*MemDMA1 Stream 1 Destination Configuration */ +#define MDMA_D1_NEXT_DESC_PTR 0xFFC01F80 /*MemDMA1 Stream 1 Destination Next Descriptor Ptr Reg */ +#define MDMA_D1_START_ADDR 0xFFC01F84 /*MemDMA1 Stream 1 Destination Start Address */ +#define MDMA_D1_X_COUNT 0xFFC01F90 /*MemDMA1 Stream 1 Destination Inner-Loop Count */ +#define MDMA_D1_Y_COUNT 0xFFC01F98 /*MemDMA1 Stream 1 Destination Outer-Loop Count */ +#define MDMA_D1_X_MODIFY 0xFFC01F94 /*MemDMA1 Stream 1 Dest Inner-Loop Address-Increment */ +#define MDMA_D1_Y_MODIFY 0xFFC01F9C /*MemDMA1 Stream 1 Dest Outer-Loop Address-Increment */ +#define MDMA_D1_CURR_DESC_PTR 0xFFC01FA0 /*MemDMA1 Stream 1 Dest Current Descriptor Ptr reg */ +#define MDMA_D1_CURR_ADDR 0xFFC01FA4 /*MemDMA1 Stream 1 Dest Current Address */ +#define MDMA_D1_CURR_X_COUNT 0xFFC01FB0 /*MemDMA1 Stream 1 Dest Current Inner-Loop Count */ +#define MDMA_D1_CURR_Y_COUNT 0xFFC01FB8 /*MemDMA1 Stream 1 Dest Current Outer-Loop Count */ +#define MDMA_D1_IRQ_STATUS 0xFFC01FA8 /*MemDMA1 Stream 1 Dest Interrupt/Status */ +#define MDMA_D1_PERIPHERAL_MAP 0xFFC01FAC /*MemDMA1 Stream 1 Dest Peripheral Map */ + +#define MDMA_S1_CONFIG 0xFFC01FC8 /*MemDMA1 Stream 1 Source Configuration */ +#define MDMA_S1_NEXT_DESC_PTR 0xFFC01FC0 /*MemDMA1 Stream 1 Source Next Descriptor Ptr Reg */ +#define MDMA_S1_START_ADDR 0xFFC01FC4 /*MemDMA1 Stream 1 Source Start Address */ +#define MDMA_S1_X_COUNT 0xFFC01FD0 /*MemDMA1 Stream 1 Source Inner-Loop Count */ +#define MDMA_S1_Y_COUNT 0xFFC01FD8 /*MemDMA1 Stream 1 Source Outer-Loop Count */ +#define MDMA_S1_X_MODIFY 0xFFC01FD4 /*MemDMA1 Stream 1 Source Inner-Loop Address-Increment */ +#define MDMA_S1_Y_MODIFY 0xFFC01FDC /*MemDMA1 Stream 1 Source Outer-Loop Address-Increment */ +#define MDMA_S1_CURR_DESC_PTR 0xFFC01FE0 /*MemDMA1 Stream 1 Source Current Descriptor Ptr reg */ +#define MDMA_S1_CURR_ADDR 0xFFC01FE4 /*MemDMA1 Stream 1 Source Current Address */ +#define MDMA_S1_CURR_X_COUNT 0xFFC01FF0 /*MemDMA1 Stream 1 Source Current Inner-Loop Count */ +#define MDMA_S1_CURR_Y_COUNT 0xFFC01FF8 /*MemDMA1 Stream 1 Source Current Outer-Loop Count */ +#define MDMA_S1_IRQ_STATUS 0xFFC01FE8 /*MemDMA1 Stream 1 Source Interrupt/Status */ +#define MDMA_S1_PERIPHERAL_MAP 0xFFC01FEC /*MemDMA1 Stream 1 Source Peripheral Map */ /* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */ #define DMA2_0_CONFIG 0xFFC00C08 /* DMA2 Channel 0 Configuration register */ @@ -705,61 +705,61 @@ #define DMA2_11_PERIPHERAL_MAP 0xFFC00EEC /* DMA2 Channel 11 Peripheral Map Register */ /* Memory DMA2 Controller registers (0xFFC0 0E80-0xFFC0 0FFF) */ -#define MDMA_D0_CONFIG 0xFFC00F08 /*MemDMA2 Stream 0 Destination Configuration register */ -#define MDMA_D0_NEXT_DESC_PTR 0xFFC00F00 /*MemDMA2 Stream 0 Destination Next Descriptor Ptr Reg */ -#define MDMA_D0_START_ADDR 0xFFC00F04 /*MemDMA2 Stream 0 Destination Start Address */ -#define MDMA_D0_X_COUNT 0xFFC00F10 /*MemDMA2 Stream 0 Dest Inner-Loop Count register */ -#define MDMA_D0_Y_COUNT 0xFFC00F18 /*MemDMA2 Stream 0 Dest Outer-Loop Count register */ -#define MDMA_D0_X_MODIFY 0xFFC00F14 /*MemDMA2 Stream 0 Dest Inner-Loop Address-Increment */ -#define MDMA_D0_Y_MODIFY 0xFFC00F1C /*MemDMA2 Stream 0 Dest Outer-Loop Address-Increment */ -#define MDMA_D0_CURR_DESC_PTR 0xFFC00F20 /*MemDMA2 Stream 0 Dest Current Descriptor Ptr reg */ -#define MDMA_D0_CURR_ADDR 0xFFC00F24 /*MemDMA2 Stream 0 Destination Current Address */ -#define MDMA_D0_CURR_X_COUNT 0xFFC00F30 /*MemDMA2 Stream 0 Dest Current Inner-Loop Count reg */ -#define MDMA_D0_CURR_Y_COUNT 0xFFC00F38 /*MemDMA2 Stream 0 Dest Current Outer-Loop Count reg */ -#define MDMA_D0_IRQ_STATUS 0xFFC00F28 /*MemDMA2 Stream 0 Dest Interrupt/Status Register */ -#define MDMA_D0_PERIPHERAL_MAP 0xFFC00F2C /*MemDMA2 Stream 0 Destination Peripheral Map register */ - -#define MDMA_S0_CONFIG 0xFFC00F48 /*MemDMA2 Stream 0 Source Configuration register */ -#define MDMA_S0_NEXT_DESC_PTR 0xFFC00F40 /*MemDMA2 Stream 0 Source Next Descriptor Ptr Reg */ -#define MDMA_S0_START_ADDR 0xFFC00F44 /*MemDMA2 Stream 0 Source Start Address */ -#define MDMA_S0_X_COUNT 0xFFC00F50 /*MemDMA2 Stream 0 Source Inner-Loop Count register */ -#define MDMA_S0_Y_COUNT 0xFFC00F58 /*MemDMA2 Stream 0 Source Outer-Loop Count register */ -#define MDMA_S0_X_MODIFY 0xFFC00F54 /*MemDMA2 Stream 0 Src Inner-Loop Addr-Increment reg */ -#define MDMA_S0_Y_MODIFY 0xFFC00F5C /*MemDMA2 Stream 0 Src Outer-Loop Addr-Increment reg */ -#define MDMA_S0_CURR_DESC_PTR 0xFFC00F60 /*MemDMA2 Stream 0 Source Current Descriptor Ptr reg */ -#define MDMA_S0_CURR_ADDR 0xFFC00F64 /*MemDMA2 Stream 0 Source Current Address */ -#define MDMA_S0_CURR_X_COUNT 0xFFC00F70 /*MemDMA2 Stream 0 Src Current Inner-Loop Count reg */ -#define MDMA_S0_CURR_Y_COUNT 0xFFC00F78 /*MemDMA2 Stream 0 Src Current Outer-Loop Count reg */ -#define MDMA_S0_IRQ_STATUS 0xFFC00F68 /*MemDMA2 Stream 0 Source Interrupt/Status Register */ -#define MDMA_S0_PERIPHERAL_MAP 0xFFC00F6C /*MemDMA2 Stream 0 Source Peripheral Map register */ - -#define MDMA_D1_CONFIG 0xFFC00F88 /*MemDMA2 Stream 1 Destination Configuration register */ -#define MDMA_D1_NEXT_DESC_PTR 0xFFC00F80 /*MemDMA2 Stream 1 Destination Next Descriptor Ptr Reg */ -#define MDMA_D1_START_ADDR 0xFFC00F84 /*MemDMA2 Stream 1 Destination Start Address */ -#define MDMA_D1_X_COUNT 0xFFC00F90 /*MemDMA2 Stream 1 Dest Inner-Loop Count register */ -#define MDMA_D1_Y_COUNT 0xFFC00F98 /*MemDMA2 Stream 1 Dest Outer-Loop Count register */ -#define MDMA_D1_X_MODIFY 0xFFC00F94 /*MemDMA2 Stream 1 Dest Inner-Loop Address-Increment */ -#define MDMA_D1_Y_MODIFY 0xFFC00F9C /*MemDMA2 Stream 1 Dest Outer-Loop Address-Increment */ -#define MDMA_D1_CURR_DESC_PTR 0xFFC00FA0 /*MemDMA2 Stream 1 Destination Current Descriptor Ptr */ -#define MDMA_D1_CURR_ADDR 0xFFC00FA4 /*MemDMA2 Stream 1 Destination Current Address reg */ -#define MDMA_D1_CURR_X_COUNT 0xFFC00FB0 /*MemDMA2 Stream 1 Dest Current Inner-Loop Count reg */ -#define MDMA_D1_CURR_Y_COUNT 0xFFC00FB8 /*MemDMA2 Stream 1 Dest Current Outer-Loop Count reg */ -#define MDMA_D1_IRQ_STATUS 0xFFC00FA8 /*MemDMA2 Stream 1 Destination Interrupt/Status Reg */ -#define MDMA_D1_PERIPHERAL_MAP 0xFFC00FAC /*MemDMA2 Stream 1 Destination Peripheral Map register */ - -#define MDMA_S1_CONFIG 0xFFC00FC8 /*MemDMA2 Stream 1 Source Configuration register */ -#define MDMA_S1_NEXT_DESC_PTR 0xFFC00FC0 /*MemDMA2 Stream 1 Source Next Descriptor Ptr Reg */ -#define MDMA_S1_START_ADDR 0xFFC00FC4 /*MemDMA2 Stream 1 Source Start Address */ -#define MDMA_S1_X_COUNT 0xFFC00FD0 /*MemDMA2 Stream 1 Source Inner-Loop Count register */ -#define MDMA_S1_Y_COUNT 0xFFC00FD8 /*MemDMA2 Stream 1 Source Outer-Loop Count register */ -#define MDMA_S1_X_MODIFY 0xFFC00FD4 /*MemDMA2 Stream 1 Src Inner-Loop Address-Increment */ -#define MDMA_S1_Y_MODIFY 0xFFC00FDC /*MemDMA2 Stream 1 Source Outer-Loop Address-Increment */ -#define MDMA_S1_CURR_DESC_PTR 0xFFC00FE0 /*MemDMA2 Stream 1 Source Current Descriptor Ptr reg */ -#define MDMA_S1_CURR_ADDR 0xFFC00FE4 /*MemDMA2 Stream 1 Source Current Address */ -#define MDMA_S1_CURR_X_COUNT 0xFFC00FF0 /*MemDMA2 Stream 1 Source Current Inner-Loop Count */ -#define MDMA_S1_CURR_Y_COUNT 0xFFC00FF8 /*MemDMA2 Stream 1 Source Current Outer-Loop Count */ -#define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /*MemDMA2 Stream 1 Source Interrupt/Status Register */ -#define MDMA_S1_PERIPHERAL_MAP 0xFFC00FEC /*MemDMA2 Stream 1 Source Peripheral Map register */ +#define MDMA_D2_CONFIG 0xFFC00F08 /*MemDMA2 Stream 0 Destination Configuration register */ +#define MDMA_D2_NEXT_DESC_PTR 0xFFC00F00 /*MemDMA2 Stream 0 Destination Next Descriptor Ptr Reg */ +#define MDMA_D2_START_ADDR 0xFFC00F04 /*MemDMA2 Stream 0 Destination Start Address */ +#define MDMA_D2_X_COUNT 0xFFC00F10 /*MemDMA2 Stream 0 Dest Inner-Loop Count register */ +#define MDMA_D2_Y_COUNT 0xFFC00F18 /*MemDMA2 Stream 0 Dest Outer-Loop Count register */ +#define MDMA_D2_X_MODIFY 0xFFC00F14 /*MemDMA2 Stream 0 Dest Inner-Loop Address-Increment */ +#define MDMA_D2_Y_MODIFY 0xFFC00F1C /*MemDMA2 Stream 0 Dest Outer-Loop Address-Increment */ +#define MDMA_D2_CURR_DESC_PTR 0xFFC00F20 /*MemDMA2 Stream 0 Dest Current Descriptor Ptr reg */ +#define MDMA_D2_CURR_ADDR 0xFFC00F24 /*MemDMA2 Stream 0 Destination Current Address */ +#define MDMA_D2_CURR_X_COUNT 0xFFC00F30 /*MemDMA2 Stream 0 Dest Current Inner-Loop Count reg */ +#define MDMA_D2_CURR_Y_COUNT 0xFFC00F38 /*MemDMA2 Stream 0 Dest Current Outer-Loop Count reg */ +#define MDMA_D2_IRQ_STATUS 0xFFC00F28 /*MemDMA2 Stream 0 Dest Interrupt/Status Register */ +#define MDMA_D2_PERIPHERAL_MAP 0xFFC00F2C /*MemDMA2 Stream 0 Destination Peripheral Map register */ + +#define MDMA_S2_CONFIG 0xFFC00F48 /*MemDMA2 Stream 0 Source Configuration register */ +#define MDMA_S2_NEXT_DESC_PTR 0xFFC00F40 /*MemDMA2 Stream 0 Source Next Descriptor Ptr Reg */ +#define MDMA_S2_START_ADDR 0xFFC00F44 /*MemDMA2 Stream 0 Source Start Address */ +#define MDMA_S2_X_COUNT 0xFFC00F50 /*MemDMA2 Stream 0 Source Inner-Loop Count register */ +#define MDMA_S2_Y_COUNT 0xFFC00F58 /*MemDMA2 Stream 0 Source Outer-Loop Count register */ +#define MDMA_S2_X_MODIFY 0xFFC00F54 /*MemDMA2 Stream 0 Src Inner-Loop Addr-Increment reg */ +#define MDMA_S2_Y_MODIFY 0xFFC00F5C /*MemDMA2 Stream 0 Src Outer-Loop Addr-Increment reg */ +#define MDMA_S2_CURR_DESC_PTR 0xFFC00F60 /*MemDMA2 Stream 0 Source Current Descriptor Ptr reg */ +#define MDMA_S2_CURR_ADDR 0xFFC00F64 /*MemDMA2 Stream 0 Source Current Address */ +#define MDMA_S2_CURR_X_COUNT 0xFFC00F70 /*MemDMA2 Stream 0 Src Current Inner-Loop Count reg */ +#define MDMA_S2_CURR_Y_COUNT 0xFFC00F78 /*MemDMA2 Stream 0 Src Current Outer-Loop Count reg */ +#define MDMA_S2_IRQ_STATUS 0xFFC00F68 /*MemDMA2 Stream 0 Source Interrupt/Status Register */ +#define MDMA_S2_PERIPHERAL_MAP 0xFFC00F6C /*MemDMA2 Stream 0 Source Peripheral Map register */ + +#define MDMA_D3_CONFIG 0xFFC00F88 /*MemDMA2 Stream 1 Destination Configuration register */ +#define MDMA_D3_NEXT_DESC_PTR 0xFFC00F80 /*MemDMA2 Stream 1 Destination Next Descriptor Ptr Reg */ +#define MDMA_D3_START_ADDR 0xFFC00F84 /*MemDMA2 Stream 1 Destination Start Address */ +#define MDMA_D3_X_COUNT 0xFFC00F90 /*MemDMA2 Stream 1 Dest Inner-Loop Count register */ +#define MDMA_D3_Y_COUNT 0xFFC00F98 /*MemDMA2 Stream 1 Dest Outer-Loop Count register */ +#define MDMA_D3_X_MODIFY 0xFFC00F94 /*MemDMA2 Stream 1 Dest Inner-Loop Address-Increment */ +#define MDMA_D3_Y_MODIFY 0xFFC00F9C /*MemDMA2 Stream 1 Dest Outer-Loop Address-Increment */ +#define MDMA_D3_CURR_DESC_PTR 0xFFC00FA0 /*MemDMA2 Stream 1 Destination Current Descriptor Ptr */ +#define MDMA_D3_CURR_ADDR 0xFFC00FA4 /*MemDMA2 Stream 1 Destination Current Address reg */ +#define MDMA_D3_CURR_X_COUNT 0xFFC00FB0 /*MemDMA2 Stream 1 Dest Current Inner-Loop Count reg */ +#define MDMA_D3_CURR_Y_COUNT 0xFFC00FB8 /*MemDMA2 Stream 1 Dest Current Outer-Loop Count reg */ +#define MDMA_D3_IRQ_STATUS 0xFFC00FA8 /*MemDMA2 Stream 1 Destination Interrupt/Status Reg */ +#define MDMA_D3_PERIPHERAL_MAP 0xFFC00FAC /*MemDMA2 Stream 1 Destination Peripheral Map register */ + +#define MDMA_S3_CONFIG 0xFFC00FC8 /*MemDMA2 Stream 1 Source Configuration register */ +#define MDMA_S3_NEXT_DESC_PTR 0xFFC00FC0 /*MemDMA2 Stream 1 Source Next Descriptor Ptr Reg */ +#define MDMA_S3_START_ADDR 0xFFC00FC4 /*MemDMA2 Stream 1 Source Start Address */ +#define MDMA_S3_X_COUNT 0xFFC00FD0 /*MemDMA2 Stream 1 Source Inner-Loop Count register */ +#define MDMA_S3_Y_COUNT 0xFFC00FD8 /*MemDMA2 Stream 1 Source Outer-Loop Count register */ +#define MDMA_S3_X_MODIFY 0xFFC00FD4 /*MemDMA2 Stream 1 Src Inner-Loop Address-Increment */ +#define MDMA_S3_Y_MODIFY 0xFFC00FDC /*MemDMA2 Stream 1 Source Outer-Loop Address-Increment */ +#define MDMA_S3_CURR_DESC_PTR 0xFFC00FE0 /*MemDMA2 Stream 1 Source Current Descriptor Ptr reg */ +#define MDMA_S3_CURR_ADDR 0xFFC00FE4 /*MemDMA2 Stream 1 Source Current Address */ +#define MDMA_S3_CURR_X_COUNT 0xFFC00FF0 /*MemDMA2 Stream 1 Source Current Inner-Loop Count */ +#define MDMA_S3_CURR_Y_COUNT 0xFFC00FF8 /*MemDMA2 Stream 1 Source Current Outer-Loop Count */ +#define MDMA_S3_IRQ_STATUS 0xFFC00FE8 /*MemDMA2 Stream 1 Source Interrupt/Status Register */ +#define MDMA_S3_PERIPHERAL_MAP 0xFFC00FEC /*MemDMA2 Stream 1 Source Peripheral Map register */ /* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */ #define IMDMA_D0_CONFIG 0xFFC01808 /*IMDMA Stream 0 Destination Configuration */ -- cgit v1.2.3 From f7899f7c1fff3c68f0c896e38714d489845cef57 Mon Sep 17 00:00:00 2001 From: Steven Miao Date: Wed, 11 Jan 2012 14:00:47 +0800 Subject: blackfin: timer: refine bfin simple timer driver Add ioctl cmd for gptimer test app and do some codecleanup(remove spaces). Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/include/asm/bfin_simple_timer.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/blackfin/include/asm/bfin_simple_timer.h b/arch/blackfin/include/asm/bfin_simple_timer.h index 5248c133bc68..aadfb1ad1fac 100644 --- a/arch/blackfin/include/asm/bfin_simple_timer.h +++ b/arch/blackfin/include/asm/bfin_simple_timer.h @@ -11,9 +11,11 @@ #define BFIN_SIMPLE_TIMER_IOCTL_MAGIC 't' -#define BFIN_SIMPLE_TIMER_SET_PERIOD _IO (BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 2) -#define BFIN_SIMPLE_TIMER_START _IO (BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 6) -#define BFIN_SIMPLE_TIMER_STOP _IO (BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 8) -#define BFIN_SIMPLE_TIMER_READ _IO (BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 10) +#define BFIN_SIMPLE_TIMER_SET_PERIOD _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 2) +#define BFIN_SIMPLE_TIMER_SET_WIDTH _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 3) +#define BFIN_SIMPLE_TIMER_SET_MODE _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 4) +#define BFIN_SIMPLE_TIMER_START _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 6) +#define BFIN_SIMPLE_TIMER_STOP _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 8) +#define BFIN_SIMPLE_TIMER_READ _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 10) #endif -- cgit v1.2.3 From edd8a97e6e89ee2edc86e21db6253a73741f3c72 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Tue, 29 Jun 2010 08:55:29 +0000 Subject: blackfin: restore L1 base address and length Restore L1 base address and length to 0 after free else the value will be wrong. Signed-off-by: Barry Song Signed-off-by: Bob Liu --- arch/blackfin/include/asm/mmu_context.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h index 3828c70e7a2e..15b16d3e8de8 100644 --- a/arch/blackfin/include/asm/mmu_context.h +++ b/arch/blackfin/include/asm/mmu_context.h @@ -30,8 +30,11 @@ extern void *l1sram_alloc_max(void*); static inline void free_l1stack(void) { nr_l1stack_tasks--; - if (nr_l1stack_tasks == 0) + if (nr_l1stack_tasks == 0) { l1sram_free(l1_stack_base); + l1_stack_base = NULL; + l1_stack_len = 0; + } } static inline unsigned long -- cgit v1.2.3 From 4936afc6510608ddabeb4f562cf1a291cc38faa1 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Sun, 21 Feb 2010 03:01:20 +0000 Subject: blackfin: cplb-mpu: fix page mask table overflow page mask table will overflow without xip related macros. Signed-off-by: Barry Song Signed-off-by: Bob Liu --- arch/blackfin/kernel/cplb-mpu/cplbmgr.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c index 8de92299b3ee..b56bd8514b7c 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c @@ -120,6 +120,7 @@ MGR_ATTR static noinline int dcplb_miss(unsigned int cpu) d_data = L2_DMEMORY; } else if (addr >= physical_mem_end) { if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { +#if defined(CONFIG_ROMFS_ON_MTD) && defined(CONFIG_MTD_ROM) mask = current_rwx_mask[cpu]; if (mask) { int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT; @@ -129,6 +130,7 @@ MGR_ATTR static noinline int dcplb_miss(unsigned int cpu) if (mask[idx] & bit) d_data |= CPLB_USER_RD; } +#endif } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH && (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) { addr &= ~(1 * 1024 * 1024 - 1); -- cgit v1.2.3 From 5d002cce4c8a24234b81033119eda3272ebf7981 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 27 Jun 2011 18:16:29 -0400 Subject: spi/bfin_spi: drop bits_per_word from client data No other SPI controller has this field, and SPI clients should be setting this up in their own drivers. So drop it from the Blackfin controller to keep people from using it. Signed-off-by: Mike Frysinger Signed-off-by: Bob Liu --- arch/blackfin/include/asm/bfin5xx_spi.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h index 5392583d0253..fb95c853bb1e 100644 --- a/arch/blackfin/include/asm/bfin5xx_spi.h +++ b/arch/blackfin/include/asm/bfin5xx_spi.h @@ -77,7 +77,6 @@ struct bfin5xx_spi_master { struct bfin5xx_spi_chip { u16 ctl_reg; u8 enable_dma; - u8 bits_per_word; u16 cs_chg_udelay; /* Some devices require 16-bit delays */ /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */ u16 idle_tx_val; -- cgit v1.2.3 From a5e0d8652adfc0530b3fce18e54e429287aeee73 Mon Sep 17 00:00:00 2001 From: Bob Liu Date: Tue, 17 Jan 2012 18:06:34 +0800 Subject: blackfin: bf561: forgot CSYNC in get_core_lock_noflush SMP kgdb runs into dead loop without this CSYNC when one core single steps over get_core_lock_noflush and the other executes get_core_lock as a slave node. Signed-off-by: Sonic Zhang Signed-off-by: Bob Liu --- arch/blackfin/mach-bf561/atomic.S | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/blackfin/mach-bf561/atomic.S b/arch/blackfin/mach-bf561/atomic.S index 52d6f73fcced..2a08df8e8c4c 100644 --- a/arch/blackfin/mach-bf561/atomic.S +++ b/arch/blackfin/mach-bf561/atomic.S @@ -72,6 +72,13 @@ ENTRY(_get_core_lock_noflush) SSYNC(r2); jump .Lretry_corelock_noflush .Ldone_corelock_noflush: + /* + * SMP kgdb runs into dead loop without NOP here, when one core + * single steps over get_core_lock_noflush and the other executes + * get_core_lock as a slave node. + */ + nop; + CSYNC(r2); rts; ENDPROC(_get_core_lock_noflush) -- cgit v1.2.3 From 4e937ac11280ff90ca0246a3b6042acef09154e9 Mon Sep 17 00:00:00 2001 From: Scott Jiang Date: Mon, 9 Jan 2012 17:06:56 -0500 Subject: bf548: add ppi interrupt mask and blanking clocks Signed-off-by: Scott Jiang Signed-off-by: Bob Liu --- arch/blackfin/mach-bf548/boards/ezkit.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 3ea45f8bd61c..4595a4009554 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c @@ -1237,6 +1237,8 @@ static struct bfin_capture_config bfin_capture_data = { }, .ppi_info = &ppi_info, .ppi_control = (POLC | PACKEN | DLEN_8 | XFR_TYPE | 0x20), + .int_mask = 0xFFFFFFFF, /* disable error interrupt on eppi */ + .blank_clocks = 8, /* 8 clocks as SAV and EAV */ }; #endif -- cgit v1.2.3 From a5b44eeb38f7f3bd07bf857a26f1ac6193512df5 Mon Sep 17 00:00:00 2001 From: Bob Liu Date: Fri, 13 Jan 2012 18:34:46 +0800 Subject: blackfin: kgdb: skip hardware watchpoint test blackfin doesn't support hardware watchpoint except for over JTAG emulator. Signed-off-by: Sonic Zhang Signed-off-by: Bob Liu --- arch/blackfin/include/asm/kgdb.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h index aaf884591b07..2703ddeeb5db 100644 --- a/arch/blackfin/include/asm/kgdb.h +++ b/arch/blackfin/include/asm/kgdb.h @@ -109,6 +109,7 @@ static inline void arch_kgdb_breakpoint(void) # define CACHE_FLUSH_IS_SAFE 1 #endif #define GDB_ADJUSTS_BREAK_OFFSET +#define GDB_SKIP_HW_WATCH_TEST #define HW_INST_WATCHPOINT_NUM 6 #define HW_WATCHPOINT_NUM 8 #define TYPE_INST_WATCHPOINT 0 -- cgit v1.2.3 From 57084ede395bb3c9da7905701d34a3b7d33c9356 Mon Sep 17 00:00:00 2001 From: Bob Liu Date: Mon, 16 Jan 2012 11:18:50 +0800 Subject: blackfin: bf537: stamp: update board file for 193x Signed-off-by: Scott Jiang Signed-off-by: Bob Liu --- arch/blackfin/mach-bf537/boards/stamp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 2221173e489e..58e17c275dc8 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c @@ -975,7 +975,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { }, #endif -#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE) +#ifdef CONFIG_SND_SOC_AD193X_SPI { .modalias = "ad193x", .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ @@ -2171,7 +2171,7 @@ static unsigned long adt7316_i2c_data[2] = { #endif static struct i2c_board_info __initdata bfin_i2c_board_info[] = { -#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE) +#ifdef CONFIG_SND_SOC_AD193X_I2C { I2C_BOARD_INFO("ad1937", 0x04), }, -- cgit v1.2.3 From 3268968ddc978f12a4b72c8ebe8eafba68c26aa1 Mon Sep 17 00:00:00 2001 From: Bob Liu Date: Fri, 27 Jan 2012 21:36:21 +0800 Subject: bfin: add bfin_ad73311_machine platform device we can pass sport enable pin through platform data if customer board has reset pin, add it in ad73311_gpio array and modify id to 2 Signed-off-by: Scott Jiang Signed-off-by: Bob Liu --- arch/blackfin/mach-bf537/boards/stamp.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 58e17c275dc8..f2c0629f22c2 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c @@ -2593,6 +2593,21 @@ static struct platform_device bfin_ac97_pcm = { }; #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \ + defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE) +static const unsigned ad73311_gpio[] = { + GPIO_PF4, +}; + +static struct platform_device bfin_ad73311_machine = { + .name = "bfin-snd-ad73311", + .id = 1, + .dev = { + .platform_data = (void *)ad73311_gpio, + }, +}; +#endif + #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE) static struct platform_device bfin_ad73311_codec_device = { .name = "ad73311", @@ -2862,6 +2877,11 @@ static struct platform_device *stamp_devices[] __initdata = { &bfin_ac97_pcm, #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \ + defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE) + &bfin_ad73311_machine, +#endif + #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE) &bfin_ad73311_codec_device, #endif -- cgit v1.2.3 From 563c76ff4ca793fa3246b6857e039155ebd8d386 Mon Sep 17 00:00:00 2001 From: Bob Liu Date: Fri, 27 Jan 2012 21:37:57 +0800 Subject: blackfin: thread_info: add suspend flag Add suspend flag to thread_info for suspend/resume. Signed-off-by: Bob Liu --- arch/blackfin/include/asm/thread_info.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h index 53ad10005ae3..02560fd8a121 100644 --- a/arch/blackfin/include/asm/thread_info.h +++ b/arch/blackfin/include/asm/thread_info.h @@ -100,6 +100,7 @@ static inline struct thread_info *current_thread_info(void) TIF_NEED_RESCHED */ #define TIF_MEMDIE 4 /* is terminating due to OOM killer */ #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ +#define TIF_FREEZE 6 /* is freezing for suspend */ #define TIF_IRQ_SYNC 7 /* sync pipeline stage */ #define TIF_NOTIFY_RESUME 8 /* callback before returning to user */ #define TIF_SINGLESTEP 9 @@ -110,6 +111,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_NEED_RESCHED (1< Date: Mon, 16 Jan 2012 13:12:10 +0800 Subject: blackfin: update default defconfig Update default defconfig by selecting correct net device driver. Signed-off-by: Bob Liu --- arch/blackfin/configs/BF518F-EZBRD_defconfig | 25 +++++++++--------- arch/blackfin/configs/BF526-EZBRD_defconfig | 26 +++++++++--------- arch/blackfin/configs/BF527-EZKIT-V2_defconfig | 26 +++++++++--------- arch/blackfin/configs/BF527-EZKIT_defconfig | 27 +++++++++---------- arch/blackfin/configs/BF533-EZKIT_defconfig | 23 ++++++++-------- arch/blackfin/configs/BF533-STAMP_defconfig | 22 ++++++++-------- arch/blackfin/configs/BF537-STAMP_defconfig | 27 +++++++++---------- arch/blackfin/configs/BF548-EZKIT_defconfig | 16 ++++++----- arch/blackfin/configs/BF561-EZKIT-SMP_defconfig | 35 +++++++++++++------------ arch/blackfin/configs/BF561-EZKIT_defconfig | 23 ++++++++-------- 10 files changed, 125 insertions(+), 125 deletions(-) diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig index 0b7039cf07ff..383007877b2b 100644 --- a/arch/blackfin/configs/BF518F-EZBRD_defconfig +++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -35,7 +33,6 @@ CONFIG_C_CDPRIO=y CONFIG_BANK_3=0x99B2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -51,7 +48,6 @@ CONFIG_IP_PNP=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y CONFIG_MTD_JEDECPROBE=m @@ -60,20 +56,28 @@ CONFIG_MTD_ROM=m CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_BLK_DEV_RAM=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +CONFIG_NET_BFIN=y CONFIG_BFIN_MAC=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set # CONFIG_INPUT is not set # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y CONFIG_SERIAL_BFIN_UART0=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=y @@ -97,16 +101,13 @@ CONFIG_EXT2_FS=m CONFIG_VFAT_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_936=m CONFIG_NLS_ISO8859_1=m CONFIG_NLS_UTF8=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig index 5553205d7cbe..2f2c6acf210c 100644 --- a/arch/blackfin/configs/BF526-EZBRD_defconfig +++ b/arch/blackfin/configs/BF526-EZBRD_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -40,7 +38,6 @@ CONFIG_C_CDPRIO=y CONFIG_BANK_3=0x99B2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -56,7 +53,6 @@ CONFIG_IP_PNP=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y CONFIG_MTD_CFI=y @@ -74,10 +70,18 @@ CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SR=m # CONFIG_SCSI_LOWLEVEL is not set CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +CONFIG_NET_BFIN=y CONFIG_BFIN_MAC=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_MOUSEDEV is not set @@ -85,12 +89,12 @@ CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y CONFIG_SERIAL_BFIN_UART1=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=m @@ -123,7 +127,6 @@ CONFIG_USB_DEVICEFS=y # CONFIG_USB_DEVICE_CLASS is not set CONFIG_USB_OTG_BLACKLIST_HUB=y CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y CONFIG_USB_STORAGE=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_BFIN=y @@ -135,16 +138,13 @@ CONFIG_VFAT_FS=m CONFIG_JFFS2_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_936=m CONFIG_NLS_ISO8859_1=m CONFIG_NLS_UTF8=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y diff --git a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig index 498f64a87050..9325d757f35a 100644 --- a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -39,7 +37,6 @@ CONFIG_C_CDPRIO=y CONFIG_BANK_3=0x99B2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -61,7 +58,6 @@ CONFIG_BFIN_SIR0=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CHAR=m CONFIG_MTD_BLOCK=y CONFIG_MTD_JEDECPROBE=m @@ -77,10 +73,18 @@ CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SR=m # CONFIG_SCSI_LOWLEVEL is not set CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +CONFIG_NET_BFIN=y CONFIG_BFIN_MAC=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_MOUSEDEV is not set @@ -93,12 +97,12 @@ CONFIG_TOUCHSCREEN_AD7879=y CONFIG_TOUCHSCREEN_AD7879_I2C=y CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y CONFIG_SERIAL_BFIN_UART1=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=m @@ -147,7 +151,6 @@ CONFIG_USB_DEVICEFS=y # CONFIG_USB_DEVICE_CLASS is not set CONFIG_USB_OTG_BLACKLIST_HUB=y CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y CONFIG_USB_STORAGE=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y @@ -163,16 +166,13 @@ CONFIG_VFAT_FS=m CONFIG_JFFS2_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_936=m CONFIG_NLS_ISO8859_1=m CONFIG_NLS_UTF8=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig index 72e0317565ef..b953be09ab31 100644 --- a/arch/blackfin/configs/BF527-EZKIT_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -38,7 +36,6 @@ CONFIG_C_CDPRIO=y CONFIG_BANK_3=0x99B2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -60,7 +57,6 @@ CONFIG_BFIN_SIR0=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CHAR=m CONFIG_MTD_BLOCK=y CONFIG_MTD_JEDECPROBE=m @@ -76,10 +72,18 @@ CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SR=m # CONFIG_SCSI_LOWLEVEL is not set CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +CONFIG_NET_BFIN=y CONFIG_BFIN_MAC=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_MOUSEDEV is not set @@ -87,12 +91,12 @@ CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y CONFIG_SERIAL_BFIN_UART1=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=m @@ -141,8 +145,6 @@ CONFIG_USB_DEVICEFS=y # CONFIG_USB_DEVICE_CLASS is not set CONFIG_USB_OTG_BLACKLIST_HUB=y CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_MUSB_PIO_ONLY=y CONFIG_USB_STORAGE=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_BFIN=y @@ -155,16 +157,13 @@ CONFIG_VFAT_FS=m CONFIG_JFFS2_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_936=m CONFIG_NLS_ISO8859_1=m CONFIG_NLS_UTF8=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig index 2f075e0b2624..127f20df75a0 100644 --- a/arch/blackfin/configs/BF533-EZKIT_defconfig +++ b/arch/blackfin/configs/BF533-EZKIT_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -32,7 +30,6 @@ CONFIG_C_CDPRIO=y CONFIG_BANK_3=0xAAC2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -53,7 +50,6 @@ CONFIG_IRTTY_SIR=m CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CHAR=m CONFIG_MTD_BLOCK=y CONFIG_MTD_JEDECPROBE=m @@ -62,10 +58,16 @@ CONFIG_MTD_ROM=m CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_BLK_DEV_RAM=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set CONFIG_SMC91X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set CONFIG_INPUT=m # CONFIG_INPUT_MOUSEDEV is not set @@ -74,11 +76,11 @@ CONFIG_INPUT_EVDEV=m # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_SPI=y CONFIG_SPI_BFIN5XX=y @@ -94,12 +96,9 @@ CONFIG_RTC_DRV_BFIN=y CONFIG_JFFS2_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig index ab38a82597b2..0df2f921f7e5 100644 --- a/arch/blackfin/configs/BF533-STAMP_defconfig +++ b/arch/blackfin/configs/BF533-STAMP_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -30,7 +28,6 @@ CONFIG_C_CDPRIO=y CONFIG_BANK_3=0xAAC2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -62,10 +59,16 @@ CONFIG_MTD_ROM=m CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_BLK_DEV_RAM=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set CONFIG_SMC91X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=m @@ -74,11 +77,11 @@ CONFIG_INPUT_EVDEV=m CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=m CONFIG_I2C_CHARDEV=m @@ -106,12 +109,9 @@ CONFIG_RTC_DRV_BFIN=y CONFIG_JFFS2_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig index 5c802d6bbbc0..91d3eda42742 100644 --- a/arch/blackfin/configs/BF537-STAMP_defconfig +++ b/arch/blackfin/configs/BF537-STAMP_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -30,7 +28,6 @@ CONFIG_C_CDPRIO=y CONFIG_BANK_3=0x99B2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -45,7 +42,6 @@ CONFIG_IP_PNP=y CONFIG_CAN=m CONFIG_CAN_RAW=m CONFIG_CAN_BCM=m -CONFIG_CAN_DEV=m CONFIG_CAN_BFIN=m CONFIG_IRDA=m CONFIG_IRLAN=m @@ -58,7 +54,6 @@ CONFIG_BFIN_SIR1=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CHAR=m CONFIG_MTD_BLOCK=y @@ -69,11 +64,18 @@ CONFIG_MTD_ROM=m CONFIG_MTD_PHYSMAP=m CONFIG_BLK_DEV_RAM=y CONFIG_NETDEVICES=y -CONFIG_SMSC_PHY=y -CONFIG_NET_ETHERNET=y +CONFIG_NET_BFIN=y CONFIG_BFIN_MAC=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=m @@ -82,12 +84,12 @@ CONFIG_INPUT_EVDEV=m CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y CONFIG_SERIAL_BFIN_UART0=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=m CONFIG_I2C_CHARDEV=m @@ -117,12 +119,9 @@ CONFIG_RTC_DRV_BFIN=y CONFIG_JFFS2_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig index 7a1e3bf2b04f..296de924fbd4 100644 --- a/arch/blackfin/configs/BF548-EZKIT_defconfig +++ b/arch/blackfin/configs/BF548-EZKIT_defconfig @@ -5,7 +5,6 @@ CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -85,10 +84,16 @@ CONFIG_ATA=y # CONFIG_SATA_PMP is not set CONFIG_PATA_BF54X=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set CONFIG_SMSC911X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_MOUSEDEV is not set @@ -158,8 +163,6 @@ CONFIG_USB_DEVICEFS=y # CONFIG_USB_DEVICE_CLASS is not set CONFIG_USB_OTG_BLACKLIST_HUB=y CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_BLACKFIN=y CONFIG_USB_STORAGE=y CONFIG_MMC=y CONFIG_MMC_BLOCK=m @@ -187,7 +190,6 @@ CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_936=m CONFIG_NLS_ISO8859_1=m CONFIG_NLS_UTF8=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y diff --git a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig index 78adbbf39826..680730eeaf23 100644 --- a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -23,17 +21,18 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_IOSCHED_CFQ is not set CONFIG_PREEMPT_VOLUNTARY=y CONFIG_BF561=y -CONFIG_SMP=y CONFIG_IRQ_TIMER0=10 CONFIG_CLKIN_HZ=30000000 CONFIG_HIGH_RES_TIMERS=y CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0 CONFIG_BFIN_GPTIMERS=m +CONFIG_BFIN_EXTMEM_WRITETHROUGH=y +CONFIG_BFIN_L2_DCACHEABLE=y +CONFIG_BFIN_L2_WRITETHROUGH=y CONFIG_C_CDPRIO=y CONFIG_BANK_3=0xAAC2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -54,21 +53,26 @@ CONFIG_IRTTY_SIR=m CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=m +CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=m -CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_RAM=y CONFIG_MTD_ROM=m -CONFIG_MTD_PHYSMAP=m +CONFIG_MTD_PHYSMAP=y CONFIG_BLK_DEV_RAM=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set CONFIG_SMC91X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set CONFIG_INPUT=m # CONFIG_INPUT_MOUSEDEV is not set @@ -77,11 +81,11 @@ CONFIG_INPUT_EVDEV=m # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_SPI=y CONFIG_SPI_BFIN5XX=y @@ -95,12 +99,9 @@ CONFIG_BFIN_WDT=y CONFIG_JFFS2_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig index d3cd0f561c84..680730eeaf23 100644 --- a/arch/blackfin/configs/BF561-EZKIT_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT_defconfig @@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_ELF_CORE is not set # CONFIG_FUTEX is not set # CONFIG_SIGNALFD is not set @@ -35,7 +33,6 @@ CONFIG_C_CDPRIO=y CONFIG_BANK_3=0xAAC2 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_ZFLAT=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -56,7 +53,6 @@ CONFIG_IRTTY_SIR=m CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y @@ -67,10 +63,16 @@ CONFIG_MTD_ROM=m CONFIG_MTD_PHYSMAP=y CONFIG_BLK_DEV_RAM=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set CONFIG_SMC91X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set CONFIG_INPUT=m # CONFIG_INPUT_MOUSEDEV is not set @@ -79,11 +81,11 @@ CONFIG_INPUT_EVDEV=m # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_BFIN_JTAG_COMM=m +# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BFIN=y CONFIG_SERIAL_BFIN_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_SPI=y CONFIG_SPI_BFIN5XX=y @@ -97,12 +99,9 @@ CONFIG_BFIN_WDT=y CONFIG_JFFS2_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3=y -CONFIG_SMB_FS=m -CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_MMRS=y CONFIG_DEBUG_HWERR=y -- cgit v1.2.3 From 0db07a905628d7f2952691df40853ffd95ceb097 Mon Sep 17 00:00:00 2001 From: Bob Liu Date: Fri, 27 Jan 2012 22:10:04 +0800 Subject: blackfin: cleanup anomaly workarounds cleanup ANOMALY_05000312 and ANOMALY_05000244 Signed-off-by: Robin Getz Signed-off-by: Bob Liu --- arch/blackfin/include/asm/blackfin.h | 44 ++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 24 deletions(-) diff --git a/arch/blackfin/include/asm/blackfin.h b/arch/blackfin/include/asm/blackfin.h index 0928700b6bc4..7be5368c0512 100644 --- a/arch/blackfin/include/asm/blackfin.h +++ b/arch/blackfin/include/asm/blackfin.h @@ -17,22 +17,16 @@ static inline void SSYNC(void) { int _tmp; - if (ANOMALY_05000312) + if (ANOMALY_05000312 || ANOMALY_05000244) __asm__ __volatile__( "cli %0;" "nop;" "nop;" + "nop;" "ssync;" "sti %0;" : "=d" (_tmp) ); - else if (ANOMALY_05000244) - __asm__ __volatile__( - "nop;" - "nop;" - "nop;" - "ssync;" - ); else __asm__ __volatile__("ssync;"); } @@ -41,22 +35,16 @@ static inline void SSYNC(void) static inline void CSYNC(void) { int _tmp; - if (ANOMALY_05000312) + if (ANOMALY_05000312 || ANOMALY_05000244) __asm__ __volatile__( "cli %0;" "nop;" "nop;" + "nop;" "csync;" "sti %0;" : "=d" (_tmp) ); - else if (ANOMALY_05000244) - __asm__ __volatile__( - "nop;" - "nop;" - "nop;" - "csync;" - ); else __asm__ __volatile__("csync;"); } @@ -73,18 +61,26 @@ static inline void CSYNC(void) #define ssync(x) SSYNC(x) #define csync(x) CSYNC(x) -#if ANOMALY_05000312 -#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch; -#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch; - -#elif ANOMALY_05000244 -#define SSYNC(scratch) nop; nop; nop; SSYNC; -#define CSYNC(scratch) nop; nop; nop; CSYNC; +#if ANOMALY_05000312 || ANOMALY_05000244 +#define SSYNC(scratch) \ +do { \ + cli scratch; \ + nop; nop; nop; \ + SSYNC; \ + sti scratch; \ +} while (0) + +#define CSYNC(scratch) \ +do { \ + cli scratch; \ + nop; nop; nop; \ + CSYNC; \ + sti scratch; \ +} while (0) #else #define SSYNC(scratch) SSYNC; #define CSYNC(scratch) CSYNC; - #endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */ #endif /* __ASSEMBLY__ */ -- cgit v1.2.3 From dd47ba13786f22893d08747c152a2cf1435d0d8c Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sun, 29 Jan 2012 05:32:39 -0500 Subject: Blackfin: wire up new process_vm syscalls Signed-off-by: Mike Frysinger Signed-off-by: Bob Liu --- arch/blackfin/include/asm/unistd.h | 4 +++- arch/blackfin/mach-common/entry.S | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h index 0ccba60b9ccf..75ec9df5318b 100644 --- a/arch/blackfin/include/asm/unistd.h +++ b/arch/blackfin/include/asm/unistd.h @@ -399,8 +399,10 @@ #define __NR_syncfs 378 #define __NR_setns 379 #define __NR_sendmmsg 380 +#define __NR_process_vm_readv 381 +#define __NR_process_vm_writev 382 -#define __NR_syscall 381 +#define __NR_syscall 383 #define NR_syscalls __NR_syscall /* Old optional stuff no one actually uses */ diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index e4137297b790..6d5102c71047 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S @@ -1755,6 +1755,8 @@ ENTRY(_sys_call_table) .long _sys_syncfs .long _sys_setns .long _sys_sendmmsg /* 380 */ + .long _sys_process_vm_readv + .long _sys_process_vm_writev .rept NR_syscalls-(.-_sys_call_table)/4 .long _sys_ni_syscall -- cgit v1.2.3 From 0eceb82f55a9e3756cada9e60ecc3a9b7b5979f5 Mon Sep 17 00:00:00 2001 From: Danny Kukawka Date: Thu, 16 Feb 2012 07:09:30 +0000 Subject: arch/blackfin: don't generate random mac in bfin_get_ether_addr() Changed bfin_get_ether_addr() to return a state and to set no random mac address if the board don't provide one. Let the caller of bfin_get_ether_addr() set a random mac address if the return value is not 0. v2: don't set random mac in bfin_get_ether_addr() Signed-off-by: Danny Kukawka Acked-by: Mike Frysinger Signed-off-by: David S. Miller Signed-off-by: Bob Liu --- arch/blackfin/mach-bf518/boards/ezbrd.c | 3 ++- arch/blackfin/mach-bf518/boards/tcm-bf518.c | 5 ++--- arch/blackfin/mach-bf527/boards/ad7160eval.c | 3 ++- arch/blackfin/mach-bf527/boards/cm_bf527.c | 5 ++--- arch/blackfin/mach-bf527/boards/ezbrd.c | 3 ++- arch/blackfin/mach-bf527/boards/ezkit.c | 3 ++- arch/blackfin/mach-bf527/boards/tll6527m.c | 3 ++- arch/blackfin/mach-bf537/boards/cm_bf537e.c | 5 ++--- arch/blackfin/mach-bf537/boards/cm_bf537u.c | 5 ++--- arch/blackfin/mach-bf537/boards/dnp5370.c | 3 ++- arch/blackfin/mach-bf537/boards/pnav10.c | 5 ++--- arch/blackfin/mach-bf537/boards/stamp.c | 3 ++- arch/blackfin/mach-bf537/boards/tcm_bf537.c | 5 ++--- 13 files changed, 26 insertions(+), 25 deletions(-) diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c index a2d96d31bbf1..a17395727efa 100644 --- a/arch/blackfin/mach-bf518/boards/ezbrd.c +++ b/arch/blackfin/mach-bf518/boards/ezbrd.c @@ -821,7 +821,7 @@ void native_machine_restart(char *cmd) bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); } -void bfin_get_ether_addr(char *addr) +int bfin_get_ether_addr(char *addr) { /* the MAC is stored in OTP memory page 0xDF */ u32 ret; @@ -834,5 +834,6 @@ void bfin_get_ether_addr(char *addr) for (ret = 0; ret < 6; ++ret) addr[ret] = otp_mac_p[5 - ret]; } + return 0; } EXPORT_SYMBOL(bfin_get_ether_add