From 31e0ecb39b592cc836470d3f76a61c7df4b24084 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 3 Sep 2020 10:00:36 +0200 Subject: drm/vc4: plane: Change LBM alignment constraint on LBM The HVS5 needs an alignment of 64bytes for its LBM memory, so let's reflect it. Signed-off-by: Dave Stevenson Signed-off-by: Maxime Ripard Tested-by: Chanwoo Choi Tested-by: Hoegeun Kwon Tested-by: Stefan Wahren Link: https://patchwork.freedesktop.org/patch/msgid/6f9c4fe1eb9258a3f1d0f21af6a99c42472ac531.1599120059.git-series.maxime@cerno.tech --- drivers/gpu/drm/vc4/vc4_plane.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 20c949b57827..d0771ebd5f75 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -578,7 +578,9 @@ static int vc4_plane_allocate_lbm(struct drm_plane_state *state) spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags); ret = drm_mm_insert_node_generic(&vc4->hvs->lbm_mm, &vc4_state->lbm, - lbm_size, 32, 0, 0); + lbm_size, + vc4->hvs->hvs5 ? 64 : 32, + 0, 0); spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags); if (ret) -- cgit v1.2.3