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2018-01-25wil6210: enlarge FW mac_rgf_ext section for Sparrow D0Lior David
Sparrow D0 chips have slightly larger mac_rgf_ext section in order to support extra features such as multiple virtual interfaces. Signed-off-by: Lior David <liord@codeaurora.org> Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-25wil6210: fix random failure to bring network interface upLior David
Currently when we want to bring the interface up, we first reset the device which causes the boot loader to run. Then we halt the device CPU, load FW image and resume the device CPU. There are some boot loader versions which perform redundant memory accesses even when idle. Halting the device CPU while boot loader access memory can cause the device memory controller to get stuck, the FW will fail to load and the network interface will not come up. For such boot loaders implement a workaround where we freeze the boot loader before halting the device CPU, so it will not perform any memory accesses. Signed-off-by: Lior David <liord@codeaurora.org> Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-25wil6210: configure OTP HW vectors in SW reset flowMaya Erez
OTP HW vectors values are different for 40MHz and 330MHz AHB clocks. In SW reset flow, the host driver sets the clock frequency to 40MHz. In order to allow reading from the OTP, the host driver should configure the OTP HW vectors with the values that fits this clock frequency. Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-25wil6210: support flashless deviceDedy Lansky
Talyn device supports boot without flash. Driver detects flashless device and in this case waits for ready indication from HW machine (instead of bootloader ready indication). Also in this case, MAC address is retrieved from OTP. Signed-off-by: Dedy Lansky <dlansky@codeaurora.org> Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-25wil6210: add support for Talyn AHB address mapMaya Erez
Talyn memory has changed, areas were increased and shifted to new locations. Use the appropriate address map according to the device JTAG ID. Signed-off-by: Dedy Lansky <dlansky@codeaurora.org> Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-25wil6210: recognize Talyn JTAG IDMaya Erez
Add Talyn JTAG ID to the list of valid IDs and identify this device as Talyn. Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-25wil6210: add Talyn PCIe device IDMaya Erez
PCIe device ID has changed in Talyn. Add this ID to wil6210_pcie_ids list to allow recognition of Talyn device. Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-25ath9k: discard undersized packetsFelix Fietkau
Sometimes the hardware will push small packets that trigger a WARN_ON in mac80211. Discard them early to avoid this issue. Reported-by: Stijn Tintel <stijn@linux-ipv6.be> Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-21mlxsw: spectrum_acl: Add support for mirror actionArkadi Sharshevsky
Add support for mirror action. Only one mirror action can be set per rule. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21mlxsw: spectrum: Extend mlxsw_afa_ops for counter index and implement for ↵Arkadi Sharshevsky
Spectrum Introduce extension of mlxsw_afa_ops in order to add/del mirroring and implement the ops for Spectrum. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21mlxsw: spectrum: Extend and export SPAN APIArkadi Sharshevsky
Extend SPAN API for ACL case. In case of ACL triggering the MPAR register shouldn't be configured. This patch also export those helpers for ACL usage. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21mlxsw: spectrum_acl: Add support for mirroring actionArkadi Sharshevsky
The patch extends the trap action for mirroring. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21mlxsw: core: Make counter index allocated inside the action appendJiri Pirko
So far, the caller of mlxsw_afa_block_append_counter needed to allocate counter index by hand. Benefit from the previously introduced resource infra and counter_index_get/put callbacks, and allocate the counter index in place where it is needed, inside the action append function. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21mlxsw: core: Convert fwd_entry_ref list to be generic per-block resource listJiri Pirko
Since the resource list needs to be used also for other entries different to fwd_entry_ref, make the list generic. For that purpose, introduce a resource structure with couple of helpers that the code which need to store a per-block resource should use. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21mlxsw: spectrum: Extend mlxsw_afa_ops for counter index and implement for ↵Jiri Pirko
Spectrum Introduce extension of mlxsw_afa_ops in order to get/put counter indexes and implement the ops for Spectrum. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: bump driver version to match aquantia internal numberingIgor Russkikh
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Report correct mediatype via ethtoolIgor Russkikh
For devices with known capabilities of Fibre media type we now report that to ethtool. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Introduce global AQC hardware reset sequenceIgor Russkikh
The detailed reset sequence ensures all HW components are in aligned state before NIC startup. It also supports cards with signed firmware (RBL) and checks if their FW is valid. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Introduce support for new firmware on AQC cardsIgor Russkikh
This defines fw2x operations table and corresponding methods. Some of the functions are being shared with 1.x firmware Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Introduce firmware ops callbacksIgor Russkikh
New AQC cards will have an updated firmware with new binary interface. This patch extracts firmware specific operations into a separate table and prepares for the introduction of new fw 2.x and 3.x Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Change confusing no_ff_addr to more meaningful nameIgor Russkikh
The address to check if HW is not dead/hang could be stored in capabilities, since it is a constant. Change its name to better reflect the idea. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Remove create/destroy from hw opsIgor Russkikh
These ops are not related to HW and are now implemented in pci module. Thus, remove these ops pointers and implementation. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Cleanup pci functions moduleIgor Russkikh
Driver contained a dead code of maintaining multiple pci port instances. That will never be used since for each pci function a separate NIC instance is created. Simplify this, making pci module only responsible for pci resource management. NIC initialization is also simplified accordingly. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Convert hw and caps structures to const static pointersIgor Russkikh
This removes unnecessary structure copying, and prepares the driver for separate firmware ops table introduction. We also remove extra copy of capabilities structure (which is const actually) and also replace it with a const pointer in aq_nic_cfg. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Introduce new AQC devices and capabilitiesIgor Russkikh
A number of new AQC devices is going to be released. To support more flexible capabilities management a number of static caps instances is now declared. Devices now are mainly differs by supported speeds, but in future more parameters will be customized. A set of AQC100 devices have fibre media, not twisted pair - this is also reflected in new capabilities definitions. HW level also now directly exports hw_ops for each of A0/B0 hardware. PCI configuration now uses a device configuration table where each device ID is explicitly mapped with hardware OPs and capabilities structures. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: aquantia: Introduce new device ids and constantsIgor Russkikh
New set of aquantia devices has an upgraded hardware (B1). The hardware interface is identical to B0. The difference will be in firmware which is incompatible with old one. Reorganized and removed duplicate speed and devid definitions Introduced explicit flow control configuration defines Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21Merge tag 'mlx5-updates-2018-01-19' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5-updates-2018-01-19 From: Or Gerlitz <ogerlitz@mellanox.com> ======= First six patches of this series further enhances the mlx5 hairpin support. The first two patches deal with using different hairpin instances for flows whose packets have different priorities to align with the port TX QoS model. The next four patches allow us to do HW spreading of flows over a set of hairpin pairs using RSS. The last two patches change the driver to also set the size of the HW hairpin queues. ======== Next four patches from Eran Ben Elisha <eranbe@mellanox.com>: Add more debug data for TX timeout handling, and further enhance and optimize TX timeout handling upon lost interrupts, which adds a mechanism for explicitly polling EQ in case of a TX timeout in order to recover from a lost interrupt. If this is not the case (no pending EQEs), perform a channels full recovery as usual. From Kamal Heib <kamalh@mellanox.com>, Two patches to extend the stats group API to have an update_stats() callback which will be used to fetch the hardware or software counters data, this will improve the current API and reduce code duplication. From Gal Pressman <galp@mellanox.com>, Last patch, Add likely to the common RX checksum flow. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21nfp: flower: prioritize stats updatesPieter Jansen van Vuuren
Previously it was possible to interrupt processing stats updates because they were handled in a work queue. Interrupting the stats updates could lead to a situation where we backup the control message queue. This patch moves the stats update processing out of the work queue to be processed as soon as hardware sends a request. Reported-by: Louis Peens <louis.peens@netronome.com> Signed-off-by: Pieter Jansen van Vuuren <pieter.jansenvanvuuren@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-21net: gemini: Depend on HAS_IOMEMLinus Walleij
The zeroday builder notices that since Usermode Linux does not have IO memory, the build fails for them when selecting everything it can enable. As the driver is clearly using memory-mapped registers to access the network adapter, we add depends on HAS_IOMEM to solve this problem. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-20Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextDavid S. Miller
Alexei Starovoitov says: ==================== pull-request: bpf-next 2018-01-19 The following pull-request contains BPF updates for your *net-next* tree. The main changes are: 1) bpf array map HW offload, from Jakub. 2) support for bpf_get_next_key() for LPM map, from Yonghong. 3) test_verifier now runs loaded programs, from Alexei. 4) xdp cpumap monitoring, from Jesper. 5) variety of tests, cleanups and small x64 JIT optimization, from Daniel. 6) user space can now retrieve HW JITed program, from Jiong. Note there is a minor conflict between Russell's arm32 JIT fixes and removal of bpf_jit_enable variable by Daniel which should be resolved by keeping Russell's comment and removing that variable. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
The BPF verifier conflict was some minor contextual issue. The TUN conflict was less trivial. Cong Wang fixed a memory leak of tfile->tx_array in 'net'. This is an skb_array. But meanwhile in net-next tun changed tfile->tx_arry into tfile->tx_ring which is a ptr_ring. Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19net: dsa: mv88e6xxx: Free ATU/VTU irq only when there is chip irqAndrew Lunn
We only register the ATU and VTU irq when we have a chip level IRQ. In the error path, we should only attempt to remove the ATU and VTU irq if we also have a chip level IRQ. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19net: dsa: mv88e6xxx: Return error from irq_find_mapping()Andrew Lunn
Fix a cut/paste error. When irq_find_mapping() returns an error for the ATU or VTU interrupt, return that error, not the value of chip->device_irq. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19mlxsw: spectrum: Upper-bound supported FW versionYuval Mintz
During initialization the driver checks whether the flashed FW image suits its requirements by checking that it's sufficiently new. However, there's only a weak backward compatibility scheme that is actually guaranteed by the FW, so driver must also upper bound the version to prevent compatibility issues between current driver and some possible future fw. Signed-off-by: Yuval Mintz <yuvalm@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: bpf: disable all ctrl vNIC capabilitiesJakub Kicinski
BPF firmware currently exposes IRQ moderation capability. The driver will make use of it by default, inserting 50 usec delay to every control message exchange. This cuts the number of messages per second we can exchange by almost half. None of the other capabilities make much sense for BPF control vNIC, either. Disable them all. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: allow apps to disable ctrl vNIC capabilitiesJakub Kicinski
Most vNIC capabilities are netdev related. It makes no sense to initialize them and waste FW resources. Some are even counter-productive, like IRQ moderation, which will slow down exchange of control messages. Add to nfp_app a mask of enabled control vNIC capabilities for apps to use. Make flower and BPF enable all capabilities for now. No functional changes. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: split reading capabilities out of nfp_net_init()Jakub Kicinski
nfp_net_init() is a little long and we are about to add more code to reading capabilties. Move the capability reading, parsing and validating out. Only actual initialization will stay in nfp_net_init(). No functional changes. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: read mailbox address from TLV capsJakub Kicinski
Allow specifying alternative vNIC mailbox location in TLV caps. This way we can size the mailbox to the needs and not necessarily waste 512B of ctrl memory space. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: read ME frequency from vNIC ctrl memoryJakub Kicinski
PCIe island clock frequency is used when converting coalescing parameters from usecs to NFP timestamps. Most chips don't run at 1200MHz, allow FW to provide us with the real frequency. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: add TLV capabilities to the BARJakub Kicinski
NFP is entirely programmable, including the PCI data interface. Using a fixed control BAR layout certainly makes implementations easier, but require careful considerations when space is allocated. Once BAR area is allocated to one feature nothing else can use it. Allocating space statically also requires it to be sized upfront, which leads to either unnecessary limitation or wastage. We currently have a 32bit capability word defined which tells drivers which application FW features are supported. Most of the bits are exhausted. The same bits are also reused for enabling specific features. Bulk of capabilities don't have a need for an enable bit, however, leading to confusion and wastage. TLVs seems like a better fit for expressing capabilities of applications running on programmable hardware. This patch leaves the front of the BAR as is, and declares a TLV capability start at offset 0x58. Most of the space up to 0x0d90 is already allocated, but the used space can be wrapped with RESERVED TLVs. E.g.: Address Type Length 0x0058 RESERVED 0xe00 /* Wrap basic structures */ 0x0e5c FEATURE_A 0x004 0x0e64 FEATURE_B 0x004 0x0e6c RESERVED 0x990 /* Wrap qeueue stats */ 0x1800 FEATURE_C 0x100 Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: improve app not found messageJakub Kicinski
When driver app matching loaded FW is not found users are faced with: nfp: failed to find app with ID 0x%02x This message does not properly explain that matching driver code is either not built into the driver or the driver is too old. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: protect each repr pointer individually with RCUJakub Kicinski
Representors are grouped in sets by type. Currently the whole sets are under RCU protection, but individual representor pointers are not. This causes some inconveniences when representors have to be destroyed, because we have to allocate new sets to remove any representors. Protect the individual pointers with RCU. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: add nfp_reprs_get_locked() helperJakub Kicinski
The write side of repr tables is always done under pf->lock. Add a helper to dereference repr table pointers under protection of that lock. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: register devlink after app is createdJakub Kicinski
Devlink used to have two global locks: devlink lock and port lock, our lock ordering looked like this: devlink lock -> driver's pf->lock -> devlink port lock After recent changes port lock was replaced with per-instance lock. Unfortunately, new per-instance lock is taken on most operations now. This means we can only grab the pf->lock from the port split/unsplit ops. Lock ordering looks like this: devlink lock -> driver's pf->lock -> devlink instance lock Since we can't take pf->lock from most devlink ops, make sure nfp_apps are prepared to service them as soon as devlink is registered. Locking the pf must be pushed down after nfp_app_init() callback. The init order looks like this: nfp_app_init devlink_register nfp_app_start netdev/port_register As soon as app_init is done nfp_apps must be ready to service devlink-related callbacks. apps can only register their own devlink objects from nfp_app_start. Fixes: 2406e7e546b2 ("devlink: Add per devlink instance lock") Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: release global resources only on the remove pathJakub Kicinski
NFP app is currently shut down as soon as all the vNICs are gone. This means we can't depend on the app existing throughout the lifetime of the device. Free the app only from PCI remove path. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19nfp: core: make scalar CPP helpers fail on short accessesJakub Kicinski
Currently the helpers for accessing 4 or 8 byte values over the CPP bus return the length of IO on success. If the IO was short caller has to deal with error handling. The short IO for 4/8B values is completely impractical. Make the helpers return an error if full access was not possible. Fix the few places which are actually dealing with errors correctly, most call sites already only deal with negative return codes. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-19net/mlx5e: Add likely to the common RX checksum flowGal Pressman
Most of the packets return true for is_last_ethertype_ip, surround it with likely compiler hint. Signed-off-by: Gal Pressman <galp@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-01-19net/mlx5e: Extend the stats group API to have update_stats()Kamal Heib
Extend the stats group API to have an update_stats() callback which will be used to fetch the hardware or software counters data. Signed-off-by: Kamal Heib <kamalh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-01-19net/mlx5e: Merge per priority stats groupsKamal Heib
Merge the per priority traffic and pfc groups into one group, because both groups share the same update_stats() callback which will be introduced in the upcoming patch. Signed-off-by: Kamal Heib <kamalh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-01-19net/mlx5e: Add per-channel counters infrastructure, use it upon TX timeoutEran Ben Elisha
Add per-channel counter ch#_eq_rearm to monitor how many lost interrupt recovery actions happened upon TX timeouts. Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>