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Age	Commit message (Collapse)	Author
2020-01-07	ptp: clockmatrix: Rework clockmatrix version information.	Vincent Cheng
	Simplify and fix the version information displayed by the driver. The new info better relects what is needed to support the hardware. Prev: Version: 4.8.0, Pipeline 22169 0x4001, Rev 0, Bond 5, CSR 311, IRQ 2 New: Version: 4.8.0, Id: 0x4001 Hw Rev: 5 OTP Config Select: 15 - Remove pipeline, CSR and IRQ because version x.y.z already incorporates this information. - Remove bond number because it is not used. - Remove rev number because register was not implemented, always 0 - Add HW Rev ID register to replace rev number - Add OTP config select to show the user configuration chosen by the configurable GPIO pins on start-up Signed-off-by: Vincent Cheng <vincent.cheng.xh@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-03	ptp: Add a ptp clock driver for IDT ClockMatrix.	Vincent Cheng
	The IDT ClockMatrix (TM) family includes integrated devices that provide eight PLL channels. Each PLL channel can be independently configured as a frequency synthesizer, jitter attenuator, digitally controlled oscillator (DCO), or a digital phase lock loop (DPLL). Typically these devices are used as timing references and clock sources for PTP applications. This patch adds support for the device. Co-developed-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Vincent Cheng <vincent.cheng.xh@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>