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path: root/drivers/net/phy
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2020-07-19net: phy: at803x: add mdix configuration support for AR9331 and AR8035Oleksij Rempel
This patch add MDIX configuration ability for AR9331 and AR8035. Theoretically it should work on other Atheros PHYs, but I was able to test only this two. Since I have no certified reference HW able to detect or configure MDIX, this functionality was confirmed by oscilloscope. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: phy: sfp: Cotsworks SFF module EEPROM fixupChris Healy
Some Cotsworks SFF have invalid data in the first few bytes of the module EEPROM. This results in these modules not being detected as valid modules. Address this by poking the correct EEPROM values into the module EEPROM when the model/PN match and the existing module EEPROM contents are not correct. Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: phy: continue searching for C45 MMDs even if first returned ffff:ffffVladimir Oltean
At the time of introduction, in commit bdeced75b13f ("net: dsa: felix: Add PCS operations for PHYLINK"), support for the Lynx PCS inside Felix was relying, for USXGMII support, on the fact that get_phy_device() is able to parse the Lynx PCS "device-in-package" registers for this C45 MDIO device and identify it correctly. However, this was actually working somewhat by mistake (in the sense that, even though it was detected, it was detected for the wrong reasons). The get_phy_c45_ids() function works by iterating through all MMDs starting from 1 (MDIO_MMD_PMAPMD) and stops at the first one which returns a non-zero value in the "device-in-package" register pair, proceeding to see what that non-zero value is. For the Felix PCS, the first MMD (1, for the PMA/PMD) returns a non-zero value of 0xffffffff in the "device-in-package" registers. There is a code branch which is supposed to treat this case and flag it as wrong, and normally, this would have caught my attention when adding initial support for this PCS: if ((devs_in_pkg & 0x1fffffff) == 0x1fffffff) { /* If mostly Fs, there is no device there, then let's probe * MMD 0, as some 10G PHYs have zero Devices In package, * e.g. Cortina CS4315/CS4340 PHY. */ However, this code never actually kicked in, it seems, because this snippet from get_phy_c45_devs_in_pkg() was basically sabotaging itself, by returning 0xfffffffe instead of 0xffffffff: /* Bit 0 doesn't represent a device, it indicates c22 regs presence */ *devices_in_package &= ~BIT(0); Then the rest of the code just carried on thinking "ok, MMD 1 (PMA/PMD) says that there are 31 devices in that package, each having a device id of ffff:ffff, that's perfectly fine, let's go ahead and probe this PHY device". But after cleanup commit 320ed3bf9000 ("net: phy: split devices_in_package"), this got "fixed", and now devs_in_pkg is no longer 0xfffffffe, but 0xffffffff. So now, get_phy_device is returning -ENODEV for the Lynx PCS, because the semantics have remained mostly unchanged: the loop stops at the first MMD that returns a non-zero value, and that is MMD 1. But the Lynx PCS is simply a clause 37 PCS which implements the required MAC-side functionality for USXGMII (when operated in C45 mode, which is where C45 devices-in-package detection is relevant to). Of course it will fail the PMD/PMA test (MMD 1), since it is not a PHY. But it does implement detection for MDIO_MMD_PCS (3): - MDIO_DEVS1=0x008a, MDIO_DEVS2=0x0000, - MDIO_DEVID1=0x0083, MDIO_DEVID2=0xe400 Let get_phy_c45_ids() continue searching for valid MMDs, and don't assume that every phy_device has a PMA/PMD MMD implemented. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-14net: phy: realtek: add support for RTL8125B-internal PHYHeiner Kallweit
Realtek assigned a new PHY ID for the RTL8125B-internal PHY. It's however compatible with the RTL8125A-internal PHY. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-13net: phy: fix mdio-mscc-miim buildBartosz Golaszewski
PHYLIB is not selected by mdio-mscc-miim but it uses mdio devres helpers. Explicitly select MDIO_DEVRES in this driver's Kconfig entry. Reported-by: kernel test robot <lkp@intel.com> Fixes: 1814cff26739 ("net: phy: add a Kconfig option for mdio_devres") Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-09net: phy: mscc: fix ptr_ret.cocci warningskernel test robot
drivers/net/phy/mscc/mscc_ptp.c:1496:1-3: WARNING: PTR_ERR_OR_ZERO can be used Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Generated by: scripts/coccinelle/api/ptr_ret.cocci Fixes: 7d272e63e097 ("net: phy: mscc: timestamping and PHC support") CC: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: kernel test robot <lkp@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-08ethtool: Add support for 100Gbps per lane link modesMeir Lichtinger
Define 100G, 200G and 400G link modes using 100Gbps per lane LR, ER and FR are defined as a single link mode because they are using same technology and by design are fully interoperable. EEPROM content indicates if the module is LR, ER, or FR, and the user space ethtool decoder is planned to support decoding these modes in the EEPROM. Signed-off-by: Meir Lichtinger <meirl@mellanox.com> CC: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Aya Levin <ayal@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-08net: phy: Uninline PHY ethtool statistics operationsFlorian Fainelli
Now that we have moved the PHY ethtool statistics to be dynamically registered, we no longer need to inline those for ethtool. This used to be done to avoid cross symbol referencing and allow ethtool to be decoupled from PHYLIB entirely. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-08net: phy: Define PHY statistics ethtool_phy_opsFlorian Fainelli
Extend ethtool_phy_ops to include the 3 function pointers necessary for implementing PHY statistics. In a subsequent change we will uninline those functions. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: sfp: add error checking with sfp_irq_nameChris Healy
Add error checking with sfp_irq_name before use. Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: Register ethtool PHY operationsFlorian Fainelli
Utilize ethtool_set_ethtool_phy_ops to register a suitable set of PHY ethtool operations in a dynamic fashion such that ethtool will no longer directy reference PHY library symbols. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: add a Kconfig option for mdio_devresBartosz Golaszewski
If phylib is built as a module and CONFIG_MDIO_DEVICE is 'y', the mdio_device and mdio_bus code will be in the phylib module, not in the kernel image. Meanwhile we build mdio_devres depending on the CONFIG_MDIO_DEVICE symbol, so if it's 'y', it will go into the kernel and we'll hit the following linker error: ld: drivers/net/phy/mdio_devres.o: in function `devm_mdiobus_alloc_size': >> drivers/net/phy/mdio_devres.c:38: undefined reference to `mdiobus_alloc_size' ld: drivers/net/phy/mdio_devres.o: in function `devm_mdiobus_free': >> drivers/net/phy/mdio_devres.c:16: undefined reference to `mdiobus_free' ld: drivers/net/phy/mdio_devres.o: in function `__devm_mdiobus_register': >> drivers/net/phy/mdio_devres.c:87: undefined reference to `__mdiobus_register' ld: drivers/net/phy/mdio_devres.o: in function `devm_mdiobus_unregister': >> drivers/net/phy/mdio_devres.c:53: undefined reference to `mdiobus_unregister' ld: drivers/net/phy/mdio_devres.o: in function `devm_of_mdiobus_register': >> drivers/net/phy/mdio_devres.c:120: undefined reference to `of_mdiobus_register' Add a hidden Kconfig option for MDIO_DEVRES which will be currently selected by CONFIG_PHYLIB as there are no non-phylib users of these helpers. Reported-by: kernel test robot <lkp@intel.com> Fixes: ac3a68d56651 ("net: phy: don't abuse devres in devm_mdiobus_register()") Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: mdio-octeon: Cleanup module loading dependenciesAndrew Lunn
To ensure that the octeon MDIO driver has been loaded, the Cavium ethernet drivers reference a dummy symbol in the MDIO driver. This forces it to be loaded first. And this symbol has not been cleanly implemented, resulting in warnings when build W=1 C=1. Since device tree is being used, and a phandle points to the PHY on the MDIO bus, we can make use of deferred probing. If the PHY fails to connect, it should be because the MDIO bus driver has not loaded yet. Return -EPROBE_DEFER so it will be tried again later. Additionally, add a MODULE_SOFTDEP() to give user space a hint as to what order it should load the modules. v2: s/octoen/octeon/ Add MODULE_SOFTDEP() Cc: Sunil Goutham <sgoutham@marvell.com> Cc: Robert Richter <rrichter@marvell.com> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: cavium: Improve __iomem messAndrew Lunn
The MIPS low level register access functions seem to be missing __iomem annotation. This causes lots of sparse warnings, when code casts off the __iomem. Make the Cavium MDIO drivers cleaner by pushing the casts lower down into the helpers, allow the drivers to work as normal, with __iomem. bus->register_base is now an void *, rather than a u64. So forming the mii_bus->id string cannot use %llx any more. Use %px, so this kernel address is still exposed to user space, as it was before. v2: s/cases/causes/g Cc: Sunil Goutham <sgoutham@marvell.com> Cc: Robert Richter <rrichter@marvell.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: dp83640: Fixup cast to restricted __be16 warningAndrew Lunn
ntohs() expects to be passed a __be16. Correct the type of the variable holding the sequence ID. Cc: Richard Cochran <richardcochran@gmail.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: Make phy_10gbit_fec_features_array staticAndrew Lunn
This array is not used outside of phy_device.c, so make it static. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: Properly define genphy_c45_driverAndrew Lunn
Avoid the W=1 warning that symbol 'genphy_c45_driver' was not declared. Should it be static? Declare it on the phy header file. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: Fixup parameters in kerneldocAndrew Lunn
Correct the kerneldoc for a few structure and function calls, as reported by C=1 W=1. Cc: Alexandru Ardelean <alexaundru.ardelean@analog.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: phy: at803x: Avoid comparison is always false warningAndrew Lunn
By placing the GENMASK value into an unsigned int and then passing it to PREF_FIELD, the type is reduces down from ULL. Given the reduced size of the type, the range checks in PREP_FAIL() are always true, and -Wtype-limits then gives a warning. By skipping the intermediate variable, the warning can be avoided. Reviewed-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-07net: sfp: Unique GPIO interrupt namesChris Healy
Dynamically generate a unique GPIO interrupt name, based on the device name and the GPIO name. For example: 103: 0 sx1503q 12 Edge sff2-los 104: 0 sx1503q 13 Edge sff2-tx-fault The sffX indicates the SFP the los and tx-fault are associated with. v3: - reverse Christmas tree new variable - fix spaces vs tabs v2: - added net-next to PATCH part of subject line - switched to devm_kasprintf() Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-30of: mdio: provide devm_of_mdiobus_register()Bartosz Golaszewski
Implement a managed variant of of_mdiobus_register(). We need to make mdio_devres into its own module because otherwise we'd hit circular sumbol dependencies between phylib and of_mdio. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-30net: phy: don't abuse devres in devm_mdiobus_register()Bartosz Golaszewski
We currently have two managed helpers for mdiobus - devm_mdiobus_alloc() and devm_mdiobus_register(). The idea behind devres is that the release callback releases whatever resource the devm function allocates. In the mdiobus case however there's no devres associated with the device by devm_mdiobus_register(). Instead the release callback for devm_mdiobus_alloc(): _devm_mdiobus_free() unregisters the device if it is marked as managed. This all seems wrong. The managed structure shouldn't need to know or care about whether it's managed or not - and this is the case now for struct mii_bus. The devres wrapper should be opaque to the managed resource. This changeset makes devm_mdiobus_alloc() and devm_mdiobus_register() conform to common devres standards: devm_mdiobus_alloc() allocates a devres structure and registers a callback that will call mdiobus_free(). __devm_mdiobus_register() allocated another devres and registers a callback that will unregister the bus. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-30phy: mdio: add kerneldoc for __devm_mdiobus_register()Bartosz Golaszewski
This function is not documented. Add a short kerneldoc description. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-30phy: un-inline devm_mdiobus_register()Bartosz Golaszewski
Functions should only be static inline if they're very short. This devres helper is already over 10 lines and it will grow soon as we'll be improving upon its approach. Pull it into mdio_devres.c. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-29net: phy: marvell10g: support XFI rate matching modeBaruch Siach
When the hardware MACTYPE hardware configuration pins are set to "XFI with Rate Matching" the PHY interface operate at fixed 10Gbps speed. The MAC buffer packets in both directions to match various wire speeds. Read the MAC Type field in the Port Control register, and set the MAC interface speed accordingly. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-26net: phy: mdio: reset MDIO devices even if probe() is not implementedBartosz Golaszewski
Similarily to PHY drivers - there's no reason to require probe() to be implemented in order to call mdio_device_reset(). MDIO devices can have resets defined without needing to do anything in probe(). Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-26net: phy: reset the PHY even if probe() is not implementedBartosz Golaszewski
Currently we only call phy_device_reset() if the PHY driver implements the probe() callback. This is not mandatory and many drivers (e.g. realtek) don't need probe() for most devices but still can have reset GPIOs defined. There's no reason to depend on the presence of probe() here so pull the reset code out of the if clause. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-26net: phy: arrange headers in phy_device.c alphabeticallyBartosz Golaszewski
Keeping the headers in alphabetical order is better for readability and allows to easily see if given header is already included. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-26net: phy: arrange headers in mdio_device.c alphabeticallyBartosz Golaszewski
Keeping the headers in alphabetical order is better for readability and allows to easily see if given header is already included. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-26net: phy: arrange headers in mdio_bus.c alphabeticallyBartosz Golaszewski
Keeping the headers in alphabetical order is better for readability and allows to easily see if given header is already included. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
Minor overlapping changes in xfrm_device.c, between the double ESP trailing bug fix setting the XFRM_INIT flag and the changes in net-next preparing for bonding encryption support. Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: improve vsc8514/8584_config_init consistencyAntoine Tenart
All PHY read and write return values are checked for errors in vsc8514_config_init and vsc8584_config_init, except for one. Fix this. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: remove useless page configuration in the config initAntoine Tenart
In the middle of vsc8584_config_init and vsc8514_config_init, the page is set to 'standard'. This is the default value, and the page isn't set to another value before. Those pages configuration can be safely removed. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: restore the base page in vsc8514/8584_config_initAntoine Tenart
In the vsc8584_config_init and vsc8514_config_init, the base page is set to 'GPIO', configuration is done, and the page is never explicitly restored to the standard page. No bug was triggered as it turns out helpers called in those config_init functions do modify the base page, and set it back to standard. But that is dangerous and any modification to those functions would introduce bugs. This patch fixes this, to improve maintenance, by restoring the base page to 'standard' once 'GPIO' accesses are completed. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: do not access the MDIO bus lock directlyAntoine Tenart
This patch improves the MSCC driver by using the provided phy_lock_mdio_bus and phy_unlock_mdio_bus helpers instead of locking and unlocking the MDIO bus lock directly. The patch is only cosmetic but should improve maintenance and consistency. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: ptp: fix a typo in a commentAntoine Tenart
This patch fixes a typo in a comment, s/Ths/This/. The patch is cosmetic only. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: ptp: fix a smatch errorAntoine Tenart
The following error was reported by smatch: vsc85xx_ts_read_csr() error: uninitialized symbol 'blk_hw'. In practice this is very unlikely, as all the block identifiers given to this functions are handled and described in an enum. The smatch error is fixed by doing what is already done in vsc85xx_ts_write_csr: using the "PROCESSOR" block by default. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: fix a possible double unlockAntoine Tenart
On vsc8584_ptp_init failure we jump to the 'err' label, which unlocks the MDIO bus lock. But vsc8584_ptp_init isn't called with the MDIO bus lock taken, which could result in a double unlock. Fix this. Fixes: ab2bf9339357 ("net: phy: mscc: 1588 block initialization") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: macsec: fix sparse warningsAntoine Tenart
This patch fixes the following sparse warnings when building MACsec support in the MSCC PHY driver. mscc_macsec.c:393:42: warning: cast from restricted sci_t mscc_macsec.c:395:42: warning: restricted sci_t degrades to integer mscc_macsec.c:402:42: warning: restricted __be16 degrades to integer mscc_macsec.c:608:34: warning: cast from restricted sci_t mscc_macsec.c:610:34: warning: restricted sci_t degrades to integer Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: DP83822: Add setting the fixed internal delayDan Murphy
The DP83822 can be configured to use the RGMII interface. There are independent fixed 3.5ns clock shift (aka internal delay) for the TX and RX paths. This allow either one to be set if the MII interface is RGMII and the value is set in the firmware node. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: dp83869: Add RGMII internal delay configurationDan Murphy
Add RGMII internal delay configuration for Rx and Tx. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: Add a helper to return the index for of the internal delayDan Murphy
Add a helper function that will return the index in the array for the passed in internal delay value. The helper requires the array, size and delay value. The helper will then return the index for the exact match or return the index for the index to the closest smaller value. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phylink: only restart AN if the link mode is using in-band ANRussell King
If we are not using in-band autonegotiation, there is no point passing the request to restart autonegotiation on to the driver. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phylink: add phylink_speed_(up|down) interfaceRussell King
Add an interface for the phy_speed_(up|down) functions when a driver makes use of phylink. These pass the call through to phylib when we have a normal PHY attached (i.o.w., not a PHY on a SFP module.) Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25net: phy: mscc: avoid skcipher API for single block AES encryptionArd Biesheuvel
The skcipher API dynamically instantiates the transformation object on request that implements the requested algorithm optimally on the given platform. This notion of optimality only matters for cases like bulk network or disk encryption, where performance can be a bottleneck, or in cases where the algorithm itself is not known at compile time. In the mscc case, we are dealing with AES encryption of a single block, and so neither concern applies, and we are better off using the AES library interface, which is lightweight and safe for this kind of use. Note that the scatterlist API does not permit references to buffers that are located on the stack, so the existing code is incorrect in any case, but avoiding the skcipher and scatterlist APIs entirely is the most straight-forward approach to fixing this. Cc: Antoine Tenart <antoine.tenart@bootlin.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Fixes: 28c5107aa904e ("net: phy: mscc: macsec support") Reviewed-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24net: phy: call phy_disable_interrupts() in phy_init_hw()Jisheng Zhang
Call phy_disable_interrupts() in phy_init_hw() to "have a defined init state as we don't know in which state the PHY is if the PHY driver is loaded. We shouldn't assume that it's the chip power-on defaults, BIOS or boot loader could have changed this. Or in case of dual-boot systems the other OS could leave the PHY in whatever state." as pointed out by Heiner. Suggested-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24net: phy: make phy_disable_interrupts() non-staticJisheng Zhang
We face an issue with rtl8211f, a pin is shared between INTB and PMEB, and the PHY Register Accessible Interrupt is enabled by default, so the INTB/PMEB pin is always active in polling mode case. As Heiner pointed out "I was thinking about calling phy_disable_interrupts() in phy_init_hw(), to have a defined init state as we don't know in which state the PHY is if the PHY driver is loaded. We shouldn't assume that it's the chip power-on defaults, BIOS or boot loader could have changed this. Or in case of dual-boot systems the other OS could leave the PHY in whatever state." Make phy_disable_interrupts() non-static so that it could be used in phy_init_hw() to have a defined init state. Suggested-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24net: phy: mscc: timestamping and PHC supportAntoine Tenart
This patch adds support for PHC and timestamping operations for the MSCC PHY. PTP 1-step and 2-step modes are supported, over Ethernet and UDP. To get and set the PHC time, a GPIO has to be used and changes are only retrieved or committed when on a rising edge. The same GPIO is shared by all PHYs, so the granularity of the lock protecting it has to be different from the ones protecting the 1588 registers (the VSC8584 PHY has 2 1588 blocks, and a single load/save pin). Co-developed-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24net: phy: mscc: 1588 block initializationQuentin Schulz
This patch adds the first parts of the 1588 support in the MSCC PHY, with registers definition and the 1588 block initialization. Those PHYs are distributed in hardware packages containing multiple times the PHY. The VSC8584 for example is composed of 4 PHYs. With hardware packages, parts of the logic is usually common and one of the PHY has to be used for some parts of the initialization. Following this logic, the 1588 blocks of those PHYs are shared between two PHYs and accessing the registers has to be done using the "base" PHY of the group. This is handled thanks to helpers in the PTP code (and locks). We also need the MDIO bus lock while performing a single read or write to the 1588 registers as the read/write are composed of multiple MDIO transactions (and we don't want other threads updating the page). Co-developed-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24net: phy: mscc: take into account the 1588 block in MACsec initAntoine Tenart
This patch takes in account the use of the 1588 block in the MACsec initialization, as a conditional configuration has to be done (when the 1588 block is used). Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>