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path: root/drivers/net/ethernet/marvell/octeontx2/af
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2020-11-17octeontx2-pf: Implement ingress/egress VLAN offloadHariprasad Kelam
This patch implements egress VLAN offload by appending NIX_SEND_EXT_S header to NIX_SEND_HDR_S. The VLAN TCI information is specified in the NIX_SEND_EXT_S. The VLAN offload in the ingress path is implemented by configuring the NIX_RX_VTAG_ACTION_S to strip and capture the outer vlan fields. The NIX PF allocates one MCAM entry for Rx VLAN offload. Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17octeontx2-af: Modify nix_vtag_cfg mailbox to support TX VTAG entriesVamsi Attunuru
This patch modifies the existing nix_vtag_config mailbox message to allocate and free TX VTAG entries as requested by a NIX PF. The TX VTAG entries are global resource that shared by all PFs and each entry specifies the size of VTAG to insert and the VTAG header data to insert. The mailbox response contains the entry index which is used by mailbox requester in configuring the NPC_TX_VTAG_ACTION for any MCAM entry. Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17octeontx2-af: Add debugfs entry to dump the MCAM rulesSubbaraya Sundeep
Add debugfs support to dump the MCAM rules installed using NPC_INSTALL_FLOW mbox message. Debugfs file can display mcam entry, counter if any, flow type and counter hits. Ethtool will dump the ntuple flows related to the PF only. The debugfs file gives systemwide view of the MCAM rules installed by all the PF's. Below is the example output when the debugfs file is read: ~ # mount -t debugfs none /sys/kernel/debug ~ # cat /sys/kernel/debug/octeontx2/npc/mcam_rules Installed by: PF1 direction: RX mcam entry: 227 udp source port 23 mask 0xffff Forward to: PF1 VF0 action: Direct to queue 0 enabled: yes counter: 1 hits: 0 Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17octeontx2-af: Add mbox messages to install and delete MCAM rulesSubbaraya Sundeep
Added new mailbox messages to install and delete MCAM rules. These mailbox messages will be used for adding/deleting ethtool n-tuple filters by NIX PF. The installed MCAM rules are stored in a list that will be traversed later to delete the MCAM entries when the interface is brought down or when PCIe FLR is received. The delete mailbox supports deleting a single MCAM entry or range of entries or all the MCAM entries owned by the pcifunc. Each MCAM entry can be associated with a HW match stat entry if the mailbox requester wants to check the hit count for debugging. Modified adding default unicast DMAC match rule using install flow API. The default unicast DMAC match entry installed by Administrative Function is saved and can be changed later by the mailbox user to fit additional fields, or the default MCAM entry rule action can be used for other flow rules installed later. Modified rvu_mbox_handler_nix_lf_free mailbox to add a flag to disable or delete the MCAM entries. The MCAM entries are disabled when the interface is brought down and deleted in FLR handler. The disabled MCAM entries will be re-enabled when the interface is brought up again. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17octeontx2-af: Generate key field bit mask from KEX profileSubbaraya Sundeep
Key Extraction(KEX) profile decides how the packet metadata such as layer information and selected packet data bytes at each layer are placed in MCAM search key. This patch reads the configured KEX profile parameters to find out the bit position and bit mask for each field. The information is used when programming the MCAM match data by SW to match a packet flow and take appropriate action on the flow. This patch also verifies the mandatory fields such as channel and DMAC are not overwritten by the KEX configuration of other fields. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17octeontx2-af: Verify MCAM entry channel and PF_FUNCSubbaraya Sundeep
This patch adds support to verify the channel number sent by mailbox requester before writing MCAM entry for Ingress packets. Similarly for Egress packets, verifying the PF_FUNC sent by the mailbox user. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17octeontx2-af: Modify default KEX profile to extract TX packet fieldsStanislaw Kardach
The current default Key Extraction(KEX) profile can only use RX packet fields while generating the MCAM search key. The profile can't be used for matching TX packet fields. This patch modifies the default KEX profile to add support for extracting TX packet fields into MCAM search key. Enabled Tx KPU packet parsing by configuring TX PKIND in tx_parse_cfg. Modified the KEX profile to extract 2 bytes of VLAN TCI from an offset of 2 bytes from LB_PTR. The LB_PTR points to the byte offset where the VLAN header starts. The NPC KPU parser profile has been modified to point LB_PTR to the starting byte offset of VLAN header which points to the tpid field. Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Display CGX, NIX and PF map in debugfs.Rakesh Babu
Unlike earlier silicon variants, OcteonTx2 98xx silicon has 2 NIX blocks and each of the CGX is mapped to either of the NIX blocks. Each NIX block supports 100G. Mapping btw NIX blocks and CGX is done by firmware based on CGX speed config to have a maximum possible network bandwidth. Since the mapping is not fixed, it's difficult for a user to figure out. Hence added a debugfs entry which displays mapping between CGX LMAC, NIX block and RVU PF. Sample result of this entry :: ~# cat /sys/kernel/debug/octeontx2/rvu_pf_cgx_map PCI dev RVU PF Func NIX block CGX LMAC 0002:02:00.0 0x400 NIX0 CGX0 LMAC0 Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Display NIX1 also in debugfsRakesh Babu
If NIX1 block is also implemented then add a new directory for NIX1 in debugfs root. Stats of NIX1 block can be read/writen from/to the files in directory "/sys/kernel/debug/octeontx2/nix1/". Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Mbox changes for 98xxSubbaraya Sundeep
This patch puts together all mailbox changes for 98xx silicon: Attach -> Modify resource attach mailbox handler to request LFs from a block address out of multiple blocks of same type. If a PF/VF need LFs from two blocks of same type then attach mbox should be called twice. Example: struct rsrc_attach *attach; .. Allocate memory for message .. attach->cptlfs = 3; /* 3 LFs from CPT0 */ .. Send message .. .. Allocate memory for message .. attach->modify = 1; attach->cpt_blkaddr = BLKADDR_CPT1; attach->cptlfs = 2; /* 2 LFs from CPT1 */ .. Send message .. Detach -> Update detach mailbox and its handler to detach resources from CPT1 and NIX1 blocks. MSIX -> Updated the MSIX mailbox and its handler to return MSIX offsets for the new block CPT1. Free resources -> Update free_rsrc mailbox and its handler to return the free resources count of new blocks NIX1 and CPT1 Links -> Number of CGX,LBK and SDP links may vary between platforms. For example, in 98xx number of CGX and LBK links are more than 96xx. Hence the info about number of links present in hardware is useful for consumers to request link configuration properly. This patch sends this info in nix_lf_alloc_rsp. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Add NIX1 interfaces to NPCSubbaraya Sundeep
On 98xx silicon, NPC block has additional mcam entries, counters and NIX1 interfaces. Extended set of registers are present for the new mcam entries and counters. This patch does the following: - updates the register accessing macros to use extended set if present. - configures the MKEX profile for NIX1 interfaces also. - updates mcam entry write functions to use assigned NIX0/1 interfaces for the PF/VF. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Setup MCE context for assigned NIXSubbaraya Sundeep
Initialize MCE context for the assigned NIX0/1 block for a CGX mapped PF. Modified rvu_nix_aq_enq_inst function to work with nix_hw so that MCE contexts for both NIX blocks can be inited. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Map NIX block from CGX connectionSubbaraya Sundeep
Firmware configures NIX block mapping for all CGXs to achieve maximum throughput. This patch reads the configuration and create mapping between RVU PF and NIX blocks. And for LBK VFs assign NIX0 for even numbered VFs and NIX1 for odd numbered VFs. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Initialize NIX1 blockRakesh Babu
This patch modifies NIX functions to operate with nix_hw context so that existing functions can be used for both NIX0 and NIX1 blocks. And the NIX blocks present in the system are initialized during driver init and freed during exit. Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Manage new blocks in 98xxRakesh Babu
AF manages the tasks of allocating, freeing LFs from RVU blocks to PF and VFs. With new NIX1 and CPT1 blocks in 98xx, this patch adds support for handling new blocks too. Co-developed-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-31octeontx2-af: Update get/set resource count functionsSubbaraya Sundeep
Since multiple blocks of same type are present in 98xx, modify functions which get resource count and which update resource count to work with individual block address instead of block type. Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-05Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
Rejecting non-native endian BTF overlapped with the addition of support for it. The rest were more simple overlapping changes, except the renesas ravb binding update, which had to follow a file move as well as a YAML conversion. Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-30octeontx2-pf: Fix synchnorization issue in mboxHariprasad Kelam
Mbox implementation in octeontx2 driver has three states alloc, send and reset in mbox response. VF allocate and sends message to PF for processing, PF ACKs them back and reset the mbox memory. In some case we see synchronization issue where after msgs_acked is incremented and before mbox_reset API is called, if current execution is scheduled out and a different thread is scheduled in which checks for msgs_acked. Since the new thread sees msgs_acked == msgs_sent it will try to allocate a new message and to send a new mbox message to PF.Now if mbox_reset is scheduled in, PF will see '0' in msgs_send. This patch fixes the issue by calling mbox_reset before incrementing msgs_acked flag for last processing message and checks for valid message size. Fixes: d424b6c02 ("octeontx2-pf: Enable SRIOV and added VF mbox handling") Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-30octeontx2-af: Fix enable/disable of default NPC entriesSubbaraya Sundeep
Packet replication feature present in Octeontx2 is a hardware linked list of PF and its VF interfaces so that broadcast packets are sent to all interfaces present in the list. It is driver job to add and delete a PF/VF interface to/from the list when the interface is brought up and down. This patch fixes the npc_enadis_default_entries function to handle broadcast replication properly if packet replication feature is present. Fixes: 40df309e4166 ("octeontx2-af: Support to enable/disable default MCAM entries") Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-29octeontx2-af: add parser support for NAT-T-ESPKiran Kumar K
Add support for NAT-T-ESP to KPU parser configuration. NAT ESP is a UDP based protocol. So move ESP to LE so that both UDP and ESP can be extracted. Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Acked-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-29octeontx2-af: optimize parsing of IPv6 fragmentsAbhijit Ayarekar
IPv6 fragmented packet may not contain completed layer 4 information. So stop KPU parsing after setting ipv6 fragmentation flag. Signed-off-by: Abhijit Ayarekar <aayarekar@marvell.com> Acked-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-29octeontx2-af: Add IPv6 fields to default MKEXVidhya Vidhyaraman
Added some IPv6 protocol fields to the default MKEX profile. They include everything from the beginning of IP header and up to source address. The pattern occupies full KW2 in MCAM entry. Only one out of two LD registers for this protocol is used. Signed-off-by: Vidhya Vidhyaraman <vraman@marvell.com> Acked-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-29octeontx2-af: fix Extended DSA and eDSA parsingSatha Rao
KPU profile interpret Extended DSA and eDSA by looking source dev. This was incorrect and it restricts to use few source device ids and also created confusion while parsing regular DSA tag. With below patch lookup was based on bit 12 of Word0. This is always zero for DSA tag and it should be one for Extended DSA and eDSA. Signed-off-by: Satha Rao <skoteshwar@marvell.com> Acked-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-29octeontx2-af: add parser support for Forward DSAHariprasad Kelam
Marvell Prestera switches supports distributed switch architecture by inserting Forward DSA tag of 4 bytes right after ethernet SMAC. This tag don't have a tpid field. This patch provides parser and extraction support for the same. Default ldata extraction profile added for FDSA such that Src_port is extracted and placed inplace of vlanid field. Like extended DSA and eDSA tags,a special PKIND of 62 is used for this tag. Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Acked-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-29octeontx2-af: cleanup KPU config dataStanislaw Kardach
Refactor KPU related NPC code gathering all configuration data in a structured format and putting it in one place (npc_profile.h). This increases readability and makes it easier to extend the profile configuration (as opposed to jumping between multiple header and source files). To do this: * Gather all KPU profile related data into a single adapter struct. * Convert the built-in MKEX definition to a structured one to streamline the MKEX loading. * Convert LT default register configuration into a structure, keeping default protocol settings in same file where identifiers for those protocols are defined. * Add a single point for KPU profile loading, so that its source may change in the future once proper interfaces for loading such config are in place. Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Acked-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-29octeontx2-af: fix LD CUSTOM LTYPE aliasingStanislaw Kardach
Since LD contains LTYPE definitions tweaked toward efficient NIX_AF_RX_FLOW_KEY_ALG(0..31)_FIELD(0..4) usage, the original location of NPC_LT_LD_CUSTOM0/1 was aliased with MPLS_IN_* definitions. Moving custom frame to value 6 and 7 removes the aliasing at the cost of custom frames being also considered when TCP/UDP RSS algo is configured. However since the goal of CUSTOM frames is to classify them to a separate set of RQs, this cost is acceptable. Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Acked-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-23octeontx2-af: Add support for VLAN based RSS hashingGeorge Cherian
Added support for PF/VF drivers to choose RSS flow key algorithm with VLAN tag included in hashing input data. Only CTAG is considered. Signed-off-by: George Cherian <george.cherian@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-23octeontx2-af: Introduce tracepoints for mailboxSubbaraya Sundeep
Added tracepoints in mailbox code so that the mailbox operations like message allocation, sending message and message interrupts are traced. Also the mailbox errors occurred like timeout or wrong responses are traced. These will help in debugging mailbox issues. Here's an example output showing one of the mailbox messages sent by PF to AF and AF responding to it: ~# mount -t tracefs none /sys/kernel/tracing/ ~# echo 1 > /sys/kernel/tracing/events/rvu/enable ~# ifconfig eth0 up ~# cat /sys/kernel/tracing/trace ~# cat /sys/kernel/tracing/trace tracer: nop _-----=> irqs-off / _----=> need-resched | / _---=> hardirq/softirq || / _--=> preempt-depth ||| / delay TASK-PID CPU# |||| TIMESTAMP FUNCTION | | | |||| | | ifconfig-2382 [002] .... 756.161892: otx2_msg_alloc: [0002:02:00.0] msg:(0x400) size:40 ifconfig-2382 [002] ...1 756.161895: otx2_msg_send: [0002:02:00.0] sent 1 msg(s) of size:48 <idle>-0 [000] d.h1 756.161902: otx2_msg_interrupt: [0002:01:00.0] mbox interrupt PF(s) to AF (0x2) kworker/u49:0-1165 [000] .... 756.162049: otx2_msg_process: [0002:01:00.0] msg:(0x400) error:0 kworker/u49:0-1165 [000] ...1 756.162051: otx2_msg_send: [0002:01:00.0] sent 1 msg(s) of size:32 kworker/u49:0-1165 [000] d.h. 756.162056: otx2_msg_interrupt: [0002:02:00.0] mbox interrupt AF to PF (0x1) Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-11octeontx2-af: Constify npc_kpu_profile_{action,cam}Rikard Falkeborn
These are never modified, so constify them to allow the compiler to place them in read-only memory. This moves about 25kB to read-only memory as seen by the output of the size command. Before: text data bss dec hex filename 296203 65464 1248 362915 589a3 drivers/net/ethernet/marvell/octeontx2/af/octeontx2_af.ko After: text data bss dec hex filename 321003 40664 1248 362915 589a3 drivers/net/ethernet/marvell/octeontx2/af/octeontx2_af.ko Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-04Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
We got slightly different patches removing a double word in a comment in net/ipv4/raw.c - picked the version from net. Simple conflict in drivers/net/ethernet/ibm/ibmvnic.c. Use cached values instead of VNIC login response buffer (following what commit 507ebe6444a4 ("ibmvnic: Fix use-after-free of VNIC login response buffer") did). Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-08-24octeontx2-af: Add support for Marvell PTP coprocessorAleksey Makarov
Precision Timestamping block found on Octeontx2 platform is an independent coprocessor and has internal PTP hardware clock. Once configured PTP runs independently and when a packet arrives CGX hardware block gets the current timestamp from PTP block and forwards the packet to NIX by prepending timestamp to the packet. This patch adds the pci driver for PTP block. The driver gets registered by AF driver and does initial configuration and exposes a mailbox function to read and adjust PTP hardware clock. The mailbox function is called by AF consumers like netdev drivers or userspace drivers. Since PTP being a single block in platform this driver helps in accessing PTP block by any AF consumer. Co-developed-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Aleksey Makarov <amakarov@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-24octeontx2-af: Support to enable/disable HW timestampingZyta Szpak
Four new mbox messages ids and handler are added in order to enable or disable timestamping procedure on tx and rx side. Additionally when PTP is enabled, the packet parser must skip over 8 bytes and start analyzing packet data there. To make NPC profiles work seemlesly PTR_ADVANCE of IKPU is set so that parsing can be done as before when all data pointers are shifted by 8 bytes automatically. Co-developed-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Zyta Szpak <zyta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2020-06-18octeontx2-af: change (struct qmem)->entry_sz from u8 to u16Eric Dumazet
We need to increase TSO_HEADER_SIZE from 128 to 256. Since otx2_sq_init() calls qmem_alloc() with TSO_HEADER_SIZE, we need to change (struct qmem)->entry_sz to avoid truncation to 0. Fixes: 7a37245ef23f ("octeontx2-af: NPA block admin queue init") Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-af: Remove driver version and fix authorshipSunil Goutham
Removed MODULE_VERSION and fixed MODULE_AUTHOR. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Reviewed-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03octeontx2-af: fix spelling mistake "backpessure" -> "backpressure"Colin Ian King
There is a spelling mistake in a dev_warn message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-02octeontx2-af: Modify rvu_reg_poll() to check reg atleast twiceSunil Goutham
Currently on the first check if the operation is still not finished, the poll goes to sleep for 2-5 usecs. But if for some reason (due to other priority stuff like interrupts etc) by the time the poll wakes up the 10ms time is expired then we don't check if operation is finished or not and return failure. This patch modifies poll logic to check HW operation after sleep so that the status is checked atleast twice. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-02octeontx2-af: Enable PCI masterSunil Goutham
Bus mastering is enabled by firmware, but when this driver is unbinded bus mastering gets disabled by the PCI subsystem which results interrupts not working when driver is reloaded. Hence set bus mastering everytime in probe(). Also - Converted pci_set_dma_mask() and pci_set_consistent_dma_mask() to dma_set_mask_and_coherent(). - Cleared transaction pending bit which gets set during driver unbind due to clearing of bus mastering (ME bit). Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-02octeontx2-af: Set discovery ID for RVUM blockSunil Goutham
Currently there is no way for AF dependent drivers in any domain to check if the AF driver is loaded. This patch sets an ID for RVUM block which will automatically reflects in PF/VFs discovery register which they can check and defer their probe until AF is up. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-02octeontx2-af: Optimize data retrieval from firmwareLinu Cherian
For retrieving info like interface MAC addresses, packet parser key extraction config etc currently a command is sent to firmware and firmware which periodically polls for commands, processes these and returns the info. This is resulting in interface initialization taking lot of time. To optimize this a memory region is shared between firmware and this driver, firmware while booting puts static info like these into that region for driver to read directly without using commands. With this - Logic for retrieving packet parser extraction config via commands is removed and repalced with using the shared 'fwdata' structure. - Now RVU MSIX vector address is also retrieved from this fwdata struct instead of from CSR. Otherwise when kexec/kdump crash kernel loads CSR will have a IOVA setup by primary kernel which impacts RVU PF/VF's interrupts. - Also added a mbox handler for PF/VF interfaces to retrieve their MAC addresses from AF. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Christina Jacob <cjacob@marvell.com> Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-02octeontx2-af: Pause frame configuration at cgxGeetha sowjanya
CGX LMAC, the physical interface can generate pause frames when internal resources asserts backpressure due to exhaustion. This patch configures CGX to generate 802.3 pause frames. Also enabled processing of received pause frames on the line which will assert backpressure on the internal transmit path. Also added mailbox handlers for PF drivers to enable or disable pause frames anytime. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-02octeontx2-af: Interface backpressure configurationGeetha sowjanya
Each of the interface receive channels can be backpressured by resources upon exhaustion or reaching configured threshold levels. Resources here are receive buffer queues (Auras) and pkt notification descriptor queues (CQs). Resources and interface channels are mapped using backpressure IDs (BPIDs). HW supports upto 512 BPIDs, this patch divides these BPIDs statically across CGX/LBK/SDP interfaces as follows. BPIDs 0 - 191 are mapped to LMAC channels, 16 per LMAC. BPIDs 192 - 255 are mapped to LBK channels. BPIDs 256 - 511 are mapped to SDP channels. Also did the needed basic configuration of BPIDs. Added mbox handlers with which a PF device can request for a BPID which it will use to configure Auras and CQs. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-02-19octeontx2-af: Cleanup nixlf and blkaddr retrieval logicSunil Goutham
Cleanedup repititive nixlf and blkaddr retrieving logic is various mailbox handlers throughout the rvu_nix.c file. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-02-19octeontx2-af: Cleanup CGX config permission checksSunil Goutham
Most of the CGX register config is restricted to mapped RVU PFs, this patch cleans up these permission checks spread across the rvu_cgx.c file by moving the checks to a common fn(). Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-02-19octeontx2-af: Remove unnecessary export symbols in CGX driverSunil Goutham
Since CGX driver and AF driver are built into a single module the export symbols in CGX driver are not needed. This patch gets rid of them. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: MTU, MAC and RX mode config supportSunil Goutham
This patch addes support to change interface MTU, MAC address retrieval and config, RX mode ie unicast, multicast and promiscuous. Also added link loopback support Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Initialize and config queuesSunil Goutham
This patch does the initialization of all queues ie the receive buffer pools, receive and transmit queues, completion or notification queues etc. Allocates all required resources (eg transmit schedulers, receive buffers etc) and configures them for proper functioning of queues. Also sets up receive queue's RED dropping levels. Co-developed-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-21octeontx2-af: Fix uninitialized variable in debugfsDan Carpenter
If rvu_get_blkaddr() fails, then this rvu_cgx_nix_cuml_stats() returns zero and we write some uninitialized data into the debugfs output. On the error paths, the use of the uninitialized "*stat" is harmless, but it will lead to a Smatch warning (static analysis) and a UBSan warning (runtime analysis) so we should prevent that as well. Fixes: f967488d095e ("octeontx2-af: Add per CGX port level NIX Rx/Tx counters") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
Lots of overlapping changes and parallel additions, stuff like that. Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-16octeontx2-af: Use the correct style for SPDX License IdentifierNishad Kamdar
This patch corrects the SPDX License Identifier style in header files related to Marvell OcteonTX2 network devices. It uses an expilict block comment for the SPDX License Identifier. Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>