summaryrefslogtreecommitdiffstats
path: root/drivers/gpu
AgeCommit message (Collapse)Author
2014-05-20Merge tag 'drm-intel-fixes-2014-05-16' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-fixes Intel fixes for regressions, black screens and hangs, for 3.15. * tag 'drm-intel-fixes-2014-05-16' of git://anongit.freedesktop.org/drm-intel: drm/i915: Increase WM memory latency values on SNB drm/i915: restore backlight precision when converting from ACPI drm/i915: Use the first mode if there is no preferred mode in the EDID drm/i915/dp: force eDP lane count to max available lanes on BDW drm/i915/vlv: reset VLV media force wake request register drm/i915/SDVO: For sysfs link put directory and target in correct order drm/i915: use lane count and link rate from VBT as minimums for eDP drm/i915: clean up VBT eDP link param decoding drm/i915: consider the source max DP lane count too
2014-05-15drm/i915: Increase WM memory latency values on SNBVille Syrjälä
On SNB the BIOS provided WM memory latency values seem insufficient to handle high resolution displays. In this particular case the display mode was a 2560x1440@60Hz, which makes the pixel clock 241.5 MHz. It was empirically found that a memory latency value if 1.2 usec is enough to avoid underruns, whereas the BIOS provided value of 0.7 usec was clearly too low. Incidentally 1.2 usec is what the typical BIOS provided values are on IVB systems. Increase the WM memory latency values to at least 1.2 usec on SNB. Hopefully this won't have a significant effect on power consumption. v2: Increase the latency values regardless of the pixel clock Cc: Robert N <crshman@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70254 Tested-by: Robert Navarro <crshman@gmail.com> Tested-by: Vitaly Minko <vitaly.minko@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-15drm/i915: restore backlight precision when converting from ACPIAaron Lu
When we set backlight on behalf of ACPI opregion, we will convert the backlight value in the 0-255 range defined in opregion to the actual hardware level. Commit 22505b82a2 (drm/i915: avoid brightness overflow when doing scale) is meant to fix the overflow problem when doing the conversion, but it also caused a problem that the converted hardware level doesn't quite represent the intended value: say user wants maximum backlight level(255 in opregion's range), then we will calculate the actual hardware level to be: level = freq / max * level, where freq is the hardware's max backlight level(937 on an user's box), and max and level are all 255. The converted value should be 937 but the above calculation will yield 765. To fix this issue, just use 64 bits to do the calculation to keep the precision and avoid overflow at the same time. Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=72491 Reported-by: Nico Schottelius <nico-bugzilla.kernel.org@schottelius.org> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org Signed-off-by: Aaron Lu <aaron.lu@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-15drm/i915: Use the first mode if there is no preferred mode in the EDIDChris Wilson
This matches the algorithm used by earlier kernels when selecting the mode for the fbcon. And only if there is no modes at all, do we fall back to using the BIOS configuration. Seamless transition is still preserved (from the BIOS configuration to ours) so long as the BIOS has also chosen what we hope is the native configuration. Reported-by: Knut Petersen <Knut_Petersen@t-online.de> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78655 Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Knut Petersen <Knut_Petersen@t-online.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [Jani: applied Chris' "Please imagine that I wrote this correctly."] Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-15drm/i915/dp: force eDP lane count to max available lanes on BDWJani Nikula
There are certain BDW high res eDP machines that regressed due to commit 38aecea0ccbb909d635619cba22f1891e589b434 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Mar 3 11:18:10 2014 +0100 drm/i915: reverse dp link param selection, prefer fast over wide again The commit lead to 2 lanes at 5.4 Gbps being used instead of 4 lanes at 2.7 Gbps on the affected machines. Link training succeeded for both, but the screen remained blank with the former config. Further investigation showed that 4 lanes at 5.4 Gbps worked also. The root cause for the blank screen using 2 lanes remains unknown, but apparently the driver for a certain other operating system by default uses the max available lanes. Follow suit on Broadwell eDP, for at least until we figure out what is going on. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76711 Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Tested-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-09drm/i915/vlv: reset VLV media force wake request registerJani Nikula
Media force wake get hangs the machine when the system is booted without displays attached. The assumption is that (at least some versions of) the firmware has skipped some initialization in that case. Empirical evidence suggests we need to reset the media force wake request register in addition to the render one to avoid hangs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75895 Reported-by: Imre Deak <imre.deak@intel.com> Reported-by: Darren Hart <dvhart@linux.intel.com> Tested-by: Darren Hart <dvhart@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-07drm/i915/SDVO: For sysfs link put directory and target in correct orderEgbert Eich
When linking the i2c sysfs file into the connector's directory pass directory and link target in the right order. This code was introduced with: commit 931c1c26983b4f84e33b78579fc8d57e4a14c6b4 Author: Imre Deak <imre.deak@intel.com> Date: Tue Feb 11 17:12:51 2014 +0200 drm/i915: sdvo: add i2c sysfs symlink to the connector's directory This is the same what we do for DP connectors, so make things more consistent. Signed-off-by: Egbert Eich <eich@suse.de> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-07drm/i915: use lane count and link rate from VBT as minimums for eDPJani Nikula
Most likely the minimums for both should be enough for enabling the native resolution on the eDP, and we'll end up using the predetermined optimal link config for the panel. v2: Add debug prints. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73539 Tested-by: Markus Blank-Burian <burian@muenster.de> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-07drm/i915: clean up VBT eDP link param decodingJani Nikula
Use defines, do not set anything if VBT has values unknown to us. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-07drm/i915: consider the source max DP lane count tooPaulo Zanoni
Even if the panel claims it can support 4 lanes, there's the possibility that the HW can't, so consider this while selecting the max lane count. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-05-07Merge branch 'mullins' of git://people.freedesktop.org/~deathsimple/linux ↵Dave Airlie
into drm-fixes Add Mullins chips support. * 'mullins' of git://people.freedesktop.org/~deathsimple/linux: drm/radeon: add pci ids for Mullins drm/radeon: add Mullins VCE support drm/radeon: modesetting updates for Mullins. drm/radeon: dpm updates for KV/KB drm/radeon: add Mullins dpm support. drm/radeon: add Mullins UVD support. drm/radeon: update cik init for Mullins. drm/radeon: add Mullins chip family
2014-05-07Merge branch 'drm-nouveau-next' of ↵Dave Airlie
git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes nouveau fixes. * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/gm107/gr: bump attrib cb size quite a bit drm/nouveau: fix another lock unbalance in nouveau_crtc_page_flip drm/nouveau/bios: fix shadowing from PROM on big-endian systems drm/nouveau/acpi: allow non-optimus setups to load vbios from acpi
2014-05-07Merge tag 'topc/core-stuff-2014-05-05' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-fixes Some more i915 fixes. There's still some DP issues we are looking into, but wanted to get these moving. * tag 'topc/core-stuff-2014-05-05' of git://anongit.freedesktop.org/drm-intel: drm/i915: don't try DP_LINK_BW_5_4 on HSW ULX drm/i915: Sanitize the enable_ppgtt module option once drm/i915: Break encoder->crtc link separately in intel_sanitize_crtc()
2014-05-06drm/radeon: add Mullins VCE supportLeo Liu
VCE 2.0 just like the other CIK parts. Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: modesetting updates for Mullins.Samuel Li
Uses the same code as Kabini. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: dpm updates for KV/KBAlex Deucher
- Use vddc/sclk dep table for voltage if available - Fix UVD DPM setup - Patch voltage tables properly for non-UVD blocks - Fix DPM + UVD/VCE on Mullins Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: add Mullins dpm support.Samuel Li
Generic dpm support similar to Kabini. Mullins specific features will be worked on later. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: add Mullins UVD support.Samuel Li
Has same version of UVD as other CIK parts. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: update cik init for Mullins.Samuel Li
Also add golden registers, update firmware loading functions. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: add Mullins chip familySamuel Li
Mullins is a new CI-based APU. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: lower the ref * post PLL maximumChristian König
Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=75241 Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: check that we have a clock before PLL setupChristian König
Partially fixes: https://bugzilla.kernel.org/show_bug.cgi?id=75211 Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06drm/radeon: drm/radeon: add missing radeon_semaphore_free to error pathMaarten Lankhorst
It would appear this bug has been copy/pasted many times without being noticed. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-05-06drm/radeon: Fix num_banks calculation for SIMichel Dänzer
The way the tile mode array index was calculated only makes sense for the CIK specific macrotile mode array. For SI, we need to use one of the tile mode array indices reserved for displayable surfaces. This happened to result in correct display most if not all of the time because most of the SI tiling modes use the same number of banks. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-02drm/gm107/gr: bump attrib cb size quite a bitBen Skeggs
When initially looking at traces, missed the fact the binary driver was using large pages. Fixes page faults when launching geometry shaders. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-05-02drm/nouveau: fix another lock unbalance in nouveau_crtc_page_flipMaarten Lankhorst
Fixes a regression introduced by 060810d7abaabca "drm/nouveau: fix locking issues in page flipping paths". chan->cli->mutex is unlocked a second time in the fail_unreserve path, fix this by moving mutex_unlock down. Cc: stable@vger.kernel.org # v3.11+ Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-05-02drm/nouveau/bios: fix shadowing from PROM on big-endian systemsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-05-02drm/nouveau/acpi: allow non-optimus setups to load vbios from acpiIlia Mirkin
There appear to be a crop of new hardware where the vbios is not available from PROM/PRAMIN, but there is a valid _ROM method in ACPI. The data read from PCIROM almost invariably contains invalid instructions (still has the x86 opcodes), which makes this a low-risk way to try to obtain a valid vbios image. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76475 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: <stable@vger.kernel.org> # v2.6.35+ Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-05-01drm/radeon/dp: check for errors in dpcd readsAlex Deucher
Check to make sure the transaction succeeded before using the register value. Fixes occasional link training problems. Noticed-by: Sergei Antonov <saproj@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-01drm/radeon: avoid high jitter with small frac divsChristian König
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-01drm/radeon: check buffer relocation offsetLeo Liu
Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2014-05-01drm/radeon: use pflip irq on R600+ v2Christian König
Testing the update pending bit directly after issuing an update is nonsense cause depending on the pixel clock the CRTC needs a bit of time to execute the flip even when we are in the VBLANK period. This is just a non invasive patch to solve the problem at hand, a more complete and cleaner solution should follow in the next merge window. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=76564 v2: fix source IDs for CRTC2-6 Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2014-05-01drm/radeon/uvd: use lower clocks on old UVD to boot v2Christian König
Some RV7xx generation hardware crashes after you raise the UVD clocks for the first time. Try to avoid this by using the lower clocks to boot these. Workaround for: https://bugzilla.kernel.org/show_bug.cgi?id=71891 v2: lower clocks on IB test as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-04-30drm/i915: don't try DP_LINK_BW_5_4 on HSW ULXPaulo Zanoni
Because the docs say ULX doesn't support it on HSW. Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-04-30drm/exynos: use %pad for dma_addr_tJingoo Han
Use %pad for dma_addr_t, because a dma_addr_t type can vary based on build options. So, it prevents possible build warnings in printks. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-30drm/exynos: dsi: use IS_ERR() to check devm_ioremap_resource() resultsJingoo Han
devm_ioremap_resource() returns an error pointer, not NULL. Thus, the result should be checked with IS_ERR(). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-30drm/exynos: balance framebuffer refcountAndrzej Hajda
exynos_drm_crtc_mode_set assigns primary framebuffer to plane without taking reference. Then during framebuffer removal it is dereferenced twice, causing oops. The patch fixes it. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-30Merge branch 'vmwgfx-fixes-3.15' of ↵Dave Airlie
git://people.freedesktop.org/~thomash/linux into drm-next single security fix, cc'd stable. * 'vmwgfx-fixes-3.15' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: Make sure user-space can't DMA across buffer object boundaries v2
2014-04-29drm/i915: Sanitize the enable_ppgtt module option onceDaniel Vetter
Otherwise we'll end up spamming dmesg on every context creation on snb with vt-d enabled. This regression was introduced in commit 246cbfb5fb9a1ca0997fbb135464c1ff5bb9c549 Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Fri Dec 6 14:11:14 2013 -0800 drm/i915: Reorganize intel_enable_ppgtt As the i915.enable_ppgtt is read-only it cannot be changed after the module is loaded and so we can perform an early sanitization of the values. v2: - Add comment and pimp commit message (Chris) - Use the param consistently (Jani) v3: - Fix init sequence on pre-gen6 by moving the sanitize_ppgtt call to gtt_init. Fixes boot hangs on pre-gen6. - Add a debug output for the sanitize ppgtt mode. References: https://lkml.org/lkml/2014/4/17/599 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77916 Cc: Alessandro Suardi <alessandro.suardi@gmail.com> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-04-28Merge tag 'drm/tegra/for-3.15-rc3' of ↵Dave Airlie
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Fixes for v3.15-rc3 A single fix for some framebuffer reference counting fallout caused by the primary plane helpers introduced in 3.15-rc1. * tag 'drm/tegra/for-3.15-rc3' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: restrict plane loops to legacy planes
2014-04-28Merge branch 'msm-fixes-3.15-rc3' of ↵Dave Airlie
git://people.freedesktop.org/~robclark/linux into drm-next Fixes for msm for 3.15.. a memory leak fix for devices using vram carveout instead of iommu. Plus I think finally managed to sort out / workaround some cursor vs underflow issues. And small fbcon tweak needed to avoid extra full-modesets at boot. * 'msm-fixes-3.15-rc3' of git://people.freedesktop.org/~robclark/linux: drm/msm/mdp4: cure for the cursor blues (v2) drm/msm: default to XR24 rather than AR24 drm/msm: fix memory leak
2014-04-28Merge tag 'drm-intel-fixes-2014-04-25' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next Fix regression with DVI and fix warns, and GM45 boot regression. * tag 'drm-intel-fixes-2014-04-25' of git://anongit.freedesktop.org/drm-intel: drm/i915: Move all ring resets before setting the HWS page drm/i915: Don't WARN nor handle unexpected hpd interrupts on gmch platforms drm/i915: Allow full PPGTT with param override drm/i915: Discard BIOS framebuffers too small to accommodate chosen mode drm/i915: get power domain in case the BIOS enabled eDP VDD drm/i915: Don't check gmch state on inherited configs drm/i915: Allow user modes to exceed DVI 165MHz limit
2014-04-25drm/i915: Break encoder->crtc link separately in intel_sanitize_crtc()Egbert Eich
Depending on the SDVO output_flags SDVO may have multiple connectors linking to the same encoder (in intel_connector->encoder->base). Only one of those connectors should be active (ie link to the encoder thru drm_connector->encoder). If intel_connector_break_all_links() is called from intel_sanitize_crtc() we may break the crtc connection of an encoder thru an inactive connector in which case intel_connector_break_all_links() will not be called again for the active connector if this happens to come later in the list due to: if (connector->encoder->base.crtc != &crtc->base) continue; in intel_sanitize_crtc(). This will however leave the drm_connector->encoder linkage for this active connector in place. Subsequently this will cause multiple warnings in intel_connector_check_state() to trigger and the driver will eventually die in drm_encoder_crtc_ok() (because of crtc == NULL). To avoid this remove intel_connector_break_all_links() and move its code to its two calling functions: intel_sanitize_crtc() and intel_sanitize_encoder(). This allows to implement the link breaking more flexibly matching the surrounding code: ie. in intel_sanitize_crtc() we can break the crtc link separatly after the links to the encoders have been broken which avoids above problem. This regression has been introduced in: commit 24929352481f085c5f85d4d4cbc919ddf106d381 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Jul 2 20:28:59 2012 +0200 drm/i915: read out the modeset hw state at load and resume time so goes back to the very beginning of the modeset rework. v2: This patch takes care of the concernes voiced by Chris Wilson and Daniel Vetter that only breaking links if the drm_connector is linked to an encoder may miss some links. v3: move all encoder handling to encoder loop as suggested by Daniel Vetter. Signed-off-by: Egbert Eich <eich@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-04-25drm/i915: Move all ring resets before setting the HWS pageChris Wilson
In commit a51435a3137ad8ae75c288c39bd2d8b2696bae8f Author: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com> Date: Wed Mar 12 16:39:40 2014 +0530 drm/i915: disable rings before HW status page setup we reordered stopping the rings to do so before we set the HWS register. However, there is an extra workaround for g45 to reset the rings twice, and for consistency we should apply that workaround before setting the HWS to be sure that the rings are truly stopped. Reference: http://lkml.kernel.org/r/20140423202248.GA3621@amd.pavel.ucw.cz Tested-by: Pavel Machek <pavel@ucw.cz> Cc: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-04-25drm/i915: Don't WARN nor handle unexpected hpd interrupts on gmch platformsDaniel Vetter
The status bits are unconditionally set, the control bits only enable the actual interrupt generation. Which means if we get some random other interrupts we'll bogusly complain about them. So restrict the WARN to platforms with a sane hotplug interrupt handling scheme. And even more important also don't attempt to process the hpd bit since we've detected a storm already. Instead just clear the bit silently. This WARN has been introduced in commit b8f102e8bf71cacf33326360fdf9dcfd1a63925b Author: Egbert Eich <eich@suse.de> Date: Fri Jul 26 14:14:24 2013 +0200 drm/i915: Add messages useful for HPD storm detection debugging (v2) before that we silently handled the hpd event and so partially defeated the storm detection. v2: Pimp commit message (Jani) Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Egbert Eich <eich@suse.de> Cc: bitlord <bitlord0xff@gmail.com> Reported-by: bitlord <bitlord0xff@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-04-25drm/msm/mdp4: cure for the cursor blues (v2)Rob Clark
The hw cursor is relatively adept at triggering underflows, which manifest as a "blue flash" (since blue is configured as the underflow color). Juggle a few things around to tighten up the timing for setting cursor registers in DONE irq. And most importantly, don't ever disable the hw cursor. Instead flip it to a blank/empty cursor. This seems far more reliable, as even simply clearing the cursor-enable bit (with no other updates in previous/ following frames) can in some cases cause underflow. v1: original v2: add missing locking spotted by Micah Cc: Micah Richert <richert@braincorporation.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-04-25drm/msm: default to XR24 rather than AR24Rob Clark
Since X11 is going to create an XR24 fb, if the pixel formats do not match then crtc helpers will think it is a full modeset even if mode is the same, which prevents smooth/flickerless handover from fbcon/plymouth to X11. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-04-25drm/msm: fix memory leakMicah Richert
Signed-off-by: Micah Richert <richert@braincorporation.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-04-24drm/tegra: restrict plane loops to legacy planesDaniel Vetter
In Matt Ropers primary plane series a set of prep patches like commit af2b653bfb4ef40931b4d101ca842ce0c5da57ef Author: Matt Roper <matthew.d.roper@intel.com> Date: Tue Apr 1 15:22:32 2014 -0700 drm/i915: Restrict plane loops to only operate on overlay planes (v2) ensured that all exisiting users of the mode_config->plane_list wouldn't change behaviour. Unfortunately tegra seems to have fallen through the cracks. Fix it. This regression was introduced in commit e13161af80c185ecd8dc4641d0f5df58f9e3e0af Author: Matt Roper <matthew.d.roper@intel.com> Date: Tue Apr 1 15:22:38 2014 -0700 drm: Add drm_crtc_init_with_planes() (v2) The result was that we've unref'ed the fb for the primary plane twice, leading to a use-after free bug. This is because the drm core will already set crtc->primary->fb to NULL and do the unref for us, and the crtc disable hook is called by the drm crtc helpers for exactly this case. Aside: Now that the fbdev helpers clean up planes there's no longer a need to do this in drivers. So this could probably be nuked entirely in linux-next. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-24drm/i915: Allow full PPGTT with param overrideBen Widawsky
When PPGTT was disabled by default, the patch also prevented the user from overriding this behavior via module parameter. Being able to test this on arbitrary kernels is extremely beneficial to track down the remaining bugs. The patch that prevented this was: commit 93a25a9e2d67765c3092bfaac9b855d95e39df97 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Mar 6 09:40:43 2014 +0100 drm/i915: Disable full ppgtt by default By default PPGTT is set to -1. 0 means off, 1 means aliasing only, 2 means full, all other values are reserved. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-30 07:29:09 +0000