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2020-03-31pinctrl: qcom: fix compilation errorAnsuel Smith
pinctrl: qcom: use scm_call to route GPIO irq to Apps has a typo in the patch and introduced a compilation error. Fixes: 13bec8d4 pinctrl: qcom: use scm_call to route GPIO irq to Apps Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20200331134603.13513-1-ansuelsmth@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-28pinctrl: qcom: use scm_call to route GPIO irq to AppsAjay Kishore
For IPQ806x targets, TZ protects the registers that are used to configure the routing of interrupts to a target processor. To resolve this, this patch uses scm call to route GPIO interrupts to application processor. Also the scm call interface is changed. Signed-off-by: Ajay Kishore <akisho@codeaurora.org> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20200327223209.20409-1-ansuelsmth@gmail.com Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: sprd: Add pin high impedance mode supportLinhua Xu
For Spreadtrum pin controller, it will be the high impedance mode if disable input and output mode for a pin. Thus add PIN_CONFIG_BIAS_HIGH_IMPEDANCE configuration to support it. Signed-off-by: Linhua Xu <linhua.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/3bdac4c2673b54c940e511f3fa569ee33b87b8d5.1585124562.git.baolin.wang7@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: sprd: Use the correct pin output configurationLinhua Xu
The Spreadtrum pin controller did not supply registers to set high level or low level for output mode, instead we should let the pin controller current configuration drive values on the line. So we should use the PIN_CONFIG_OUTPUT_ENABLE configuration to enable or disable the output mode. [Baolin Wang changes the commit message] Fixes: 41d32cfce1ae ("pinctrl: sprd: Add Spreadtrum pin control driver") Signed-off-by: Linhua Xu <linhua.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/8a6f91b49c17beb218e46b23084f59a7c7260f86.1585124562.git.baolin.wang7@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Add SFIO/GPIO programming on Tegra194Thierry Reding
Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part of the GPIO controller's register programming. Starting with Tegra186, a pin is configured as GPIO or SFIO with a bit in a configuration register of the pin controller. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-10-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Renumber the GG.0 and GG.1 pinsThierry Reding
There is no need to define these at a specific offset since they are the only pins defined for this SoC generation. Begin numbering them at 0. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-9-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Do not add default pin range on Tegra194Thierry Reding
On Tegra194, almost all of the pin control programming happens in early boot firmware, so there is no use in having a pin range defined for all the pins. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-8-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Pass struct tegra_pmx for pin range checkThierry Reding
Pass the struct tegra_pmx when checking for the pin range in device tree. This makes the call site a bit easier to read and will help keep that readability in a subsequent patch. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-7-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typoThierry Reding
Properly spell "Schmitt" in the kerneldoc for pin group definitions. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-6-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Fix whitespace issues for improved readabilityThierry Reding
Fix a few whitespace inconsistencies to make the code easier to read. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-5-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: mediatek: Use scnprintf() for avoiding potential buffer overflowTakashi Iwai
Since snprintf() returns the would-be-output size instead of the actual output size, the succeeding calls may go beyond the given buffer limit. Fix it by replacing with scnprintf(). Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://lore.kernel.org/r/20200311090644.20287-1-tiwai@suse.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-26pinctrl: freescale: drop the dependency on ARM64 for i.MX8MPeng Fan
Moving to support aarch32 mode on aarch64 hardware, need to drop the dependency on ARM64 to make the driver could be selected for ARM32. Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/1584070036-26447-2-git-send-email-peng.fan@nxp.com Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-26Revert "pinctrl: mvebu: armada-37xx: use use platform api"Linus Walleij
This reverts commit 06e26b75f5e613b400116fdb7ff6206a681ab271. According to discussions, it causes a regression. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-12dt-bindings: pinctrl: at91: Fix a typo ("descibe")Jonathan Neuschäfer
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20200308214230.15193-1-j.neuschaefer@gmx.net Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-12pinctrl: meson: add tsin pinctrl for meson gxbb/gxl/gxmIgor Vavro
Add the tsin pinctrl definitions needed for integrated DVB hardware support on Meson GXBB/GXL/GXM boards. changes in v2 - fix ordering and numbering of uart_c ping flagged by Otto in [1] [1] http://lists.infradead.org/pipermail/linux-amlogic/2020-March/015906.html Signed-off-by: Igor Vavro <afl2001@gmail.com> [updated commit message] Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/1583377666-13378-1-git-send-email-christianshewitt@gmail.com Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-03pinctrl: sprd: Fix the kconfig warningBaolin Wang
On X86 plaform, if the CONFIG_OF is not selected, and set the CONFIG_SPRD_SC9860 as 'm', that will cause below waring: WARNING: unmet direct dependencies detected for PINCTRL_SPRD Depends on [n]: PINCTRL [=y] && OF [=n] && (ARCH_SPRD || COMPILE_TEST [=y]) Selected by [m]: - PINCTRL_SPRD_SC9860 [=m] && PINCTRL [=y] Thus move the configuration dependency under CONFIG_PINCTRL_SPRD_SC9860 to fix the warning. Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/eeb12d7843fb06f80e19f98eb25711231c3b610f.1583205650.git.baolin.wang7@gmail.com Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-02pinctrl: ingenic: add hdmi-ddc pin control groupPaul Boddie
Signed-off-by: Paul Boddie <paul@boddie.org.uk> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Link: https://lore.kernel.org/r/010d6ad3473fb4b1f1041888a071796180cdd838.1582913973.git.hns@goldelico.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29pinctrl: sirf/atlas7: Replace zero-length array with flexible-array memberGustavo A. R. Silva
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Link: https://lore.kernel.org/r/20200227185837.GA4469@embeddedor Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29pinctrl: sprd: Allow the SPRD pinctrl driver building into a moduleBaolin Wang
Change the config to 'tristate' and export some symbols needed by modules to allow the Spreadtrum pinctrl driver building into a module. Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/d7239f3c7379e402f665fc8927f635ac56691380.1582776447.git.baolin.wang7@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29pinctrl: Export some needed symbols at module load timeBaolin Wang
Export the pin_get_name()/pinconf_generic_parse_dt_config() symbols needed by the Spreadtrum pinctrl driver when building it as a module. Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/f4e7e20afacb23e6fa7a6b33ea4319b2b3492840.1582776447.git.baolin.wang7@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-28pinctrl: da9062: Fix error gpiolib.h pathYueHaibing
gcc 7.4.0 build fails: drivers/pinctrl/pinctrl-da9062.c:28:10: fatal error: ../gpio/gpiolib.h: No such file or directory #include <../gpio/gpiolib.h> ^~~~~~~~~~~~~~~~~~~ Fix this wrong include path. Fixes: 56cc3af4e8c8 ("pinctrl: da9062: add driver support") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20200228063429.47528-1-yuehaibing@huawei.com Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-26Merge tag 'sh-pfc-for-v5.7-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v5.7 - Improve checks for pinctrl table validation, - Miscellaneous cleanups.
2020-02-25gpiolib: export gpiochip_get_descMarco Felsch
The function was currently used internal by the gpiolib. Since commit 56cc3af4e8c8 ("pinctrl: da9062: add driver support") it is also used by drivers so we need to export the symbol. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.kernel.org/r/20200225093102.10964-1-m.felsch@pengutronix.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21pinctrl: mediatek: Fix some off by one bugsDan Carpenter
These comparisons should be >= instead of > to prevent accessing one element beyond the end of the hw->soc->pins[] array. Fixes: 3de7deefce69 ("pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()") Fixes: 184d8e13f9b1 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20200218055247.74s2xa7veqx2do34@kili.mountain Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21pinctrl: ingenic: Improve unreachable code generationJosh Poimboeuf
In the second loop of ingenic_pinconf_set(), it annotates the switch default case as unreachable(). The annotation is technically correct, because that same case would have resulted in an early function return in the previous loop. However, the compiled code is suboptimal. GCC seems to work extra hard to ensure that the unreachable code path triggers undefined behavior. The function would fall through to start executing whatever function happens to be next in the compilation unit. This is problematic because: a) it adds unnecessary 'ensure undefined behavior' logic, and corresponding i-cache footprint; and b) it's less robust -- if a bug were to be introduced, falling through to the next function would be catastrophic. Yet another issue is that, while objtool normally understands unreachable() annotations, there's one special case where it doesn't: when the annotation occurs immediately after a 'ret' instruction. That happens to be the case here because unreachable() is immediately before the return. Remove the unreachable() annotation and replace it with a comment. This simplifies the code generation and changes the unreachable error path to just silently return instead of corrupting execution. This fixes the following objtool warning: drivers/pinctrl/pinctrl-ingenic.o: warning: objtool: ingenic_pinconf_set() falls through to next function ingenic_pinconf_group_set() Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com> Link: https://lore.kernel.org/r/bc20fdbcb826512cf76b7dfd0972740875931b19.1582212881.git.jpoimboe@redhat.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21ipq8064: pinctrl: Fixed missing RGMII pincontrol definitionsAnsuel Smith
Add missing gpio definition for mdio and rgmii2. Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20200219175940.744-1-ansuelsmth@gmail.com Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21dt-bindings: pinctrl: imx8mp: Replace the uint32-array with uint32-matrixAnson Huang
The items of mux_reg/conf_reg/input_reg/mux_val/input_val/pad_setting should be uint32-matrix instead of uint32-array, fix it and improve the schema and example. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1582012300-30260-4-git-send-email-Anson.Huang@nxp.com Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21dt-bindings: pinctrl: Convert i.MX8MN to json-schemaAnson Huang
Convert the i.MX8MN pinctrl binding to DT schema format using json-schema Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1582012300-30260-3-git-send-email-Anson.Huang@nxp.com Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21dt-bindings: pinctrl: Convert i.MX8MM to json-schemaAnson Huang
Convert the i.MX8MM pinctrl binding to DT schema format using json-schema Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1582012300-30260-2-git-send-email-Anson.Huang@nxp.com Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21dt-bindings: pinctrl: Convert i.MX8MQ to json-schemaAnson Huang
Convert the i.MX8MQ pinctrl binding to DT schema format using json-schema Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1582012300-30260-1-git-send-email-Anson.Huang@nxp.com Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21pinctrl: uniphier: Replace zero-length array with flexible-array memberGustavo A. R. Silva
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Link: https://lore.kernel.org/r/20200217185437.GA20901@embeddedor Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21pinctrl: Ingenic: Add missing parts for X1830.周琰杰 (Zhou Yanjie)
Add lcd pinctrl driver for X1830. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Link: https://lore.kernel.org/r/1581851828-3493-3-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21pinctrl: Use new GPIO_LINE_DIRECTIONMatti Vaittinen
Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0. Main benefit is to make it easier to see which values mean IN and which OUT. As a side effect this helps GPIO framework to change the direction defines to something else if ever needed. Please note that return value from get_direction call on pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have returned value 2 for direction INPUT. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reported-by: kbuild test robot <lkp@intel.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21pinctrl: sunxi: Mask non-wakeup IRQs on suspendSamuel Holland
The pin controller hardware does not distinguish IRQs intended for wakeup from other IRQs, so we must mask non-wakeup IRQs in software to prevent inadvertent wakeups. This is accomplished at the irqchip level via the IRQCHIP_MASK_ON_SUSPEND flag. Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20200117213340.47714-2-samuel@sholland.org Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21pinctrl: sunxi: Forward calls to irq_set_irq_wakeSamuel Holland
The pinctrl irqchip may be connected to an irqchip that implements the .irq_set_wake callback, such as the R_INTC on A31 and newer sunxi SoCs. In order for GPIOs to be able to trigger wakeup, the IRQ from the pinctrl to the upper irqchip must also be enabled for wakeup. Since the kernel's IRQ core already manages the "wake_depth" of each IRQ, no additional accounting is needed in the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20200117213340.47714-1-samuel@sholland.org Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21pinctrl: sh-pfc: Remove use of ARCH_R8A7795Geert Uytterhoeven
CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and CONFIG_ARCH_R8A77951 in commit b925adfceb529389 ("soc: renesas: Add ARCH_R8A7795[01] for existing R-Car H3"), so its users can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200218112557.5924-1-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: gpio: Return early in gpio_pin_to_irq()Geert Uytterhoeven
As of commit 4adeabd042422cee ("pinctrl: sh-pfc: Remove hardcoded IRQ numbers"), only a single operation needs to be performed after finding the wanted pin. Hence decrease the needed attention span of the casual reader by replacing the goto by a direct return. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200212090200.11106-1-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add function GPIO checksGeert Uytterhoeven
Add checks for legacy function GPIO descriptors: 1. Function GPIOs must have a name, 2. Names must be unique, 3. Enum ID values must be unique. This exposes bugs like those fixed in - commit 884caadad128efad ("pinctrl: sh-pfc: sh7734: Fix duplicate TCLK1_B"), - commit 55b1cb1f03ad5eea ("pinctrl: sh-pfc: sh7264: Fix CAN function GPIOs"), - commit 02aeb2f21530c98f ("pinctrl: sh-pfc: sh7269: Fix CAN function GPIOs"), - commit db9c07272c8245a2 ("sh: sh7264: Remove bogus SSU GPIO function definitions"), - commit b4fba344a2930769 ("sh: sh7269: Remove bogus SSU GPIO function definitions"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-14-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add data register checksGeert Uytterhoeven
Add checks for data register descriptors: 1. Register addresses must be unique. 2. Enum ID values must be unique. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-13-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add ioctrl register checksGeert Uytterhoeven
Add checks for generic control register descriptors: 1. Register addresses must be unique. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-12-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add bias register checksGeert Uytterhoeven
Add checks for bias register descriptors: 1. Pull-up and optional pull-down register addresses must be unique, 2. Referred pins must exist. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-11-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add drive strength register checksGeert Uytterhoeven
Add checks for drive strength register descriptors: 1. Register addresses must be unique, 2. Register fields must be non-overlapping, 3. Referred pins must exist. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-10-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Improve pin group checksGeert Uytterhoeven
Improve the checks for pin group descriptors: 1. Introduce a local variable for the current group, to make the checks easier to read, 2. Pin group names must be unique. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-9-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Improve pin function checksGeert Uytterhoeven
Improve the checks for pin function descriptors: 1. Merge declaration and assignment of the local variable for the current pin function, 2. Pin function names must be unique. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-8-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Improve pin checksGeert Uytterhoeven
Improve the checks for pin descriptors: 1. Introduce local variables for the current pin, to make the checks easier to read, 2. Pins must have a name, 3. Fix double printing of identical pin names. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-7-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add check for enum ID conflictsGeert Uytterhoeven
Add a helper to verify that enum IDs are unique, and use it to validate the enum ID arrays in config register descriptors. This exposes bugs like those fixed in: - commit 805f635703b2562b ("pinctrl: sh-pfc: r8a7778: Fix duplicate SDSELF_B and SD1_CLK_B"), - commit 884caadad128efad ("pinctrl: sh-pfc: sh7734: Fix duplicate TCLK1_B"), - commit 2a069a92811fb35b ("pinctrl: sh-pfc: sh7264: Fix Port K I/O Register 0 definition"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-6-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add check for config register conflictsGeert Uytterhoeven
Add a helper to verify that register addresses are unique, and use it to validate config register descriptors. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-5-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add helper for safe name comparisonGeert Uytterhoeven
Add a helper to check if two strings are identical, skipping NULL pointers. This simplifies callers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-4-geert+renesas@glider.be
2020-02-21pinctrl: sh-pfc: checker: Add helpers for reportingGeert Uytterhoeven
Add helpers to report errors and warnings, and to increase the corresponding counters. This simplifies callers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200110131927.1029-3-geert+renesas@glider.be
2020-02-20pinctrl: mediatek: remove set but not used variable 'e'YueHaibing
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c: In function mtk_hw_pin_field_lookup: drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c:70:39: warning: variable e set but not used [-Wunused-but-set-variable] Since commit 3de7deefce69 ("pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()"), it is not used any more, so remove it, also remove redundant assignment to variable c, it will be assigned a new value later before used. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20200218023625.14324-1-yuehaibing@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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