diff options
Diffstat (limited to 'drivers')
32 files changed, 945 insertions, 378 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index 76f62bd45f02..5b49952e5fad 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c @@ -198,9 +198,19 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr, * them. This may mean that certain functions cannot be * deconfigured and is the reason we re-evaluate after writing * all descriptor bits. + * + * Port D and port E GPIO loopback modes are the only exception + * as those are commonly used with front-panel buttons to allow + * normal operation of the host when the BMC is powered off or + * fails to boot. Once the BMC has booted, the loopback mode + * must be disabled for the BMC to control host power-on and + * reset. */ - if ((desc->reg == HW_STRAP1 || desc->reg == HW_STRAP2) && - desc->ip == ASPEED_IP_SCU) + if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 && + !(desc->mask & (BIT(21) | BIT(22)))) + continue; + + if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2) continue; ret = regmap_update_bits(maps[desc->ip], desc->reg, diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c index 3ca925dfefd1..af5e904d4a1e 100644 --- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c @@ -99,7 +99,7 @@ struct iproc_gpio { void __iomem *base; void __iomem *io_ctrl; - spinlock_t lock; + raw_spinlock_t lock; struct gpio_chip gc; unsigned num_banks; @@ -221,9 +221,9 @@ static void iproc_gpio_irq_mask(struct irq_data *d) struct iproc_gpio *chip = gpiochip_get_data(gc); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); iproc_gpio_irq_set_mask(d, false); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); } static void iproc_gpio_irq_unmask(struct irq_data *d) @@ -232,9 +232,9 @@ static void iproc_gpio_irq_unmask(struct irq_data *d) struct iproc_gpio *chip = gpiochip_get_data(gc); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); iproc_gpio_irq_set_mask(d, true); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); } static int iproc_gpio_irq_set_type(struct irq_data *d, unsigned int type) @@ -274,13 +274,13 @@ static int iproc_gpio_irq_set_type(struct irq_data *d, unsigned int type) return -EINVAL; } - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); iproc_set_bit(chip, IPROC_GPIO_INT_TYPE_OFFSET, gpio, level_triggered); iproc_set_bit(chip, IPROC_GPIO_INT_DE_OFFSET, gpio, dual_edge); iproc_set_bit(chip, IPROC_GPIO_INT_EDGE_OFFSET, gpio, rising_or_high); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u level_triggered:%d dual_edge:%d rising_or_high:%d\n", @@ -328,9 +328,9 @@ static int iproc_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) struct iproc_gpio *chip = gpiochip_get_data(gc); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); iproc_set_bit(chip, IPROC_GPIO_OUT_EN_OFFSET, gpio, false); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u set input\n", gpio); @@ -343,10 +343,10 @@ static int iproc_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, struct iproc_gpio *chip = gpiochip_get_data(gc); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); iproc_set_bit(chip, IPROC_GPIO_OUT_EN_OFFSET, gpio, true); iproc_set_bit(chip, IPROC_GPIO_DATA_OUT_OFFSET, gpio, !!(val)); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u set output, value:%d\n", gpio, val); @@ -358,9 +358,9 @@ static void iproc_gpio_set(struct gpio_chip *gc, unsigned gpio, int val) struct iproc_gpio *chip = gpiochip_get_data(gc); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); iproc_set_bit(chip, IPROC_GPIO_DATA_OUT_OFFSET, gpio, !!(val)); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u set, value:%d\n", gpio, val); } @@ -461,7 +461,7 @@ static int iproc_gpio_set_pull(struct iproc_gpio *chip, unsigned gpio, { unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); if (disable) { iproc_set_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio, false); @@ -471,7 +471,7 @@ static int iproc_gpio_set_pull(struct iproc_gpio *chip, unsigned gpio, iproc_set_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio, true); } - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u set pullup:%d\n", gpio, pull_up); @@ -483,10 +483,10 @@ static void iproc_gpio_get_pull(struct iproc_gpio *chip, unsigned gpio, { unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); *disable = !iproc_get_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio); *pull_up = iproc_get_bit(chip, IPROC_GPIO_PAD_RES_OFFSET, gpio); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); } static int iproc_gpio_set_strength(struct iproc_gpio *chip, unsigned gpio, @@ -515,7 +515,7 @@ static int iproc_gpio_set_strength(struct iproc_gpio *chip, unsigned gpio, dev_dbg(chip->dev, "gpio:%u set drive strength:%d mA\n", gpio, strength); - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); strength = (strength / 2) - 1; for (i = 0; i < GPIO_DRV_STRENGTH_BITS; i++) { val = readl(base + offset); @@ -524,7 +524,7 @@ static int iproc_gpio_set_strength(struct iproc_gpio *chip, unsigned gpio, writel(val, base + offset); offset += 4; } - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); return 0; } @@ -548,7 +548,7 @@ static int iproc_gpio_get_strength(struct iproc_gpio *chip, unsigned gpio, shift = IPROC_GPIO_SHIFT(gpio); - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); *strength = 0; for (i = 0; i < GPIO_DRV_STRENGTH_BITS; i++) { val = readl(base + offset) & BIT(shift); @@ -559,7 +559,7 @@ static int iproc_gpio_get_strength(struct iproc_gpio *chip, unsigned gpio, /* convert to mA */ *strength = (*strength + 1) * 2; - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); return 0; } @@ -769,7 +769,7 @@ static int iproc_gpio_probe(struct platform_device *pdev) return -ENODEV; } - spin_lock_init(&chip->lock); + raw_spin_lock_init(&chip->lock); gc = &chip->gc; gc->base = -1; diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c index 91ea32dc1e7f..22442438275a 100644 --- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c @@ -73,7 +73,7 @@ struct nsp_gpio { struct pinctrl_dev *pctl; struct pinctrl_desc pctldesc; struct irq_domain *irq_domain; - spinlock_t lock; + raw_spinlock_t lock; }; enum base_type { @@ -203,9 +203,9 @@ static void nsp_gpio_irq_mask(struct irq_data *d) struct nsp_gpio *chip = irq_data_get_irq_chip_data(d); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); nsp_gpio_irq_set_mask(d, false); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); } static void nsp_gpio_irq_unmask(struct irq_data *d) @@ -213,9 +213,9 @@ static void nsp_gpio_irq_unmask(struct irq_data *d) struct nsp_gpio *chip = irq_data_get_irq_chip_data(d); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); nsp_gpio_irq_set_mask(d, true); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); } static int nsp_gpio_irq_set_type(struct irq_data *d, unsigned int type) @@ -226,7 +226,7 @@ static int nsp_gpio_irq_set_type(struct irq_data *d, unsigned int type) bool falling; unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); falling = nsp_get_bit(chip, REG, NSP_GPIO_EVENT_INT_POLARITY, gpio); level_low = nsp_get_bit(chip, REG, NSP_GPIO_INT_POLARITY, gpio); @@ -250,13 +250,13 @@ static int nsp_gpio_irq_set_type(struct irq_data *d, unsigned int type) default: dev_err(chip->dev, "invalid GPIO IRQ type 0x%x\n", type); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); return -EINVAL; } nsp_set_bit(chip, REG, NSP_GPIO_EVENT_INT_POLARITY, gpio, falling); nsp_set_bit(chip, REG, NSP_GPIO_INT_POLARITY, gpio, level_low); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u level_low:%s falling:%s\n", gpio, level_low ? "true" : "false", falling ? "true" : "false"); @@ -295,9 +295,9 @@ static int nsp_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) struct nsp_gpio *chip = gpiochip_get_data(gc); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); nsp_set_bit(chip, REG, NSP_GPIO_OUT_EN, gpio, false); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u set input\n", gpio); return 0; @@ -309,10 +309,10 @@ static int nsp_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, struct nsp_gpio *chip = gpiochip_get_data(gc); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); nsp_set_bit(chip, REG, NSP_GPIO_OUT_EN, gpio, true); nsp_set_bit(chip, REG, NSP_GPIO_DATA_OUT, gpio, !!(val)); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u set output, value:%d\n", gpio, val); return 0; @@ -323,9 +323,9 @@ static void nsp_gpio_set(struct gpio_chip *gc, unsigned gpio, int val) struct nsp_gpio *chip = gpiochip_get_data(gc); unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); nsp_set_bit(chip, REG, NSP_GPIO_DATA_OUT, gpio, !!(val)); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u set, value:%d\n", gpio, val); } @@ -381,10 +381,10 @@ static int nsp_gpio_set_pull(struct nsp_gpio *chip, unsigned gpio, { unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); nsp_set_bit(chip, IO_CTRL, NSP_PULL_DOWN_EN, gpio, pull_down); nsp_set_bit(chip, IO_CTRL, NSP_PULL_UP_EN, gpio, pull_up); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); dev_dbg(chip->dev, "gpio:%u set pullup:%d pulldown: %d\n", gpio, pull_up, pull_down); @@ -396,10 +396,10 @@ static void nsp_gpio_get_pull(struct nsp_gpio *chip, unsigned gpio, { unsigned long flags; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); *pull_up = nsp_get_bit(chip, IO_CTRL, NSP_PULL_UP_EN, gpio); *pull_down = nsp_get_bit(chip, IO_CTRL, NSP_PULL_DOWN_EN, gpio); - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); } static int nsp_gpio_set_strength(struct nsp_gpio *chip, unsigned gpio, @@ -417,7 +417,7 @@ static int nsp_gpio_set_strength(struct nsp_gpio *chip, unsigned gpio, offset = NSP_GPIO_DRV_CTRL; dev_dbg(chip->dev, "gpio:%u set drive strength:%d mA\n", gpio, strength); - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); strength = (strength / 2) - 1; for (i = GPIO_DRV_STRENGTH_BITS; i > 0; i--) { val = readl(chip->io_ctrl + offset); @@ -426,7 +426,7 @@ static int nsp_gpio_set_strength(struct nsp_gpio *chip, unsigned gpio, writel(val, chip->io_ctrl + offset); offset += 4; } - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); return 0; } @@ -442,7 +442,7 @@ static int nsp_gpio_get_strength(struct nsp_gpio *chip, unsigned gpio, offset = NSP_GPIO_DRV_CTRL; shift = gpio; - spin_lock_irqsave(&chip->lock, flags); + raw_spin_lock_irqsave(&chip->lock, flags); *strength = 0; for (i = (GPIO_DRV_STRENGTH_BITS - 1); i >= 0; i--) { val = readl(chip->io_ctrl + offset) & BIT(shift); @@ -453,7 +453,7 @@ static int nsp_gpio_get_strength(struct nsp_gpio *chip, unsigned gpio, /* convert to mA */ *strength = (*strength + 1) * 2; - spin_unlock_irqrestore(&chip->lock, flags); + raw_spin_unlock_irqrestore(&chip->lock, flags); return 0; } @@ -660,7 +660,7 @@ static int nsp_gpio_probe(struct platform_device *pdev) return PTR_ERR(chip->io_ctrl); } - spin_lock_init(&chip->lock); + raw_spin_lock_init(&chip->lock); gc = &chip->gc; gc->base = -1; gc->can_sleep = false; diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index d69046537b75..37be2382028f 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -525,7 +525,7 @@ pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); /** - * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller + * pinctrl_remove_gpio_range() - remove a range of GPIOs from a pin controller * @pctldev: pin controller device to remove the range from * @range: the GPIO range to remove */ @@ -1062,7 +1062,7 @@ static struct pinctrl *create_pinctrl(struct device *dev, mutex_unlock(&pinctrl_maps_mutex); if (ret < 0) { - /* If some other error than deferral occured, return here */ + /* If some other error than deferral occurred, return here */ pinctrl_free(p, false); return ERR_PTR(ret); } diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index f80134e3e0b6..83640afd825c 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -148,6 +148,7 @@ struct chv_community { size_t ngpio_ranges; size_t ngpios; size_t nirqs; + acpi_adr_space_type acpi_space_id; }; struct chv_pin_context { @@ -404,6 +405,7 @@ static const struct chv_community southwest_community = { * trigger GPEs. */ .nirqs = 8, + .acpi_space_id = 0x91, }; static const struct pinctrl_pin_desc north_pins[] = { @@ -493,6 +495,7 @@ static const struct chv_community north_community = { * GPEs. */ .nirqs = 8, + .acpi_space_id = 0x92, }; static const struct pinctrl_pin_desc east_pins[] = { @@ -536,6 +539,7 @@ static const struct chv_community east_community = { .ngpio_ranges = ARRAY_SIZE(east_gpio_ranges), .ngpios = ARRAY_SIZE(east_pins), .nirqs = 16, + .acpi_space_id = 0x93, }; static const struct pinctrl_pin_desc southeast_pins[] = { @@ -662,6 +666,7 @@ static const struct chv_community southeast_community = { .ngpio_ranges = ARRAY_SIZE(southeast_gpio_ranges), .ngpios = ARRAY_SIZE(southeast_pins), .nirqs = 16, + .acpi_space_id = 0x94, }; static const struct chv_community *chv_communities[] = { @@ -1586,11 +1591,34 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) return 0; } +static acpi_status chv_pinctrl_mmio_access_handler(u32 function, + acpi_physical_address address, u32 bits, u64 *value, + void *handler_context, void *region_context) +{ + struct chv_pinctrl *pctrl = region_context; + unsigned long flags; + acpi_status ret = AE_OK; + + raw_spin_lock_irqsave(&chv_lock, flags); + + if (function == ACPI_WRITE) + chv_writel((u32)(*value), pctrl->regs + (u32)address); + else if (function == ACPI_READ) + *value = readl(pctrl->regs + (u32)address); + else + ret = AE_BAD_PARAMETER; + + raw_spin_unlock_irqrestore(&chv_lock, flags); + + return ret; +} + static int chv_pinctrl_probe(struct platform_device *pdev) { struct chv_pinctrl *pctrl; struct acpi_device *adev; struct resource *res; + acpi_status status; int ret, irq, i; adev = ACPI_COMPANION(&pdev->dev); @@ -1646,11 +1674,29 @@ static int chv_pinctrl_probe(struct platform_device *pdev) if (ret) return ret; + status = acpi_install_address_space_handler(adev->handle, + pctrl->community->acpi_space_id, + chv_pinctrl_mmio_access_handler, + NULL, pctrl); + if (ACPI_FAILURE(status)) + dev_err(&pdev->dev, "failed to install ACPI addr space handler\n"); + platform_set_drvdata(pdev, pctrl); return 0; } +static int chv_pinctrl_remove(struct platform_device *pdev) +{ + struct chv_pinctrl *pctrl = platform_get_drvdata(pdev); + + acpi_remove_address_space_handler(ACPI_COMPANION(&pdev->dev), + pctrl->community->acpi_space_id, + chv_pinctrl_mmio_access_handler); + + return 0; +} + #ifdef CONFIG_PM_SLEEP static int chv_pinctrl_suspend_noirq(struct device *dev) { @@ -1758,6 +1804,7 @@ MODULE_DEVICE_TABLE(acpi, chv_pinctrl_acpi_match); static struct platform_driver chv_pinctrl_driver = { .probe = chv_pinctrl_probe, + .remove = chv_pinctrl_remove, .driver = { .name = "cherryview-pinctrl", .pm = &chv_pinctrl_pm_ops, diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 7671424d46cb..9bae2e3968af 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -236,6 +236,12 @@ static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, EE_OFF) }; static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, EE_OFF) }; static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, EE_OFF) }; +static const unsigned int i2s_out_ch23_y_pins[] = { PIN(GPIOY_8, EE_OFF) }; +static const unsigned int i2s_out_ch45_y_pins[] = { PIN(GPIOY_9, EE_OFF) }; +static const unsigned int i2s_out_ch67_y_pins[] = { PIN(GPIOY_10, EE_OFF) }; + +static const unsigned int spdif_out_y_pins[] = { PIN(GPIOY_12, EE_OFF) }; + static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = { MESON_PIN(GPIOAO_0, 0), MESON_PIN(GPIOAO_1, 0), @@ -274,6 +280,16 @@ static const unsigned int pwm_ao_a_6_pins[] = { PIN(GPIOAO_6, 0) }; static const unsigned int pwm_ao_a_12_pins[] = { PIN(GPIOAO_12, 0) }; static const unsigned int pwm_ao_b_pins[] = { PIN(GPIOAO_13, 0) }; +static const unsigned int i2s_am_clk_pins[] = { PIN(GPIOAO_8, 0) }; +static const unsigned int i2s_out_ao_clk_pins[] = { PIN(GPIOAO_9, 0) }; +static const unsigned int i2s_out_lr_clk_pins[] = { PIN(GPIOAO_10, 0) }; +static const unsigned int i2s_out_ch01_ao_pins[] = { PIN(GPIOAO_11, 0) }; +static const unsigned int i2s_out_ch23_ao_pins[] = { PIN(GPIOAO_12, 0) }; +static const unsigned int i2s_out_ch45_ao_pins[] = { PIN(GPIOAO_13, 0) }; + +static const unsigned int spdif_out_ao_6_pins[] = { PIN(GPIOAO_6, 0) }; +static const unsigned int spdif_out_ao_13_pins[] = { PIN(GPIOAO_13, 0) }; + static struct meson_pmx_group meson_gxbb_periphs_groups[] = { GPIO_GROUP(GPIOZ_0, EE_OFF), GPIO_GROUP(GPIOZ_1, EE_OFF), @@ -426,6 +442,10 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = { GROUP(uart_rx_c, 1, 16), GROUP(pwm_a_y, 1, 21), GROUP(pwm_f_y, 1, 20), + GROUP(i2s_out_ch23_y, 1, 5), + GROUP(i2s_out_ch45_y, 1, 6), + GROUP(i2s_out_ch67_y, 1, 7), + GROUP(spdif_out_y, 1, 9), /* Bank Z */ GROUP(eth_mdio, 6, 1), @@ -523,6 +543,14 @@ static struct meson_pmx_group meson_gxbb_aobus_groups[] = { GROUP(pwm_ao_a_6, 0, 18), GROUP(pwm_ao_a_12, 0, 17), GROUP(pwm_ao_b, 0, 3), + GROUP(i2s_am_clk, 0, 30), + GROUP(i2s_out_ao_clk, 0, 29), + GROUP(i2s_out_lr_clk, 0, 28), + GROUP(i2s_out_ch01_ao, 0, 27), + GROUP(i2s_out_ch23_ao, 1, 0), + GROUP(i2s_out_ch45_ao, 1, 1), + GROUP(spdif_out_ao_6, 0, 16), + GROUP(spdif_out_ao_13, 0, 4), }; static const char * const gpio_periphs_groups[] = { @@ -652,6 +680,14 @@ static const char * const hdmi_i2c_groups[] = { "hdmi_sda", "hdmi_scl", }; +static const char * const i2s_out_groups[] = { + "i2s_out_ch23_y", "i2s_out_ch45_y", "i2s_out_ch67_y", +}; + +static const char * const spdif_out_groups[] = { + "spdif_out_y", +}; + static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", @@ -694,6 +730,15 @@ static const char * const pwm_ao_b_groups[] = { "pwm_ao_b", }; +static const char * const i2s_out_ao_groups[] = { + "i2s_am_clk", "i2s_out_ao_clk", "i2s_out_lr_clk", + "i2s_out_ch01_ao", "i2s_out_ch23_ao", "i2s_out_ch45_ao", +}; + +static const char * const spdif_out_ao_groups[] = { + "spdif_out_ao_6", "spdif_out_ao_13", +}; + static struct meson_pmx_func meson_gxbb_periphs_functions[] = { FUNCTION(gpio_periphs), FUNCTION(emmc), @@ -717,6 +762,8 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = { FUNCTION(pwm_f_y), FUNCTION(hdmi_hpd), FUNCTION(hdmi_i2c), + FUNCTION(i2s_out), + FUNCTION(spdif_out), }; static struct meson_pmx_func meson_gxbb_aobus_functions[] = { @@ -730,6 +777,8 @@ static struct meson_pmx_func meson_gxbb_aobus_functions[] = { FUNCTION(pwm_ao_a_6), FUNCTION(pwm_ao_a_12), FUNCTION(pwm_ao_b), + FUNCTION(i2s_out_ao), + FUNCTION(spdif_out_ao), }; static struct meson_bank meson_gxbb_periphs_banks[] = { diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index 4ab94a85e306..998210eacf37 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -136,6 +136,11 @@ static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) }; +static const unsigned int nor_d_pins[] = { PIN(BOOT_11, EE_OFF) }; +static const unsigned int nor_q_pins[] = { PIN(BOOT_12, EE_OFF) }; +static const unsigned int nor_c_pins[] = { PIN(BOOT_13, EE_OFF) }; +static const unsigned int nor_cs_pins[] = { PIN(BOOT_15, EE_OFF) }; + static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) }; static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) }; static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) }; @@ -167,9 +172,13 @@ static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_15, EE_OFF) }; static const unsigned int uart_tx_b_pins[] = { PIN(GPIODV_24, EE_OFF) }; static const unsigned int uart_rx_b_pins[] = { PIN(GPIODV_25, EE_OFF) }; +static const unsigned int uart_cts_b_pins[] = { PIN(GPIODV_26, EE_OFF) }; +static const unsigned int uart_rts_b_pins[] = { PIN(GPIODV_27, EE_OFF) }; static const unsigned int uart_tx_c_pins[] = { PIN(GPIOX_8, EE_OFF) }; static const unsigned int uart_rx_c_pins[] = { PIN(GPIOX_9, EE_OFF) }; +static const unsigned int uart_cts_c_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int uart_rts_c_pins[] = { PIN(GPIOX_11, EE_OFF) }; static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, EE_OFF) }; static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, EE_OFF) }; @@ -180,6 +189,9 @@ static const unsigned int i2c_sda_b_pins[] = { PIN(GPIODV_26, EE_OFF) }; static const unsigned int i2c_sck_c_pins[] = { PIN(GPIODV_29, EE_OFF) }; static const unsigned int i2c_sda_c_pins[] = { PIN(GPIODV_28, EE_OFF) }; +static const unsigned int i2c_sck_c_dv19_pins[] = { PIN(GPIODV_19, EE_OFF) }; +static const unsigned int i2c_sda_c_dv18_pins[] = { PIN(GPIODV_18, EE_OFF) }; + static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) }; static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) }; static const unsigned int eth_clk_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) }; @@ -195,12 +207,33 @@ static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) }; static const unsigned int eth_txd2_pins[] = { PIN(GPIOZ_12, EE_OFF) }; static const unsigned int eth_txd3_pins[] = { PIN(GPIOZ_13, EE_OFF) }; +static const unsigned int pwm_a_pins[] = { PIN(GPIOX_6, EE_OFF) }; + +static const unsigned int pwm_b_pins[] = { PIN(GPIODV_29, EE_OFF) }; + +static const unsigned int pwm_c_pins[] = { PIN(GPIOZ_15, EE_OFF) }; + +static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, EE_OFF) }; + static const unsigned int pwm_e_pins[] = { PIN(GPIOX_16, EE_OFF) }; +static const unsigned int pwm_f_clk_pins[] = { PIN(GPIOCLK_1, EE_OFF) }; +static const unsigned int pwm_f_x_pins[] = { PIN(GPIOX_7, EE_OFF) }; + static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, EE_OFF) }; static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, EE_OFF) }; static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, EE_OFF) }; +static const unsigned int i2s_am_clk_pins[] = { PIN(GPIOH_6, EE_OFF) }; +static const unsigned int i2s_out_ao_clk_pins[] = { PIN(GPIOH_7, EE_OFF) }; +static const unsigned int i2s_out_lr_clk_pins[] = { PIN(GPIOH_8, EE_OFF) }; +static const unsigned int i2s_out_ch01_pins[] = { PIN(GPIOH_9, EE_OFF) }; +static const unsigned int i2s_out_ch23_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; +static const unsigned int i2s_out_ch45_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int i2s_out_ch67_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; + +static const unsigned int spdif_out_h_pins[] = { PIN(GPIOH_4, EE_OFF) }; + static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { MESON_PIN(GPIOAO_0, 0), MESON_PIN(GPIOAO_1, 0), @@ -216,6 +249,8 @@ static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, 0) }; static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, 0) }; +static const unsigned int uart_tx_ao_b_0_pins[] = { PIN(GPIOAO_0, 0) }; +static const unsigned int uart_rx_ao_b_1_pins[] = { PIN(GPIOAO_1, 0) }; static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, 0) }; static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, 0) }; static const unsigned int uart_tx_ao_b_pins[] = { PIN(GPIOAO_4, 0) }; @@ -223,9 +258,24 @@ static const unsigned int uart_rx_ao_b_pins[] = { PIN(GPIOAO_5, 0) }; static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, 0) }; static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, 0) }; +static const unsigned int i2c_sck_ao_pins[] = {PIN(GPIOAO_4, 0) }; +static const unsigned int i2c_sda_ao_pins[] = {PIN(GPIOAO_5, 0) }; +static const unsigned int i2c_slave_sck_ao_pins[] = {PIN(GPIOAO_4, 0) }; +static const unsigned int i2c_slave_sda_ao_pins[] = {PIN(GPIOAO_5, 0) }; + static const unsigned int remote_input_ao_pins[] = {PIN(GPIOAO_7, 0) }; +static const unsigned int pwm_ao_a_3_pins[] = { PIN(GPIOAO_3, 0) }; +static const unsigned int pwm_ao_a_8_pins[] = { PIN(GPIOAO_8, 0) }; + static const unsigned int pwm_ao_b_pins[] = { PIN(GPIOAO_9, 0) }; +static const unsigned int pwm_ao_b_6_pins[] = { PIN(GPIOAO_6, 0) }; + < |