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-rw-r--r--arch/arm/boot/dts/imx53.dtsi64
1 files changed, 60 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 80615dfa2177..b57ab57740f6 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -52,6 +52,11 @@
};
};
+ display-subsystem {
+ compatible = "fsl,imx-display-subsystem";
+ ports = <&ipu_di0>, <&ipu_di1>;
+ };
+
tzic: tz-interrupt-controller@0fffc000 {
compatible = "fsl,imx53-tzic", "fsl,tzic";
interrupt-controller;
@@ -103,7 +108,8 @@
};
ipu: ipu@18000000 {
- #crtc-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "fsl,imx53-ipu";
reg = <0x18000000 0x080000000>;
interrupts = <11 10>;
@@ -112,6 +118,41 @@
<&clks IMX5_CLK_IPU_DI1_GATE>;
clock-names = "bus", "di0", "di1";
resets = <&src 2>;
+
+ ipu_di0: port@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+
+ ipu_di0_disp0: endpoint@0 {
+ reg = <0>;
+ };
+
+ ipu_di0_lvds0: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&lvds0_in>;
+ };
+ };
+
+ ipu_di1: port@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ ipu_di1_disp1: endpoint@0 {
+ reg = <0>;
+ };
+
+ ipu_di1_lvds1: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&lvds1_in>;
+ };
+
+ ipu_di1_tve: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&tve_in>;
+ };
+ };
};
aips@50000000 { /* AIPS1 */
@@ -374,14 +415,24 @@
lvds-channel@0 {
reg = <0>;
- crtcs = <&ipu 0>;
status = "disabled";
+
+ port {
+ lvds0_in: endpoint {
+ remote-endpoint = <&ipu_di0_lvds0>;
+ };
+ };
};
lvds-channel@1 {
reg = <1>;
- crtcs = <&ipu 1>;
status = "disabled";
+
+ port {
+ lvds1_in: endpoint {
+ remote-endpoint = <&ipu_di0_lvds0>;
+ };
+ };
};
};
@@ -655,8 +706,13 @@
clocks = <&clks IMX5_CLK_TVE_GATE>,
<&clks IMX5_CLK_IPU_DI1_SEL>;
clock-names = "tve", "di_sel";
- crtcs = <&ipu 1>;
status = "disabled";
+
+ port {
+ tve_in: endpoint {
+ remote-endpoint = <&ipu_di1_tve>;
+ };
+ };
};
vpu: vpu@63ff4000 {